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MPC860MPCN/a32avaiPowerQUICC™ Integrated Communications Processor


MPC860 ,PowerQUICC™ Integrated Communications ProcessorFeatures– Caches are physically addressed, implement a least recently used (LRU) replacement algori ..
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MPC860
Family Hardware Specifications
This document contains detailed information on power considerations, DC/AC
electrical characteristics, and AC timing specifications for the MPC860 family.
This document contains the following topics:
Topic Page

Part I, “Overview” 1
Part II, “Features” 2
Part III, “Maximum Tolerated Ratings” 6
Part IV, “Thermal Characteristics” 7
Part V, “Power Dissipation” 8
Part VI, “DC Characteristics” 9
Part VII, “Thermal Calculation and Measurement” 10
Part VIII, “Layout Practices” 13
Part IX, “Bus Signal Timing” 13
Part X, “IEEE 1149.1 Electrical Specifications” 41
Part XI, “CPM Electrical Characteristics” 43
Part XII, “UTOPIA AC Electrical Specifications” 65
Part XIII, “FEC Electrical Characteristics” 66
Part XIV, “Mechanical Data and Ordering Information” 70
Part XV , “Document Revision History” 74
Part I Overview

The MPC860 Quad Integrated Communications Controller (PowerQUICC™)
is a versatile one-chip integrated microprocessor and peripheral combination
designed for a variety of controller applications. It particularly excels in both
communications and networking systems. The PowerQUICC unit is referred to
as the MPC860 in this manual.
The MPC860 is a derivative of Motorola’s MC68360 Quad Integrated
Communications Controller (QUICC
), referred to here as the QUICC, that
implements the PowerPC architecture. The CPU on the MPC860 is a 32-bit
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