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MMC2147HJ-3 |MMC2147HJ3NSN/a6avai5 V, 4096 x 1-bit static RAM


MMC2147HJ-3 ,5 V, 4096 x 1-bit static RAMElectrical Characteristics TA = ty'C to +70°c, VCC = 5V _+ 10% (Notes1 and 2) NM02147H-1 Symbol P ..
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MMC2147HJ-3
5 V, 4096 x 1-bit static RAM
National
Semiconductor
NMC2147H 4096 x 1-Bit Static RAM
General Description
The NMC2147H is a 4096-word by 1-bit static random ac-
Features
I: All inputs and outputs directly TTL compatible
cess memory fabricated using N-channel silicon-gate tech- " Static operation-no clocks or refreshing required
nology. All internal circuits are fully static and therefore re-
quire no clocks or refreshing for operation. The data is read
out nondestructively and has the same polarity as the input
The separate chip select input automatically switches the
part to its low power standby mode when it goes high.
The output is held in a high impedance state during write to
simplify common I/O applications.
Automatic power-down
High-speed-down to 35 ns access time
TRI-STATE' output for bus interface
Separate Data In and Data Out pins
Single +5V supply
Standard 18-pin dual-in-line package
Available in MIL-STD-883 class B screening
Block Diagram*
Pln Names'
A0-A1 1 Address Inputs
W (W) Write Enable
tTg (g) Chip Select
De: (D) Data In
DOUT (Q) Data Out
Vcc Power (5V)
Vss Ground
o,.L'o vcc
HEHDRV ARRAY
" COLUMNS
cnumu IN cmcurrs am" (a)
co LUMI 8215C?
TL/D/5257-1
Order Number NMC2147HJ-1,
NMC2147Hd-2, NMC2147Hd-3,
or NMC2147HJ-3L
See NS Package Number J18A
'The symbols in parentheses are proposed industry standard.
Logic Symbol*
0mm) -
ttnut (N -
llllllllllll
An B W!
0m to) Q (W)
TL/D/5257-2
Connection Diagram*
Dual-ln-Line Package
M-- - vcc
A1 2 -"
"-1 2A7
A3e --o
M-- -"
As 2 '=aur
nnmlm-L - An
WE a-' - thitith
Irs'- '"-uTig)
TL/D/5257-3
Top View
HLVLZOWN
NMC2147H
Absolute Maximum Ratings Truth Table*
'p'Je,taedt,rd''11'i,'' 'I',',','),',',',',',? st,nflglglU,'ft',1','; cs “15 DIN BOUT Mo... Power
Olflce/Dlstrlbutors for avallablllty and speclflcatlons. is) (W) (D) (0)
Voltage on Any Pin Relative to VSS - 3.5V to + 7V H X X Hi-Z Not Selected Standby
Storage Temperature Range - 65'C to + 150°C L L H Hi-Z Write 1 Active
Power Dissipation 1.2W L L L Hi-Z Write 0 Active
DC Output Current 20 mA L H X DOUT Read Active
Bias Temperature Range - 65°C to + 135''C
Lead Temperature (Soldering, 10 sec.) 300"G
DC Electrical Characteristics TA = ty'C to +70°c, VCC = 5V t 10% (Notes1 and 2)
NMC2147H-1
Symbol Parameter Conditions NMC2147H-3L NMC2147H-2 NMC2t47H Unlts
NMC2147H-3
Mln Max Min Max Mln Max
IILII Input Load Current VIN = ON/to 5.5V, VCC = Max 10 10 10 WA
(All Input Pins)
llLOl Output Leakage t% = VIH, VOUT = GNDto 4.5V, 50 50 50 psA
Current VCC = Max
VIL Input Low Voltage - 3.0 0.8 - 3.0 0.8 - 3.0 0.8 V
VIH Input High Voltage 2.0 6.0 2.0 6.0 2.0 6.0 V
VOL Output Low Voltage IOL = 8.0 mA 0.4 0.4 0.4 V
VOH Output High Voltage IOH = -4.0 mA 2.4 2.4 2.4 V
ICC Power Supply VIN = 5.5V, TA = trc, 125 180 ' 160 mA
Current Output Open _ - f
ISB Standby Current VCC = Min to Max, c-s = VIH 20 30 20 mA
IPO Peak Power-On £0 = VSS to VCC Min, 30 40 30 mA
Current CS = Lower of VCC or VIH Min
Capacitance TA = 25''C,t = 1 MHz (Note 3)
Symbol Parameter Conditions Mln Max Units
CIN Address/Control Capacitance VIN = 0V 5 pF
COUT Output Capacitance VOUT = 0V 6 pF
Note 1: The operating ambient temperaturs tange is guaranteed with transverse air flow exceeding 400 linear feet per minute.
Note 2: These circuits require 500 us time delay after VCC reaches the specified minimum limit to ensure proper orientation after power-on. This aklows the
internally generated substrate bias to mach its functional level.
Note 3: This parameter is guaranteed by periodic testing.
AC Test Conditions
Input Test Levels GND to 3.0V DOUT "
Input Rise and Fall Times 5 ns
Input Timing Reference Level 1.5V
Output Timing Reference Level (H-1) 1.5V Mon
Output Timing Reference Level 0.8V and 2.0V
(H-2, H-3, H-SL)
Output Load See Figure 1 - man!!!“
SCOPE AND
FIXTURE)
TL/D/5257-4
FIGURE 1. Output Load
'Symbols in parentheses are proposed industry standard.
Read Cycle AC Electrical Characteristics TA == WC to 70°C, vcc = 5V i10% (Note I)
Symbol NMC2147H-1 NM02147H-2 NMCZ147H-3 NMC21 47H
NM02147H-3L
Parameter Unlts
Alternate Standard Mln Max Min Max Mln Max Min Max
tRC TAVAV Read Cycle Time 35 45 55 70 ns
tAA TAVQV Address Access Time 35 45 55 70 ns
tACS TSLQV Chip Select Access Time 35 45 55 70 ns
(Notes 4)
th TSLQX Chip Select to Output Active 5 5 1 0 1 0 ns
(Note 5)
ml TSHQZ Chip Deselect to Output
TRI-STATE (Note 5) 0 30 0 30 0 30 0 30 ns
tOH TAXQX Output Hold from Address 5 5 5 5 ns
Change
tpU TSLIH Chip Select to Power-Up 0 0 0 0 ns
tpD TSHIL Chip Deselect to Power-Down 20 20 2O 30 ns
Max Atteestg/Current NM02147H-1 NMCZ147H-2 NM02147H-3 NM02147H-3L NMC2147H
Access (TAVCN-ns) 35 45 55 55 70
Active Current (ICC-mA) 180 180 180 125 160
Standby Current (ISB--mA) 30 30 30 20 20
Read Cycle Waveforms'
ADDHESS J
Read Cycle 1 (Continuous setectIortl5g = VILW = VIH)
(TAVAV)
(TAVQV) I
DATA OUT
PREVIDIIS DATA VIUD
tago----!
DATA VAUD
TL/D/5257-5
Read Cycle 2 (Chlp Select Swlttthed, WE = VIH) (Note 4)
C""-"""'"""-"'''"
(TSHQZ)
DATA VALID
E MIDI MEDMCE
(YAVAV)
cmnmcv EL
".2 (TSLIlV)
BATA T .--. trittvo----i
nu men Iwenuu I
ttcc ucc --------
cunnmr Is: Lr_U..Ui:Fs
Nola 4: Addresses must be vaiid coincident with or prior to the chip select transition from high to low.
Note S: Measured t50 mV from steady state voltage. This parameter is sampled and not 100% tested.
'The symbols in parentheses are proposed industry standard.
-.- MIL)
TL/D/5257-6
HlVlZOWN
NMC2147H
Write Cycle AC Electrical Characteristics TA = 0°C to 70'C, VCC = 5V A10% (Note1)
NM02147H-3
S mbol NM02147H-1 NM62147H-2 NMC2147H
y Parameter NMC2t47H-3L Units
Alternate Standard Min Max Min Max Min Max Min Max
twc TAVAV Write Cycle Time 35 45 55 70 ns
tow TSLWH Chip Select to End of Write 35 45 45 55 ns
1Aw TAVWH Address Valid to End of Write 35 45 45 55 ns
tAS TAVSL Address Set-Up Time
T AVWL 0 0 0 0 ns
twp TWLWH Write Pulse Width 20 25 25 40 ns
tWR TWHAX Write Recovery Time 0 0 10 15 ns
tDw TDVWH Data Set-Up Time 20 25 25 30 ns
tDH TWHDX Data Hold Time 10 10 10 10 ns
twz TWLQZ Write Enable to Output
TRI-STATE (Note 5) 0 20 o 25 0 25 0 35 ns
tow TWHQX Output Active from End
of Write (Note 5) 0 0 o 0 ns
Write Cycle Waveforms'' (Note 6)
Write Cycle 1 (Write Enable Limited)
(TAVAV) f
ADDRESS X X
(TSLWH)
"m 's5iiig5i)j o9'/ffg/h///fff/)h//f))f,/lffff/,
t (TAWJH) oflao--
(TAVWL) (TWLWH)
mm NiitSh 1‘
(TDWH) Ewan)
DATA m j DATA m VALID
- tea -
(TWLuZ)
I EDAHCE
DATA OUT DATA UNDEFINED H tIN WP
TL/D/5257-7
Write Cycle Waveforms'' (Note a)
Write Cycle 2 (Chlp Select lelted)
(TAVAV)
ADDRESS X
t Atl',,,
rm/td-- -
cmmmv )1
(TWLWU (TWHAX)
minrmmirs, t 7 'i4,
tmm ttm
WOW") MDX)
DATA tit ti" DATA IN VALID t
DATA our DATA unnmm man menus:
TL/D/5257-8
Note tk The output remains TRl-STATE if the ES and W go high simultaneously. W_E or 23 or both must be high during the address transitions to prevent an
erroneous write.
'The symbols in parentheses are proposed industry standard.
HLVLZOWN
This datasheet has been :
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Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
corp/docs/irwestor_relations/Pr_09_23_201 1_national_semiconductor.html
This file is the datasheet for the following electronic components:
MMC2147HJ-2 - product/mm02147hj-2?HQS=T|-nu|I-nulI-dscatalog-df-pf-null-wwe
MMC2147HJ-1 - product/mmc2147hj-1?HQS=T|-nu|I-nulI-dscatalog-df-pf-nulI-wwe
MMC2147HJ-3 - product/mmc2147hj-3?HQS=T|-nu|I-nulI-dscatalog-df-pf-nuII-wwe
MMC2147HJ-3L - product/mmc2147hj-3l?HQS=TI—null—nulI-dscataIog-df-pf-null-wwe
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