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MM5034N-MM5035N
Octal 80-Bit Static Shift Register
TL/F/10821
MM5034/MM5035
Octal
80-Bit
Static
Shift
Register
April 1990
MM5034/MM5035
Octal 80-Bit Static Shift Register
General Description
The MM5034 octal 80-bit shift registerisa monolithic MOS
integrated circuit utilizing N-channellow threshold enhance-
ment modeand ion-implanted depletion mode devices.
The MM5034is designedforusein computer displaype-
ripherals.All inputs and outputsare TTL compatible. The
clocks and recirculate logicare internalto reduce system
component count,and TRI-STATEÉ output buffers provide
bus interface. Becauseofits N-channel characteristics,sin-
gle5V power supply operationis required.
Simple interfacetothe NSC CRT DP8350 controller and
charactergeneratorto incorporatean entire CRT terminalis
feasible withthe MM5034.
The MM5034is availableina 22-lead dual-in-line package.
The MM5035isa 20-pin versionofthe MM5034 withthe
TRI-STATE output select feature omitted,fora simple data
in/dataout operation.
Features Single5V power supply Internal clocks High speedand static operation TRI-STATE output buffer Recirculateand outut select independent TTL compatible
Applications CRT displays Computer peripherals
Connection Diagrams
Dual-In-Line Package
TL/F/10821–1
Top View
Order NumberMM5034N
SeeNS Package Number N22A
Dual-In-Line Package
TL/F/10821–2
TopView
OrderNumber MM5035N
SeeNS Package Number N20A
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
