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MD2310FXFAIRCHILN/a59avaiHigh voltage npn power transistor for standard definition crt display


MD2310FX ,High voltage npn power transistor for standard definition crt displayFeatures■ State-of-the-art technology:– diffused collector “enhanced generation”■ Stable performanc ..
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MD2310FX
High voltage npn power transistor for standard definition crt display
October 2009 Doc ID 11801 Rev 5 1/10
MD2310FX

High voltage NPN power transistor for
standard definition CRT display
Features
State-of-the-art technology: diffused collector “enhanced generation” Stable performance versus operating
temperature variation Low base drive requirement Tight hFE range at operating collector current Fully insulated power package U.L. compliant
Application
Horizontal deflection output for monitor and
real flat TV
Description

The MD2310FX is manufactured using planar
technology with diffused collector adopting new
and enhanced high voltage structure. The MD
product series show improved silicon efficiency
bringing updated performance to the horizontal
deflection stage.
Figure 1. Internal schematic diagram
Table 1. Device summary
Electrical ratings MD2310FX
2/10 Doc ID 11801 Rev 5
1 Electrical ratings
Table 2. Absolute maximum ratings
Table 3. Thermal data
MD2310FX Electrical characteristics
Doc ID 11801 Rev 5 3/10
2 Electrical characteristics

TCASE = 25 °C; unless otherwise specified.
Table 4. Electrical characteristics
Pulse test: pulse duration ≤ 300 µs, duty cycle ≤ 2 %.
Electrical characteristics MD2310FX
4/10 Doc ID 11801 Rev 5
2.1 Typical characteristics
Figure 2. Safe operating area Figure 3. Derating curve
Figure 4. Output characteristics Figure 5. Reverse biased SOA
Figure 6. DC current gain (VCE = 1 V) Figure 7. DC current gain (VCE = 5 V)
MD2310FX Electrical characteristics
Doc ID 11801 Rev 5 5/10
Figure 8. Collector-emitter saturation
voltage
Figure 9. Base-emitter saturation
voltage
Figure 10. Power losses Figure 11. Inductive load switching time
Test circuits MD2310FX
6/10 Doc ID 11801 Rev 5
3 Test circuits
Figure 12. Power losses and inductive load switching test circuit
Figure 13. Reverse biased safe operating area test circuit
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