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MC74VHC244DTR2MOTOROLAN/a21138avaiOctal 3-State Driver
MC74VHC244DTR2ONN/a507avaiOctal 3-State Driver
MC74VHC244DTR2MOTON/a452avaiOctal 3-State Driver
MC74VHC244MELONN/a1440avaiOctal 3-State Driver


MC74VHC244DTR2 ,Octal 3-State Driver2NORMALIZED FAILURE RATET = 130° CJT = 120° CJT = 110° CJT = 100° CJT= 90J °CT= 80J °CMC74VHC244DC ..
MC74VHC244DTR2 ,Octal 3-State DriverELECTRICAL CHARACTERISTICS (Input t = t = 3.0 ns)r f –55°C  TÎÎAT = 25°C T  85°C  125°CA AÎÎÎÎSy ..
MC74VHC244DTR2 ,Octal 3-State DriverMaximum Ratings are those values beyond which damage to the device may occur. Functional operation ..
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MC74VHC244DTR2-MC74VHC244MEL
Octal 3-State Driver
MC74VHC244
Octal Bus Buffer
The MC74VHC244 is an advanced high speed CMOS octal bus
buffer fabricated with silicon gate CMOS technology.
The MC74VHC244 is a noninverting 3–state buffer, and has two
active–low output enables. This device is designed to be used with
3–state memory address drivers, etc.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7 V , allowing the interface of 5 V systems
to 3 V systems. High Speed: tPD = 3.9 ns (Typ) at VCC = 5 V Low Power Dissipation: ICC = 4 μA (Max) at TA = 25°C High Noise Immunity: VNIH = VNIL = 28% VCC Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2 V to 5.5 V Operating Range Low Noise: VOLP = 0.9 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 mA ESD Performance: HBM > 2000 V; Machine Model > 200 V Chip Complexity: 136 FETs
This device contains protection circuitry to guard against damage due to
high static voltages or electric fields. However, precautions must be taken to
avoid applications of any voltage higher than maximum rated voltages to
this high–impedance circuit. For proper operation, Vin and Vout should be
constrained to the range GND � (Vin or Vout) � VCC.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either GND or VCC). Unused outputs must be left open.
DATA
INPUTS YB4
YB3
YB2
YB1
YA4
YA3
YA2
YA1
NONINVERTING
OUTPUTS
OUTPUT
ENABLES
OEA
OEB
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