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MC74HCT244ADWMOTN/a25avaiOctal 3-State Noninverting Buffer/Line Driver/Line Receiver with LSTTL-Compatible Inputs
MC54HCT244AJMOTN/a10avaiOctal 3-State Noninverting Buffer/Line Driver/Line Receiver with LSTTL-Compatible Inputs
MC74HCT244ADWN/a27avaiOctal 3-State Noninverting Buffer/Line Driver/Line Receiver with LSTTL-Compatible Inputs
MC74HCT244ANMOTOROLA/ONN/a102avaiOctal 3-State Noninverting Buffer/Line Driver/Line Receiver with LSTTL-Compatible Inputs


MC74HCT244AN ,Octal 3-State Noninverting Buffer/Line Driver/Line Receiver with LSTTL-Compatible InputsMAXIMUM RATINGS*Symbol Parameter Value UnitThis device contains protectionÎÎÎcircuitry to guard aga ..
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MC54HCT244AJ-MC74HCT244ADW-MC74HCT244AN
Octal 3-State Noninverting Buffer/Line Driver/Line Receiver with LSTTL-Compatible Inputs
SEMICONDUCTOR TECHNICAL DATA%% ! ’#%
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High–Performance Silicon–Gate CMOS

The MC54/74HCT244A is identical in pinout to the LS244. This device
may be used as a level converter for interfacing TTL or NMOS outputs to
High–Speed CMOS inputs. The HCT244A is an octal noninverting buffer
line driver line receiver designed to be used with 3–state memory address
drivers, clock drivers, and other bus–oriented systems. The device has
non–inverted outputs and two active–low output enables.
The HCT244A is the noninverting version of the HCT240. See also
HCT241. Output Drive Capability: 15 LSTTL Loads TTL NMOS–Compatible Input Levels Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 4.5 to 5.5 V Low Input Current: 1 μA In Compliance with the Requirements Defined by JEDEC Standard
No. 7A Chip Complexity: 112 FETs or 28 Equivalent Gates
LOGIC DIAGRAM

DATA INPUTS YB4
YB3
YB2
YB1
YA4
YA3
YA2
YA1
NONINVERTING
OUTPUTS
PIN 20 = VCC
PIN 10 = GNDOUTPUT
ENABLES
ENABLE A
ENABLE B
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