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MC74HC4046AN from MOTOROLA, Motorola 7pcs , DIP-16,Phase-Locked Loop
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MC74HC4046AN from NS, National Semiconductor 1pcs , DIP-16,Phase-Locked Loop
MC74HC4046AN from MOTO, Motorola 25pcs , DIP16,Phase-Locked Loop
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MAXIMUM RATINGS*ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol Parameter Value UnitThis device contains protectionÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎcircuitry to guard against damageV DC Supply Voltage (Referenced to GND) – 0.5 to + 7.0 VCCdue to high static voltages or electricÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎV DC Input Voltage (Referenced to GND) – 1.5 to V + 1.5 Vfields. However, precautions mustin CCÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎbe taken to avoid applications of anyV DC Output Voltage (Referenced to GND) – 0.5 to V + 0.5 Vout CCvoltage higher than maximum ratedÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎI DC Input Current, per Pin ± 20 mAvoltages to this high–impedance cir-inÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ cuit. For proper operation, V andinI DC Output Current, per Pin ± 25 mAoutV should be constrained to theoutÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎrange GND * (V or V ) * V .I DC Supply Current, V and GND Pins ± 50 mAin out CCCC CCUnused inputs must always beÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎP Power Dissipation in Still Air Plastic DIP† 750 mWDtied to an appropriate logic voltageSOIC Package† 500ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎlevel (e.g., either GND or V ).CCUnused outputs must be left open.ÎÎÎÎÎÎÎÎÎ TÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Storage TemperatureÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ – 65 to + 150ÎÎÎÎÎÎÎÎÎ * CstgÎÎÎÎÎÎ TÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Lead Temperature, 1 mm from Case for 10 SecondsÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ * CLPlastic DIP and SOIC Package†260ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ* ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)Guaranteed LimitV – 55 toCCSymbol Parameter Test Conditions Volts 25* C ≤ 85°C ≤ 125°C UnitV Minimum High–Level Input V = 0.1 V or V – 0.1 V 2.0 1.5 1.5 1.5 VIH out CCVoltage DC Coupled |I | ≤ 20 μA 4.5 3.15 3.15 3.15outSIG , COMP 6.0 4.2 4.2 4.2IN INV Maximum Low–Level Input V = 0.1 V or V – 0.1 V 2.0 0.5 0.5 0.5 VIL out CCVoltage DC Coupled |I | ≤ 20 μA 4.5 1.35 1.35 1.35outSIG , COMP 6.0 1.8 1.8 1.8IN INV Minimum High–Level V = V or V 2.0 1.9 1.9 1.9 VOH in IH ILOutput Voltage |I | ≤ 20 μA 4.5 4.4 4.4 4.4outPCP , PCn 6.0 5.9 5.9 5.9OUT OUTV = V or Vin IH IL|I | ≤ 4.0 mA 4.5 3.98 3.84 3.7out|I | ≤ 5.2 mA 6.0 5.48 5.34 5.2out(continued)[Phase Comparator Section]DC Maximum Ratings are those values beyond which damage to the device may occur.ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎFunctional operation should be restricted to the Recommended Operating Conditions.†Derating — Plastic DIP: – 10 mW/* C from 65* to 125* CSOIC Package: – 7 mW/* C from 65* to 125* CFor high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎRECOMMENDED OPERATING CONDITIONSÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol Parameter Min Max UnitÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎV DC Supply Voltage (Referenced to GND) 3.0 6.0 VCCÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎV DC Supply Voltage (Referenced to GND) NON–VCO 2.0 6.0 VCCÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎV , V DC Input Voltage, Output Voltage (Referenced to GND) 0 V Vin out CCÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎT Operating Temperature, All Package Types – 55 + 125 * CAÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎt , t Input Rise and Fall Time V = 2.0 V 0 1000 nsr f CCÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(Pin 5) V = 4.5 V 0 500CCÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ V = 6.0 VÎÎÎ 0ÎÎÎ 400ÎÎÎCCÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ[Phase Comparator Section]DC **SEMICONDUCTOR TECHNICAL DATA** *High–Performance Silicon–Gate CMOSThe MC574HC4046A is similar in function to the MC14046 Metal gateN SUFFIXCMOS device. The device inputs are compatible with standard CMOSPLASTIC PACKAGE16outputs; with pullup resistors, they are compatible with LSTTL outputs.CASE 648–08The HC4046A phase–locked loop contains three phase comparators, a1voltage–controlled oscillator (VCO) and unity gain op–amp DEM . TheOUTcomparators have two common signal inputs, COMP , and SIG . InputIN INSIG and COMP can be used directly coupled to large voltage signals, orD SUFFIXIN INindirectly coupled (with a series capacitor to small voltage signals). The 16SOIC PACKAGECASE 751B–05self–bias circuit adjusts small voltage signals in the linear region of the1amplifier. Phase comparator 1 (an exclusive OR gate) provides a digital errorsignal PC1 and maintains 90 degrees phase shift at the centerOUTORDERING INFORMATIONfrequency between SIG and COMP signals (both at 50% duty cycle).IN INMC74HCXXXXAN PlasticPhase comparator 2 (with leading–edge sensing logic) provides digital errorMC74HCXXXXAD SOICsignals PC2 and PCP and maintains a 0 degree phase shiftOUT OUTbetween SIG and COMP signals (duty cycle is immaterial). The linearIN INVCO produces an output signal VCO whose frequency is determined byOUTthe voltage of input VCO signal and the capacitor and resistors connectedINPIN ASSIGNMENTto pins C1A, C1B, R1 and R2. The unity gain op–amp output DEM withOUTan external resistor is used where the VCO signal is needed but no loadingINPCP 1 16 Vout CCcan be tolerated. The inhibit input, when high, disables the VCO and allPC1 2 15 PC3op–amps to minimize standby power consumption. out outApplications include FM and FSK modulation and demodulation, frequen-COMP 3 14 SIGin incy synthesis and multiplication, frequency discrimination, tone decoding,VCO 4 13 PC2out outdata synchronization and conditioning, voltage–to–frequency conversionand motor speed control. INH 5 12 R2C1A 6 11 R1• Output Drive Capability: 10 LSTTL Loads• Low Power Consumption Characteristic of CMOS DevicesC1B 7 10 DEMout• Operating Speeds Similar to LSTTLGND 8 9VCOin• Wide Operating Voltage Range: 3.0 to 6.0 V• Low Input Current: 1.0 μA Maximum (except SIG and COMP )IN IN• In Compliance with the Requirements Defined by JEDEC StandardNo. 7A• Low Quiescent Current: 80 μA Maximum (VCO disabled)• High Noise Immunity Characteristic of CMOS Devices• Diode Protection on all Inputs• Chip Complexity: 279 FETs or 70 Equivalent GatesPin No. Symbol Name and Function1 PCP Phase Comparator Pulse OutputOUT2 PC1 Phase Comparator 1 OutputOUT3 COMP Comparator InputIN4 VCO VCO OutputOUT5 INH Inhibit Input6 C1A Capacitor C1 Connection A7 C1B Capacitor C1 Connection B8 GND Ground (0 V) VSS9 VCO VCO InputIN10 DEM Demodulator OutputOUT11 R1 Resistor R1 Connection12 R2 Resistor R2 Connection13 PC2 Phase Comparator 2 OutputOUT14 SIG Signal InputIN15 PC3 Phase Comparator 3 OutputOUT16 V Positive Supply VoltageCC10/95REV 6 Motorola, Inc. 1995 3–1ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMC74HC4046AÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

MC74HC4046AN ,Phase-Locked Loop**SEMICONDUCTOR TECHNICAL DATA** *High–Performance Silicon–Gate CMOSThe MC574HC4046A is similar in ..
MC74HC4046AN ,Phase-Locked LoopMaximum Ratings are those values beyond which damage to the device may occur.ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
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