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MC74HC373AFL1-MC74HC373AFR1
Octal 3-State NonInverting Transparent Latch
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High–Performance Silicon–Gate CMOSThe MC74HC373A is identical in pinout to the LS373. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
These latches appear transparent to data (i.e., the outputs change
asynchronously) when Latch Enable is high. When Latch Enable goes
low, data meeting the setup and hold time becomes latched.
The Output Enable input does not affect the state of the latches, but
when Output Enable is high, all device outputs are forced to the
high–impedance state. Thus, data may be latched even when the
outputs are not enabled.
The HC373A is identical in function to the HC573A which has the
data inputs on the opposite side of the package from the outputs to
facilitate PC board layout.
The HC373A is the non–inverting version of the HC533A. Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating V oltage Range: 2.0 to 6.0 V Low Input Current: 1.0 μA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard
No. 7A Chip Complexity: 186 FETs or 46.5 Equivalent Gates
http://
MARKING
DIAGRAMS = Assembly Location = Wafer Lot = Year = Work Week
SOIC WIDE–20
DW SUFFIX
CASE 751D
PDIP–20
N SUFFIX
CASE 738
TSSOP–20
DT SUFFIX
CASE 948G
ORDERING INFORMATION
