MC74HC11N ,Triple 3-Input AND GateMAXIMUM RATINGS*ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
MC74HC125A ,Buffer, Non-Inverting 3-StateMAXIMUM RATINGS*Symbol Parameter Value UnitÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎThis de ..
MC74HC125AD ,Quad 3-State Noninverting Buffers**SEMICONDUCTOR TECHNICAL DATA**!** * *"** *!**High–Performance Silicon–Gate CMOSThe MC74HC125A a ..
MC74HC125AD ,Quad 3-State Noninverting Buffers* * *High–Performance Silicon–Gate CMOS
MC74HC125AD ,Quad 3-State Noninverting BuffersMaximum Ratings are those values beyond which damage to the device may occur.Functional operation s ..
MC74HC125ADR2 ,Buffer, Non-Inverting 3-StateELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)Guaranteed LimitÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
MCR25M ,Silicon Controlled RectifierELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)JCharacteristic Symbol Min Typ Max Unit ..
MCR25N ,Silicon Controlled RectifierMAXIMUM RATINGS (T = 25°C unless otherwise noted)JRating Symbol Value Unit4(1)Peak Repetitive Off–S ..
MCR265 ,Silicon Controlled RectifiersELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted.)CCharacteristic Symbol Min Typ Max Uni ..
MCR265 ,Silicon Controlled RectifiersMAXIMUM RATINGS (T = 25°C unless otherwise noted)JA KRating Symbol Value Unit(1)Peak Repetitive Off ..
MCR265-10 ,Thyristors**Order this documentSEMICONDUCTOR TECHNICAL DATA by MCR265-2/D*Silicon Controlled Rectifiers. . . ..
MCR265-10 ,ThyristorsMAXIMUM RATINGS (T = 25°C unless otherwise noted.)JRating Symbol Value Unit(1)Peak Repetitive Forwa ..
MC74HC11D-MC74HC11N
Triple 3-Input AND Gate
SEMICONDUCTOR TECHNICAL DATA -
High–Performance Silicon–Gate CMOSThe MC74HC11 is identical in pinout to the LS11. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs. Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 μA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard
No. 7A Chip Complexity: 60 FETs or 15 Equivalent Gates
LOGIC DIAGRAMPIN 14 = VCC
PIN 7 = GND
Y = ABC
