MC74ACT373DW ,OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTSMAXIMUM RATINGS*Symbol Parameter Value UnitV DC Supply Voltage (Referenced to GND) –0.5 to +7.0 VCC ..
MC74ACT373DWR2 ,Octal Transparent Latch with 3 State OutputsLOW, the data that meets the setup time is latched. Data appears on thebus when the Output Enable ( ..
MC74ACT373M ,Octal Transparent Latch with 3 State Outputs* ** ** ** OCTAL TRANSPARENTLATCH WITH* * *3-STATE OUTPUTSThe MC74AC373/74ACT373 consists of eight ..
MC74ACT373MEL ,Octal Transparent Latch with 3 State Outputs3MC74AC373, MC74ACT373DC CHARACTERISTICS 74AC 74ACV T =CC A T = +25°CSymbol Parameter Unit Conditi ..
MC74ACT373N ,OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTSLOGIC DIAGRAM D D D D D D D D0 1 2 3 4 5 6 7D D D D D D D DO O O O O O O OG G G G G G G GLEOEO O O ..
MC74ACT374 ,Octal D-Type Flip-Flop with 3-State Outputs2MC74AC374, MC74ACT374RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Typ Max Unit′AC 2.0 5. ..
MCP6002-I/MS , 1 MHz Bandwidth Low Power Op Amp
MCP6002I/SN , 1 MHz Bandwidth Low Power Op Amp
MCP6002I/SN , 1 MHz Bandwidth Low Power Op Amp
MCP6002-I/SN , 1 MHz Bandwidth Low Power Op Amp
MCP6002-I/SN , 1 MHz Bandwidth Low Power Op Amp
MCP6002-I/SN , 1 MHz Bandwidth Low Power Op Amp
MC74ACT373DW-MC74ACT373N
Octal Transparent Latch with 3 State Outputs
- - -The MC74AC373/74ACT373 consists of eight latches with 3-state outputs for bus
organized system applications. The flip-flops appear transparent to the data when
Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is
latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE
is HIGH, the bus output is in the high impedance state. Eight Latches in a Single Package 3-State Outputs for Bus Interfacing Outputs Source/Sink 24 mA ′ACT373 Has TTL Compatible Inputs
PIN NAMESD0–D7 Data Inputs Latch Enable Input Output Enable Input
O0–O7 3-State Latch Outputs
TRUTH TABLEH = HIGH Voltage Level
L = LOW Voltage Level
Z = High Impedance
X = Immaterial
O0 = Previous O0 before LOW-to-HIGH Transition of Clock
LOGIC SYMBOL
