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MC14520B-MC14520BDW-MC14520BDWR2
Dual BCD Up Counter
MC14518B
Dual Up Counters
The MC14518B dual BCD counter and the MC14520B dual binary
counter are constructed with MOS P–channel and N–channel
enhancement mode devices in a single monolithic structure. Each
consists of two identical, independent, internally synchronous 4–stage
counters. The counter stages are type D flip–flops, with
interchangeable Clock and Enable lines for incrementing on either the
positive–going or negative–going transition as required when
cascading multiple stages. Each counter can be cleared by applying a
high level on the Reset line. In addition, the MC14518B will count out
of all undefined states within two clock periods. These complementary
MOS up counters find primary use in multi–stage synchronous or
ripple counting applications requiring low power dissipation and/or
high noise immunity. Diode Protection on All Inputs Supply Voltage Range = 3.0 Vdc to 18 Vdc Internally Synchronous for High Internal and External Speeds Logic Edge–Clocked Design — Incremented on Positive Transition
of Clock or Negative Transition on Enable Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.) Maximum Ratings are those values beyond which damage to the device
may occur. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/�C From 65�C To 125�C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS � (Vin or Vout) � VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
