MC14043BFL1 ,CMOS MSIELECTRICAL CHARACTERISTICS (Voltages Referenced to V )SSÎÎÎÎÎÎ – 55* CÎÎ 25* CÎÎÎÎÎ 125* CÎÎÎV VDD ..
MC14044B ,Quad R-S Latcheshttp://onsemi.com2MC14043B, MC14044BÎÎÎÎÎ
MC14044BCL ,CMOS MSI Quad R-S LatchesMaximum Ratings are those values beyond which damage to the device may occur.†Temperature Derating: ..
MC14044BCL ,CMOS MSI Quad R-S LatchesELECTRICAL CHARACTERISTICS (Voltages Referenced to V )SSΖ 55* C 25* C 125* CV VD DD DÎÎVdc VdcChar ..
MC14044BCP ,CMOS MSI Quad R-S LatchesMC14043B, MC14044BCMOS MSIQuad R−S LatchesThe MC14043B and MC14044B quad R−S latches are constructe ..
MC14044BD ,Quad R-S LatchesMAXIMUM RATINGS* (Voltages Referenced to V )SSÎÎSymbol Parameter Value UnitThis device contains pro ..
MC68376BGCAB20 , APPENDIX B MECHANICAL DATA AND ORDERING INFORMATION
MC6840CP ,Programmable timer module, 1 MHzMAXIMUM RATINGSThis devtce contains circuitry to protect theRatingSymbol Value UnitInputs agatnst d ..
MC6840CP ,Programmable timer module, 1 MHzMAXIMUM RATINGSThis devtce contains circuitry to protect theRatingSymbol Value UnitInputs agatnst d ..
MC6840P ,Programmable timer module, 1 MHzTHERMAL CHARACTERISTICS SVCC. Rellabllity of operation IS enhanced~,unused Inputs are tied to an ap ..
MC6845L ,CRT controller performs the interface to raster scan CRT displays
MC68488CP ,Speed: 1.0MHz; V(cc): -0.3 to +7.0V; V(in): -0.3 to +7.0V; ; general purpose interface adapter
MC14043BFL1
CMOS MSI
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Quad R–S LatchesThe MC14043B and MC14044B quad R–S latches are constructed
with MOS P–channel and N–channel enhancement mode devices in a
single monolithic structure. Each latch has an independent Q output
and set and reset inputs. The Q outputs are gated through three–state
buffers having a common enable input. The outputs are enabled with a
logical “1” or high on the enable input; a logical “0” or low
disconnects the latch from the Q outputs, resulting in an open circuit at
the Q outputs. Double Diode Input Protection Three–State Outputs with Common Enable Outputs Capable of Driving Two Low–power TTL Loads or One
Low–Power Schottky TTL Load Over the Rated Temperature Range Supply Voltage Range = 3.0 Vdc to 18 Vdc
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.) Maximum Ratings are those values beyond which damage to the device
may occur. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
