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MC14018BFMOTN/a754avaiPresettable Divdie-By-N Counter
MC14018BFELONN/a923avaiPresettable Divdie-By-N Counter


MC14018BFEL ,Presettable Divdie-By-N Counter3MC14018B(7.)ÎÎÎÎÎ SWITCHING CHARACTERISTICS (C = 50 pF, T = 25* C)L AÎÎÎÎ All TypesÎÎÎV VDD DD(8. ..
MC14018BFR1 ,Presettable Divide-By-N CounterELECTRICAL CHARACTERISTICS (Voltages Referenced to V )SSÎÎÎÎÎÎ – 55* CÎÎ 25* CÎÎÎÎÎ 125* CÎÎÎV VDD ..
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MC14020BCP ,14-Bit Binary CounterMaximum Ratings are those values beyond which damage to the device may occur.ÎÎΆTemperature Derati ..
MC14020BD ,14-bit binary counterMaximum Ratings are those values beyond which damage to the device may occur.ÎÎΆTemperature Derati ..
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MC14018BF-MC14018BFEL
Presettable Divdie-By-N Counter
-The MC14018B contains five Johnson counter stages which are
asynchronously presettable and resettable. The counters are
synchronous, and increment on the positive going edge of the clock.
Presetting is accomplished by a logic 1 on the preset enable input.
Data on the Jam inputs will then be transferred to their respective Q
outputs (inverted). A logic 1 on the reset input will cause all Q outputs
to go to a logic 1 state.
Division by any number from 2 to 10 can be accomplished by
connecting appropriate Q outputs to the data input, as shown in the
Function Selection table. Anti–lock gating is included in the
MC14018B to assure proper counting sequence. Fully Static Operation Schmitt Trigger on Clock Input Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range Pin–for–Pin Replacement for CD4018B
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note NO TAG)
Maximum Ratings are those values beyond which damage to the device
may occur. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
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