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MC14001UB-MC14001UBDR2-MC14011UB Fast Delivery,Good Price
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Partno Mfg Dc Qty AvailableDescript
MC14001UBMOTN/a45avaiQuad 2-Input NOR Gate
MC14001UBDR2ONN/a2500avaiQuad 2-Input NOR Gate
MC14011UBONN/a220avaiQuad 2-Input NAND Gate


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MC14001UB-MC14001UBDR2-MC14011UB
Quad 2-Input NOR Gate
MC14001UB, MC14011UB
UB-Suffix Series
CMOS Gates
The UB Series logic gates are constructed with P and N channel
enhancement mode devices in a single monolithic structure
(Complementary MOS). Their primary use is where low power
dissipation and/or high noise immunity is desired. The UB set of
CMOS gates are inverting non−buffered functions.
Features
Supply Voltage Range = 3.0 Vdc to 18 Vdc Linear and Oscillator Applications Capable of Driving Two Low−Power TTL Loads or One
Low−Power Schottky TTL Load Over the Rated Temperature Range Double Diode Protection on All Inputs Pin−for−Pin Replacements for Corresponding CD4000 Series UB
Suffix Devices Pb−Free Packages are Available*
MAXIMUM RATINGS (Voltages Referenced to VSS)

Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/�C From 65�C To 125�C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS � (Vin or Vout) � VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
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