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MC10H350LMN/a32avaiPECL* to TTL Translator
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MC10H350ML1MOTN/a906avaiPECL* to TTL Translator


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MC10H350L-MC10H350ML1
PECL* to TTL Translator
SEMICONDUCTOR TECHNICAL DATA - " !# #
The MC10H350 is a member of Motorola’s 10H family of high performance
ECL logic. It consists of 4 translators with differential inputs and TTL outputs.
The 3–state outputs can be disabled by applying a HIGH TTL logic level on the
common OE input.
The MC10H350 is designed to be used primarily in systems incorporating
both ECL and TTL logic operating off a common power supply. The separate
VCC power pins are not connected internally and thus isolate the noisy TTL VCC
runs from the relatively quiet ECL VCC runs on the printed circuit board. The
differential inputs allow the H350 to be used as an inverting or noninverting
translator, or a differential line receiver. The H350 can also drive CMOS with the
addition of a pullup resistor. Propagation Delay, 3.5 ns Typical • MECL 10K–Compatible
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ±5%) (See Note 1)

(1) Common mode input voltage to pins 3–4, 5–6, 11–12, 13–14 must be between the values of 2.8
V and 5.0 V. This common mode input voltage range includes the differential input swing.
(2) For single ended use, apply 3.75 V (VBB) to either input depending on output polarity required.
Signal level range to other input is 3.3 V to 4.2 V.
(3) Any unused gates should have the inverting inputs tied to VCC and the non–inverting inputs tied
to ground to prevent output glitching.
(4) 1.0 V to 2.0 V w/50 pF into 500 ohms.
*Positive Emitter Coupled Logic
DIP
PIN ASSIGNMENT

ECL VCC
AOUT
AIN
AIN
BIN
BIN
BOUT
GND
TTL VCC
COUT
CIN
CIN
DIN
DIN
DOUT
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
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