MC10H117P ,Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert GateMAXIMUM RATINGSCharacteristic Symbol Rating Unit45Power Supply (V = 0) V –8.0 to 0 VdcCC EE3Input V ..
MC10H121 ,4-Wide OR-AND/OR-ANDbar Gate
MC10H121 ,4-Wide OR-AND/OR-ANDbar Gate
MC10H121 ,4-Wide OR-AND/OR-ANDbar GateAND8090/DAC Characteristics of ECLDevices
MC10H121FN ,4-Wide OR-AND/OR-ANDbar GateLOGIC DIAGRAMPower Supply (V = 0) V –8.0 to 0 VdcCC EE4Input Voltage (V = 0) V 0 to V VdcCC I EE5Ou ..
MC10H121FNR2 ,4-Wide OR-AND/OR-ANDbar GateAPPLICATION NOTEDifferential Characteristics (continued)APPLICATION NOTE USAGEThis application note ..
MC34164P-3 ,MICROPOWER UNDERVOLTAGE SENSING CIRCUITSBlock Diagram1 8Reset N.C.Input 2 7 N.C.Input 2 (2)3 6N.C. N.C.Reset4 5Ground N.C.(Top View)1 (1)OR ..
MC34164P-3RP ,MicroPower UnderVoltage Sensing CircuitMaximum ratings applied to the device are individual stress limitvalues (not normal operating condi ..
MC34164P-5 ,Micropower Undervoltage Sensing CircuitELECTRICAL CHARACTERISTICS (For typical values T = 25°C, for min/max values T is the operating ambi ..
MC34164P-5 ,Micropower Undervoltage Sensing CircuitELECTRICAL CHARACTERISTICS (For typical values T = 25°C, for min/max values T is the operating ambi ..
MC34164P-5 ,Micropower Undervoltage Sensing CircuitThermal CharacteristicsP Suffix, Plastic PackageMaximum Power Dissipation @ T = 25°C P 700 mWA DThe ..
MC34165P ,V(cc): 65V; 70mA; ; power switching regulatorELECTRICAL CHARACTERISTICS (VCC = 15 V, Pin 16 = VCC, CT = 620 pF, for typical values TA = 25''C, f ..
MC10H117FN-MC10H117L-MC10H117P
Dual 2-Wide 2-3-input OR-AND/OR-AND Gate
SEMICONDUCTOR TECHNICAL DATA - -
The MC10H117 dual 2–wide 2–3–input OR–AND/OR–AND–Invert gate is a
general purpose logic element designed for use in data control, such as digital
multiplexing or data distribution. Pin 9 is common to both gates. This MECL 10H
part is a functional/pinout duplication of the standard MECL 10K family part,
with 100% improvement in propagation delay, and no increase in power–supply
current. Propagation Delay, 1.0 ns Typical Power Dissipation 100 mW/Gate Typical (same as MECL 10K) Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range) Voltage Compensated MECL 10K–Compatible
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
AC PARAMETERS
NOTE:Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through
a 50–ohm resistor to –2.0 volts.
DIP
PIN ASSIGNMENTVCC1
AOUT
AOUT
A1IN
A1IN
A2IN
A2IN
VEE
VCC2
BOUT
BOUT
B1IN
B1IN
B2IN
B2IN
A2IN, B2IN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
