MC100EL13DW ,5V ECL Dual 1:3 Fanout Buffer2MC100EL13100EL SERIES PECL DC CHARACTERISTICS V = 5.0 V; V = 0.0 V (Note 2)CC EE-40 °C 25°C 85° ..
MC100EL14D ,5V ECL 1:5 Clock Distribution Chip2MC100EL14100EL SERIES PECL DC CHARACTERISTICS V = 5.0 V; V = 0.0 V (Note 2)CC EE–40°C 25°C 85°CSy ..
mc100EL14DW ,1:5 Clock Distribution Chip** * ** ** * **The High Speed Solution for theCMOS/TTL Designer
MC100EL14DW ,1:5 Clock Distribution Chip**SEMICONDUCTOR TECHNICAL DATA ** The MC100LVEL/100EL14 is a low skew 1:5 clock distribution chip ..
mc100EL15D ,5V ECL 1:4 Clock Distribution Chip
MC100EL15DG , 5V ECL 1:4 Clock Distribution Chip
MC33039D ,Closed-Loop Brushless Motor AdapterThermal CharacteristicsMaximum Power Dissipation @ T = + 85°C P 650 mWA DThermal Resistance, Juncti ..
MC33039DR2G , Closed Loop Brushless Motor Adapter
MC33039DR2G , Closed Loop Brushless Motor Adapter
MC33039P ,CLOSED LOOP BRUSHLESS MOTOR ADAPTERthe need for a magnetic or optical tachometer. This device containsthree input buffers each with hy ..
MC3303D ,Quad Operational AmplifierMAXIMUM RATINGS CC EERating Symbol Value Unit5 10+ +42Inputs 3Inputs 2Power Supply Voltages Vdc– –6 ..
MC3303DG , Single Supply Quad Operational Amplifiers
MC100EL13DW
5V ECL Dual 1:3 Fanout Buffer
MC100EL13
5V�ECL Dual 1:3 Fanout
Buffer
The MC100EL13 is a dual, fully differential 1:3 fanout buffer. The Low
Output-Output Skew of the device makes it ideal for distributing two
different frequency synchronous signals.
The differential inputs have special circuitry which ensures device
stability under open input conditions. When both differential inputs are left
open the D input will pull down to VEE, The D input will bias around
VCC/2 and the Q output will go LOW. 500 ps Typical Propagation Delays 50 ps Output-Output Skews The 100 Series Contains Temperature Compensation PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with
VEE = 0 V NECL Mode Operating Range: VCC = 0 V with
VEE = -4.2 V to -5.7 V Internal Input Pulldown Resistors Q Output will Default LOW with Inputs Open or at VEE Internal Input Pull-down Resistors on All Inputs, Pull-up Resistors
on Inverted Inputs
ORDERING INFORMATION†
MARKING
DIAGRAM* = Assembly Location = Wafer Lot = Year = Work Week
SO-20L
DW SUFFIX
CASE 751D
http://†For additional tape and reel information, refer to
Brochure BRD8011/D.
*For additional marking information, refer to
Application Note AND8002/D.
