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MAXQ3120+-MAXQ3120-FFN
High-Precision ADC Mixed-Signal Microcontroller
General DescriptionThe MAXQ3120 microcontroller is a high-performance,
16-bit microcontroller that incorporates dual, true-differen-
tial, 16-bit sigma-delta analog-to-digital converters
(ADCs), a liquid-crystal display (LCD) interface that can
drive up to 112 segments, and a real-time clock (RTC)
module with a dedicated battery-backup supply. The
MAXQ3120 is uniquely suited for the single-phase elec-
tricity metering market, but can be used in any applica-
tion that requires high-performance operation. The device
can operate at a maximum of 8MHz (DVDD= 3.3V). The
MAXQ3120 has 16kWords of flash memory, 256 words of
RAM, three 16-bit timers, and two universal synchro-
nous/asynchronous receiver/transmitters (USARTs). The
microcontroller core and I/O are powered by a single
3.3V supply, and an additional battery supply keeps the
RTC running during power outages.
FeaturesHigh-Performance, Low-Power, 16-Bit RISC CoreDC to 8MHz Operation, Approaching 1MIPS
per MHz
3.3V Core and I/O
33 Instructions, Most Single-Cycle
Three Independent Data Pointers Accelerate
Data Movement with Automatic Increment/
Decrement
16-Level Hardware Stack
16-Bit Instruction Word, 16-Bit Data Bus
16 x 16-Bit, General-Purpose Working Registers
Optimized for C-Compiler (High-Speed/Density
Code)
Program and Data Memory16kWords Flash Memory
1,000,000 Flash Write/Erase Cycles
256 Words of Internal Data RAM
JTAG Bootloader for Programming
Dual, 16-Bit Sigma-Delta ADCsDifferential Analog Input Channels
Programmable Gain of 1x or 16x
Integrated Sinc3Filters
Digital Phase Compensation and Trimmable
Bandgap Reference
Peripheral FeaturesUp to 32 General-Purpose I/O Pins
112-Segment LCD Driver
Up to 4 COM and 28 Segments
Static, 1/2, and 1/3 LCD Bias Supported
No External Resistors Required
Two Serial USARTs, One with Infrared PWM
Support
One-Cycle, 16 x 16 Hardware Multiply/
Accumulate with 40-Bit Accumulator
Three 16-Bit Programmable Timers/Counters,
One with Infrared PWM Support
8-Bit, Subsecond, System Timer/Alarm
Battery-Backed, 32-Bit RTC with
Time-of-Day Alarm and Digital Trim
Programmable Watchdog Timer
Flexible Programming InterfaceBootloader Simplifies Programming
In-System Programming Through JTAG
Supports In-Application Programming of Flash
Memory
Power Consumption< 28mA at 8MHz, 3.3V Flash Operation
320µA Standby Current in Sleep Mode
Low-Power Divide-by-256 Mode
MAXQ3120
High-Precision ADC
Mixed-Signal MicrocontrollerRev 1; 8/05
Ordering Information
MAXQ3120
High-Precision ADC
Mixed-Signal Microcontroller
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on DVDDRelative to DGND..........-0.3V to +4.0V
Voltage Range on AVDDRelative to AGND...........-0.3V to +4.0V
Voltage Range on AGND Relative to DGND.........-0.3V to +0.3V
Voltage Range on AVDDRelative to DVDD............-0.3V to +0.3V
Voltage Range on Any Pin Relative to DGND
Except AN0+, AN0-, AN1+, AN1-.........-0.3V to (DVDD+ 0.5V)
Voltage Range on AN0+, AN0-, AN1+,
AN1- Relative to AGND......................................-4.0V to +4.0V
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Soldering Temperature.......................................See IPC/JEDEC
J-STD-020 Specification
MAXQ3120
High-Precision ADC
Mixed-Signal Microcontroller
ELECTRICAL CHARACTERISTICS (continued)
MAXQ3120
High-Precision ADC
Mixed-Signal Microcontrollercharacterization and are not production tested.
Note 2:Tested with TA= +25°C, DVDD= 3.3V, and all peripherals inactive except for port pins.
Note 3:These numbers are guaranteed by design and are not tested.
Note 4:Can be calculated as (fHFXIN/ 6).
Note 5:Can be calculated as 6 / (fHFXINx CIN).
Note 6:Can be calculated as 12 / (fHFXINx CIN).
Note 7:Assumes that no external components are connected to VLCD, VLCD1, VLCD2, or VADJ.
ELECTRICAL CHARACTERISTICS (continued)
MAXQ3120
High-Precision ADC
Mixed-Signal Microcontroller
Typical Operating Characteristics(TA = +25°C, unless otherwise noted.)
MAXQ3120
High-Precision ADC
Mixed-Signal Microcontroller
MAXQ3120
High-Precision ADC
Mixed-Signal Microcontroller
MAXQ3120
High-Precision ADC
Mixed-Signal Microcontroller
Pin Description (continued)
MAXQ3120
High-Precision ADC
Mixed-Signal Microcontroller
Functional Diagram
MAXQ3120
High-Precision ADC
Mixed-Signal Microcontroller
Detailed DescriptionThe following is an introduction to the primary features
of the microcontroller. More detailed descriptions of the
device features can be found in the data sheets, errata
sheets, and user’s guides described later in the
Additional Documentationsection.
MAXQ Core ArchitectureThe MAXQ3120 is a low-cost, high-performance,
CMOS, 16-bit RISC microcontroller with flash memory
and an integrated 112-segment LCD controller. It is
structured on a highly advanced, accumulator-based,
16-bit RISC architecture. Fetch and execution opera-
tions are completed in one cycle without pipelining,
because the instruction contains both the op code and
data. The result is a streamlined 8 million instructions-
per-second (MIPS) microcontroller.
The highly efficient core is supported by a 16-level
hardware stack, enabling fast subroutine calling and
task switching. Data can be quickly and efficiently
manipulated with three internal data pointers. Multiple
data pointers allow more than one function to access
data memory without having to save and restore data
pointers each time. The data pointers can automatically
increment or decrement following an operation, elimi-
nating the need for software intervention. As a result,
the application speed is greatly increased.
Instruction SetThe instruction set is composed of fixed-length, 16-bit
instructions that operate on registers and memory loca-
tions. The instruction set is highly orthogonal, allowing
arithmetic and logical operations to use any register
along with the accumulator. System registers control
functionality common to all MAXQ microcontrollers,
while peripheral registers control peripherals and func-
tions specific to the MAXQ3120. All registers are subdi-
vided into register modules. The family architecture is
modular, so that new devices and modules can reuse
code developed for existing products.
The architecture is transport-triggered. This means that
writes or reads from certain register locations can also
cause side effects to occur. These side effects form the
basis for the higher-level op codes defined by the
assembler, such as ADDC, OR, JUMP, etc. The op
codes are actually implemented as MOVE instructions
between certain system register locations, while the
assembler handles the encoding, which need not be a
concern to the programmer.
The 16-bit instruction word is designed for efficient exe-
cution. Bit 15 indicates the format for the source field of
the instruction. Bits 0 to 7 of the instruction represent the
source for the transfer. Depending on the value of the
format field, this can either be an 8-bit immediate value
or a source register. If this field represents a register, the
lower four bits contain the module specifier and the
upper four bits contain the register index in that module.
Bits 8 to 14 represent the destination for the transfer.
This value always represents a destination register, with
the lower four bits containing the module specifier and
the upper three bits containing the register subindex
within that module.
The following types of instructions require the use of
the prefix register, PFX, to supply additional data.Loading a 16-bit immediate value (with a nonzero
high byte) into any registerBranching to a 16-bit absolute destination address
(LJMP or LCALL)Selecting one of the upper 8 registers in a system
register module as a destinationSelecting one of the upper 16 registers in a periph-
eral register module as a sourceSelecting one of the upper 24 registers in a periph-
eral register module as a destination
For any of these instruction types, the prefix register is
used to supply the additional immediate value bits,
source bits, and destination bits as needed. This prefix
register write is inserted automatically by the assembler
and requires only one additional execution cycle for
any or all of these conditions.
Memory OrganizationThe device incorporates several memory areas:2kWords utility ROM16kWords of flash memory for program storage256 words of SRAM for storage of temporary vari-
ables16-level, 16-bit-wide stack memory for storage of
program return addresses and general-purpose use
The memory is arranged by default in a Harvard archi-
tecture, with separate address spaces for program and
data memory. The configuration of program and data
space depends on the current execution location.When executing code from flash memory, the SRAM
and utility ROM are accessible in data space.When executing code from SRAM, the flash memory
and utility ROM are accessible in data space.When executing code from the utility ROM, the flash
memory and SRAM are accessible in data space.
MAXQ3120
High-Precision ADC
Mixed-Signal MicrocontrollerRefer to the user’s guide supplement for this device for
more details.
In all cases, whichever memory segment is currently
being executed from cannot be accessed in data space.
To allow the use of lookup tables and similar constructs
in the flash memory, the utility ROM contains a set of
lookup and block copy routines (refer to the user’s guide
supplement for this device for more details).
The incorporation of flash memory allows the device to
be reprogrammed, eliminating the expense of throwing
away one-time programmable devices during develop-
ment and field upgrades. Flash memory can be pass-
word protected with a 16-word key, denying access to
program memory by unauthorized individuals.
Stack MemoryA 16-bit-wide internal stack provides storage for pro-
gram return addresses and general-purpose use. The
stack is used automatically by the processor when the
CALL, RET, and RETI instructions are executed and
interrupts serviced. The stack can also be used explic-
itly to store and retrieve data by using the PUSH, POP,
and POPI instructions.
On reset, the stack pointer, SP, initializes to the top of
the stack (0Fh). The CALL, PUSH, and interrupt-vector-
ing operations increment SP, then store a value at the
stack location pointed to by SP. The RET, RETI, POP,
and POPI operations retrieve the value at the stack
location pointed to by SP, and then decrement SP.
Utility ROMThe utility ROM is a 2kWord block of internal ROM
memory that defaults to a starting address of 8000h.
The utility ROM consists of subroutines that can be
called from application software. These include:In-system programming (bootloader) over the JTAG
interfaceIn-circuit debug routinesTest routines (internal memory tests, memory loader,
etc.)User-callable routines for in-application flash pro-
gramming and code space tablelookup
Figure 1. Memory Map
MAXQ3120Following any reset, execution begins in the utility
ROM. The ROM software determines whether the pro-
gram execution should immediately jump to the start of
user-application code (located at address 0000h), or to
one of the special routines mentioned. Routines within
the utility ROM are user-accessible and can be called
as subroutines by the application software. More infor-
mation on the utility ROM contents is contained in the
user’s guide supplement for this device.
Some applications require protection against unautho-
rized viewing of program code memory. For these
applications, access to in-system programming, in-
application programming, or in-circuit debugging func-
tions is prohibited until a password has been supplied.
A single password-lock (PWL) bit is implemented in the
SC register. When the PWL is set to one (power-on
reset default), the password is required to access the
utility ROM, including in-circuit debug and in-system
programming routines that allow reading or writing of
internal memory. When PWL is cleared to zero, these
utilities are fully accessible without the password. The
password is automatically set to all ones following a
mass erase.
ProgrammingThe flash memory of the microcontroller can be pro-
grammed by two different methods: in-system program-
ming and in-application programming. Both methods
afford great flexibility in system design as well as reduce
the life-cycle cost of the embedded system. These fea-
tures can be password protected to prevent unautho-
rized access to code memory.
In-System ProgrammingAn internal bootstrap loader allows the device to be
reloaded over a simple JTAG interface. As a result, sys-
tem software can be upgraded in-system, eliminating
the need for a costly hardware retrofit when software
updates are required. Remote software uploads are
possible that enable physically inaccessible applica-
tions to be frequently updated. The interface hardware
can be a JTAG connection to another microcontroller, or
a connection to a PC serial port using a serial-to-JTAG
converter such as the MAXQJTAG-001, available from
Maxim Integrated Products/Dallas Semiconductor. If in-
system programmability is not required, a commercial
gang programmer can be used for mass programming.
Activating the JTAG interface and loading the test
access port (TAP) with the system programming instruc-
tion invokes the bootloader. Setting the SPE bit to 1 dur-
ing reset through the JTAG interface executes the
bootloader-mode program that resides in the utility
ROM. When programming is complete, the bootloader
can clear the SPE bit and reset the device, allowing the
device to bypass the utility ROM and begin execution of
the application software.
The following bootloader functions are supported:LoadDumpCRC
•VerifyErase
In-Application ProgrammingThe in-application programming feature allows the
microcontroller to modify its own flash program memory
while simultaneously executing its application software.
This allows on-the-fly software updates in mission-criti-
cal applications that cannot afford downtime.
Alternatively, it allows the application to develop custom
loader software that can operate under the control of the
application software. The utility ROM contains user-
accessible flash programming functions that erase and
program flash memory. These functions are described
in detail in the user’s guide supplement for this device.
Register SetMost functions of the device are controlled by sets of
registers. These registers provide a working space for
memory operations as well as configuring and address-
ing peripheral registers on the device. Registers are
divided into two major types: system registers and
peripheral registers. The common register set, also
known as the system registers, includes the ALU, accu-
mulator registers, data pointers, interrupt vectors and
control, and stack pointer. The peripheral registers
define additional functionality that may be included by
different products based on the MAXQ architecture.
This functionality is broken up into discrete modules so
that only the features required for a given product need
to be included. Tables1 and 4 show the MAXQ3120
register set.
High-Precision ADC
Mixed-Signal Microcontroller
MAXQ3120
High-Precision ADC
Mixed-Signal Microcontroller
Note:Names that appear in italics indicate that all bits of a register are read-only. Names that appear in bold indicate that a register
is 16 bits wide. Registers in module AP are bit addressable.
MAXQ3120
High-Precision ADC
Mixed-Signal Microcontroller
MAXQ3120
High-Precision ADC
Mixed-Signal Microcontroller
Note:Bits marked with an “i” have an indeterminate value upon reset. Bits marked with an “s” have special behavior upon reset.
Refer to the user’s guide supplement for this device for more details.
MAXQ3120
High-Precision ADC
Mixed-Signal Microcontroller
Note:Names that appear in italics indicate that all bits of a register are read-only. Names that appear in bold indicate that a register
is 16 bits wide. Registers in module AP are bit addressable.
MAXQ3120
High-Precision ADC
Mixed-Signal Microcontroller
