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MAX9729ETI+
Stereo Headphone Amplifier with BassMax, Volume Control, and Input Mux
General DescriptionThe MAX9729 stereo DirectDrive® headphone amplifier
features bass boost, volume control, an input mux, and
an I2C/SMBus-compatible serial interface. This makes
the MAX9729 ideal for portable audio applications where
space is at a premium and performance is essential. The
MAX9729 operates from a single 1.8V to 3.6V, and uses
Maxim’s DirectDrive architecture, eliminating the need for
large DC-blocking capacitors. The headphone amplifiers deliver 52mW into a 32Ω load, feature low 0.03% THD+N, and high 90dB PSRR. Maxim’s industry-leading click-and-pop suppression circuitry reduces audible transients during power and shutdown cycles.
The BassMax feature boosts the bass response of the ampli-
fier, improving audio reproduction for low-end headphones.
The integrated volume control features 32 discrete volume
levels along with a ramping function to ensure smooth transitions during shutdown cycles and input selection. The
MAX9729’s eight programmable maximum gain settings
allow for a wide range of input signal levels. A 3:1 multi-
plexer/mixer allows the selection and summation of multiple
stereo input signal sources. The MAX9729 also includes a dedicated BEEP input with independent attenuation control.
BassMax, volume control, gain settings, and input selection
are controlled using the I2C/SMBus-compatible serial inter-face. A lowpower, 5μA shutdown mode is controlled through
an external logic input or the serial interface.
The MAX9729 consumes only 4.8mA of supply current,
provides short-circuit and thermal-overload protection, and is specified over the -40°C to +85°C extended tem-
perature range. The MAX9729 is available in a spacesav-
ing 28-pin thin QFN package (5mm x 5mm x 0.8mm).
Features●DirectDrive Headphone Amplifier Eliminates●Bulky DC-Blocking Capacitors●3:1 Input Multiplexer with Digital-Fade Circuitry●Software-Enabled Bass Boost●32-Step Integrated Volume Control●Beep Input with Programmable Output Level●Low Quiescent Current●Industry-Leading Click-and-Pop Suppression●I2C-Compatible 2-Wire Interface●Short-Circuit Protection●1.8V to 3.6V Single-Supply Operation●Available in Space-Saving, Thermally Efficient 28-Pin TQFN-EP (5mm x 5mm x 0.8mm)
Applications
Pin Configuration appears at end of data sheet.●Portable CD/DVD/MD Players●Cell Phones●MP3/PMP Players●Flat-Panel TVs
Note: This device operates over the -40°C to +85°C operating temperature range.+Denotes lead-free package.
*Last digit of slave address is pin programmable.
**EP = Exposed pad.
DirectDrive is a registered trademark of Maxim Integrated
Products, Inc.
PARTPIN-
PACKAGE
SLAVE
ADDRESS*MAX9729ETI+28 TQFN-EP**101000_
I2C INTERFACE
MUX
MIXER
FADER
CONTROL
VOLUME
CONTROL
BassMax
BassMax
1.8V TO 3.6V
SCL
SDA
INL1
INL2
INL3
INR1
INR2
INR3
BEEP
OUTL
BML
BMR
MAX9729PGA
OUTR
PGA
MAX9729Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
Simpliied Block Diagram
Ordering Information
EVALUATION KIT AVAILABLE
VDD, PVDD to PGND or SGND ...............................-0.3V to +4V
VDD to PVDD ..............................................Internally ConnectedPVSS to SVSS ....................................................................±0.3VSGND to PGND ..................................................................±0.3VC1P to PGND ...........................................-0.3V to (VDD + 0.3V)C1N to PGND .........................................(PVSS - 0.3V) to +0.3VPVSS, SVSS to PGND .............................................+0.3V to -4VINL_, INR_, BEEP to SGND .......(SVSS - 0.3V) to (VDD + 0.3V)SDA, SCL, BEEP_EN to PGND ..............................-0.3V to +4V
SHDN to PGND ........................................-0.3V to (VDD + 0.3V)OUT_ to PGND ..........................................................-3V to +3VBM_ to SGND.............................................................-2V to +2VDuration of OUT_ Short Circuit to PGND..................Continuous
Continuous Current Into/Out of:
VDD, C1P, C1N, PGND, PVSS, SVSS, or OUT_ .........±0.85AAll other pins .................................................................±20mAContinuous Power Dissipation (TA = +70°C, multilayer board) 28-Pin Thin QFN (derate 28.6mW/°C above +70°C) 0.2286mWJunction-to-Ambient Thermal Resistance (θJA) 28-Pin TQFN ...............................................................35°C/WOperating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°CStorage Temperature Range ............................-65°C to +150°COUT_ ESD Protection (Human Body Model) ......................±8kVESD Protection of All Other Pins .........................................±2kVLead Temperature (soldering, 10s) .................................+300°C
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, BM_ = 0V, maximum gain setting = 6dB, volume attenuation setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N mea-surement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
GENERALSupply Voltage RangeVDD(Note 2)1.83.6V
Charge-Pump and Logic Supply
VoltagePVDD(Note 2)1.83.6V
Quiescent Supply CurrentIDDNo load, BEEP_EN = VDD (Note 3)5.58mA
Shutdown Supply CurrentIDD_SHDNVSHDN = 0V510µA
Turn-On TimetONFrom shutdown mode to full operation200µs
Beep Enable TimetON_BEEP12µs
Thermal Shutdown ThresholdTTHRES146°C
Thermal Shutdown HysteresisTHYST13°C
HEADPHONE AMPLIFIERInput ResistanceRINApplicable to all maximum gain and
volume settings142535kΩ
Output Offset VoltageVOSHPMeasured between OUT_ and SGND, overall gain = -10dB (Note 3)±0.7±3.5mV
BMR, BML Input Bias CurrentIBIAS_BM±10±100nA
MAX9729Stereo Headphone Ampliier with BassMax, Volume Control, and Input Mux
Absolute Maximum RatingsStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics (3V Supply)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, BM_ = 0V, maximum gain setting = 6dB, volume attenuation setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N mea-surement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSPower-Supply Rejection RatioPSRR(Note 3)
VDD = 1.8V to 3.6V, overall
gain = 6dB7295
f = 217Hz, 100mVP-P ripple,
overall gain = 26dB90
f = 1kHz, 100mVP-P ripple,
overall gain = 26dB82
f = 20kHz, 100mVP-P ripple,
overall gain = 26dB58
Output PowerPOUT
THD+N = 1%,
fIN = 1kHz, overall
gain = 1.8dB,
TA = +25°C (Note 4)
RL = 16Ω1249
RL = 32Ω2152
Total Harmonic Distortion Plus NoiseTHD+N
fIN = 1kHz, overall
gain = 3.5dB(Note 4)
RL = 16Ω,POUT = 42mW0.04RL = 32Ω,POUT = 40mW0.04
Maximum GainAVMAX
Register 0x01, B[2:0] = 0003.5
Register 0x01, B[2:0] = 0016
Register 0x01, B[2:0] = 0108
Register 0x01, B[2:0] = 01110
Register 0x01, B[2:0] = 10019.5
Register 0x01, B[2:0] = 10122
Register 0x01, B[2:0] = 11024
Register 0x01, B[2:0] = 11126
Beep Input AttenuationAV_BEEP
Register 0x01, B[7:5] = 00010
Register 0x01, B[7:5] = 00120
Register 0x01, B[7:5] = 01030
Register 0x01, B[7:5] = 01140
Register 0x01, B[7:5] = 10050
Register 0x01, B[7:5] = 10152
Register 0x01, B[7:5] = 11054
Register 0x01, B[7:5] = 11156
Signal-to-Noise RatioSNRRL = 32Ω,
VOUT = 1VRMS
BW = 22Hz to 22kHz99BW = 22Hz to 22kHz
and A-weighted101
Slew RateSR0.5V/µs
Capacitive DriveNo sustained oscillations200pF
MAX9729Stereo Headphone Ampliier with BassMax, Volume Control, and Input Mux
Electrical Characteristics (3V Supply) (continued)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, BM_ = 0V, maximum gain setting = 6dB, volume attenuation setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N mea-surement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
(VDD = PVDD = SHDN = 2.4V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, BM_ = 0V, maximum gain setting = 6dB, volume attenuation
setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N mea-surement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSClick-and-Pop LevelKCP
Peak voltage,
A-weighted, 32
samples per second(Notes 3 and 5)
Into shutdown81
dBV
Out of shutdown80
Charge-Pump Switching FrequencyfCP505600730kHz
CrosstalkL to R, or R to L, f = 10kHz, VOUT =
1VRMS, RL = 32Ω, both channels loaded78dB
DIGITAL INPUTS (SHDN, SDA, SCL, BEEP_EN)Input High VoltageVIH1.4V
Input Low VoltageVIL0.4V
Input Leakage Current-1+1µA
DIGITAL OUTPUTS (SDA)Output Low VoltageVOLIOL = 3mA0.4V
Output High CurrentIOHVSDA = VDD1µA
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSQuiescent CurrentIDDNo load (Note 3)4.5mA
Shutdown CurrentISHDNVSHDN = 0V4µA
Output PowerPOUT
THD+N = 1%,
fIN = 1kHz, overall
gain = 3.5dB,
TA = +25°C(Note 4)
RL = 16Ω32
RL = 32Ω32
Total Harmonic Distortion Plus NoiseTHD+N
fIN = 1kHz, overall
gain = 3.5dB(Note 4)
RL = 16Ω,POUT = 23mW0.03RL = 32Ω,POUT = 23mW0.03
Power-Supply Rejection RatioPSRR100mVP-P ripple (Note 3)
f = 217Hz90f = 1kHz85
f = 10kHz61
MAX9729Stereo Headphone Ampliier with BassMax, Volume Control, and Input Mux
Electrical Characteristics (3V Supply) (continued)
Electrical Characteristics (2.4V Supply)
(VDD = PVDD = SHDN = 2.4V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, BM_ = 0V, maximum gain setting = 6dB, volume attenuation
setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N mea-surement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, BM_ = 0V, maximum gain setting = 6dB, volume setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 1 and 6)
Note 1: All specifications are 100% tested at TA = +25°C. Temperature limits are guaranteed by design.
Note 2: VDD and PVDD must be connected together.
Note 3: Inputs AC-coupled to SGND.
Note 4: Both channels loaded and driven in phase.
Note 5: Headphone testing performed with a 32Ω resistive load connected to PGND. Mode transitions are controlled by SHDN. KCP level is calculated as 20log[(peak voltage during mode transition, no input signal)/1VRMS]. Units are expressed in dBV.
Note 6: Guaranteed by design.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSSignal-to-Noise RatioSNR
RL = 32Ω,
VOUT = 1VRMS,
overall gain =
3.5dB
BW = 22Hz to 22kHz98BW = 22Hz to 22kHz
and A-weighted101
Click-and-Pop LevelKCP
Peak voltage,
A-weighted,
32 samples per
second(Notes 3 and 5)
Into shutdown79
dBV
Out of shutdown79
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSSerial Clock FrequencyfSCL0400kHz
Bus Free Time Between a STOP and a START ConditiontBUF1.3µs
Hold Time Repeated for a START
ConditiontHD:STA0.6µs
Low Period of the SCL ClocktLOW1.3µs
High Period of the SCL ClocktHIGH0.6µs
Setup Time for a Repeated START
ConditiontSU:STA 0.6µs
Data Hold TimetHD:DAT00.9µs
Data Setup TimetSU:DAT100ns
Rise Time of Both SDA and SCL Signalstr300ns
Fall Time of Both SDA and SCL Signalstf300ns
Setup Time for STOP ConditiontSU:STO0.6µs
Pulse Width of Suppressed SpiketSP50ns
Capacitive Load for Each Bus LineCL_BUS400pF
MAX9729Stereo Headphone Ampliier with BassMax, Volume Control, and Input Mux
Timing Characteristics
Electrical Characteristics (2.4V Supply) (continued)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, CIN = 1μF (1206 case size, X7R dielectric ceramic capacitor), BM_ = 0V, maximum gain setting = 3.5dB, volume attenuation setting = 0dB (total voltage gain = 3.5dB), BassMax disabled. Load con-nected between OUT_ and PGND where speciied. THD+N measurement BW = 22Hz to 22kHz. Both channels loaded and driven in
phase. TA = +25°C, unless otherwise noted.)
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWERMAX9729 toc02
OUTPUT POWER PER CHANNEL (mW)
THD+N (%)607010203040080
VDD = 3V
RL = 32Ω
fIN = 100Hz
fIN = 1kHz
fIN = 5kHz
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWERMAX9729 toc03
OUTPUT POWER PER CHANNEL (mW)
THD+N (%)5101520253035404550
VDD = 2.4V
RL = 16Ω
fIN = 100Hz
fIN = 1kHz
fIN = 5kHz
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWERMAX9729 toc04
OUTPUT POWER PER CHANNEL (mW)
THD+N (%)5101520253035404550
VDD = 2.4V
RL = 32Ω
fIN = 100Hz
fIN = 1kHz
fIN = 5kHz
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCYMAX9729 toc05
FREQUENCY (Hz)
THD+N (%)
10k1k100
0.001100k
VDD = 3V
RL = 16Ω
POUT = 42mW
POUT = 9mW
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCYMAX9729 toc06
FREQUENCY (Hz)
THD+N (%)
10k1k100
0.001100k
VDD = 3V
RL = 32Ω
POUT = 40mW
POUT = 5mW
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCYMAX9729 toc07
THD+N (%)
VDD = 2.4V
RL = 16Ω
POUT = 23mΩ
POUT = 8mΩ
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWERMAX9729 toc01
OUTPUT POWER PER CHANNEL (mW)
THD+N (%)607010203040080
VDD = 3V
RL = 16Ω
fIN = 100Hz
fIN = 5kHz
fIN = 1kHz
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCYMAX9729 toc08
THD+N (%)
VDD = 2.4V
RL = 32Ω
POUT = 23mΩ
POUT = 3mΩ
POWER DISSIPATION
vs. OUTPUT POWER
MAX9729 toc09
POWER DISSIPATION (mW)
VDD = 3V
fIN = 1kHz
POUT = POUTL + POUTR
RL = 32Ω
RL = 16Ω
MAX9729Stereo Headphone Ampliier with BassMax, Volume Control, and Input Mux
Typical Operating Characteristics
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, CIN = 1μF (1206 case size, X7R dielectric ceramic capacitor), BM_ = 0V, maximum gain setting = 3.5dB, volume attenuation setting = 0dB (total voltage gain = 3.5dB), BassMax disabled. Load con-nected between OUT_ and PGND where speciied. THD+N measurement BW = 22Hz to 22kHz. Both channels loaded and driven in
phase. TA = +25°C, unless otherwise noted.)1001000
OUTPUT POWER
vs. LOAD RESISTANCEMAX9729 toc11
LOAD RESISTANCE (Ω)
OUTPUT POWER PER CHANNEL (mW)10
VDD = 3V
fIN = 1kHz
THD+N = 10%
THD+N = 1%1001000
OUTPUT POWER
vs. LOAD RESISTANCEMAX9729 toc12
LOAD RESISTANCE (Ω)
OUTPUT POWER PER CHANNEL (mW)
VDD = 2.4V
fIN = 1kHz
THD+N = 10%
THD+N = 1%
OUTPUT POWER
vs. SUPPLY VOLTAGE
MAX9729 toc13
SUPPLY VOLTAGE (V)
OUTPUT POWER PER CHANNEL (mW)
fIN = 1kHz
RL = 16Ω
THD+N = 10%
THD+N = 1%
OUTPUT POWER
vs. SUPPLY VOLTAGE
MAX9729 toc14
SUPPLY VOLTAGE (V)
OUTPUT POWER PER CHANNEL (mW)
fIN = 1kHz
RL = 32Ω
THD+N = 10%
THD+N = 1%
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCYMAX9729 toc15
FREQUENCY (Hz)
PSRR (dB)
10k1k100
-20100k
VDD = 3V
SUPPLY RIPPLE 100mVP-P
RL = 32Ω
HPR
HPL
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCYMAX9729 toc16
PSRR (dB)
VDD = 2.4V
SUPPLY RIPPLE 100mVP-P
RL = 32Ω
HPR
HPL
POWER DISSIPATION
vs. OUTPUT POWER
MAX9729 toc10
OUTPUT POWER (mW)
POWER DISSIPATION (mW)
VDD = 2.4V
fIN = 1kHz
POUT = POUTL + POUTR
RL = 32Ω
RL = 16Ω
CROSSTALK vs. FREQUENCYMAX9729 toc17
CROSSTALK (dB)
GAIN = 3.5dB
VOUT = 1VP-P
RL = 32Ω
R TO L
L TO R
CROSSTALK vs. FREQUENCYMAX9729 toc18
CROSSTALK (dB)
GAIN = 19.5dB
VOUT = 1VP-P
RL = 32Ω
L TO R
R TO L
MAX9729Stereo Headphone Ampliier with BassMax, Volume Control, and Input Mux
Typical Operating Characteristics (continued)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, CIN = 1μF (1206 case size, X7R dielectric ceramic capacitor), BM_ = 0V, maximum gain setting = 3.5dB, volume attenuation setting = 0dB (total voltage gain = 3.5dB), BassMax disabled. Load con-nected between OUT_ and PGND where speciied. THD+N measurement BW = 22Hz to 22kHz. Both channels loaded and driven in
phase. TA = +25°C, unless otherwise noted.)
CROSSTALK vs. FREQUENCYMAX9729 toc20
FREQUENCY (Hz)
CROSSTALK (dB)
10k1k100
-20100k
GAIN = 19.5dB
VOUT = 1VP-P
RL = 16Ω
L TO R
R TO L
BASS BOOST FREQUENCY
RESPONSEMAX9729 toc21
FREQUENCY (Hz)
GAIN (dB)
10k1k10010100k
NO LOAD
R1 = 47kΩ
DISABLED
R2 = 36kΩ
C4 = 0.068µF
R2 = 22kΩ
C6 = 0.1µF
R2 = 10kΩ
C6 = 0.22µF
OUTPUT SPECTRUM
MAX9729 toc22
FREQUENCY (kHz)
OUTPUT MAGNITUDE (dBV)
VDD = 3V
fIN = 1kHz
RL = 32Ω
OUTPUT POWER vs. CHARGE-PUMP
CAPACITANCE AND LOAD RESISTANCEMAX9729 toc23
LOAD RESISTANCE (Ω)
OUTPUT POWER (mW)2010305060
VDD = 3V
fIN = 1kHz
THD+N = 1%
C1 = C2 = 0.68µF
C1 = C2 = 1µF
OUTPUT POWER vs. CHARGE-PUMP
CAPACITANCE AND LOAD RESISTANCEMAX9729 toc24
LOAD RESISTANCE (Ω)
OUTPUT POWER (mW)2030501060
VDD = 2.4V
fIN = 1kHz
THD+N = 1%
C1 = C2 = 0.68µF
C1 = C2 = 1µF
POWER-UP/POWER-DOWN
WAVEFORMMAX9729 toc25
VOUT_
10mV/div
VDD
2V/div
CROSSTALK vs. FREQUENCYMAX9729 toc19
FREQUENCY (Hz)
CROSSTALK (dB)
10k1k100
-100100k
GAIN = 3.5dB
VOUT = 1VP-P
RL = 16Ω
L TO R
R TO L
EXITING SHUTDOWNMAX9729 toc26
VOUT_
2V/div
VSHDN
2V/div
ENTERING SHUTDOWNMAX9729 toc27
VOUT_
2V/div
VSHDN
2V/div
MAX9729Stereo Headphone Ampliier with BassMax, Volume Control, and Input Mux
Typical Operating Characteristics (continued)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, CIN = 1μF (1206 case size, X7R dielectric ceramic capacitor), BM_ = 0V, maximum gain setting = 3.5dB, volume attenuation setting = 0dB (total voltage gain = 3.5dB), BassMax disabled. Load con-nected between OUT_ and PGND where speciied. THD+N measurement BW = 22Hz to 22kHz. Both channels loaded and driven in
phase. TA = +25°C, unless otherwise noted.)
PINNAMEFUNCTIONINR2Right-Channel Input 2INR3Right-Channel Input 3SGNDSignal Ground. Connect SGND to PGND at a single point on the PCB near the device.
4, 8, 15, N.C.No Connection. Not internally connected.ADDSlave Address Selection Input. Connect ADD to VDD to set the device slave address to 1010001 or to PGND to set the device slave address to 1010000.PVSSCharge-Pump Output. Connect to SVSS. SDASerial Data Input. Connect a pullup resistor greater than 500Ω from SDA to PVDD.C1NCharge-Pump Flying Capacitor Negative Terminal. Connect a 1µF capacitor between C1P and C1N.PGNDPower Ground. Connect PGND to SGND at a single point on the PCB near the device.C1PCharge-Pump Flying Capacitor Positive Terminal. Connect a 1µF capacitor between C1P and C1N.SCLSerial Clock Input. Connect a pullup resistor greater than 500Ω from SCL to PVDD.PVDDCharge-Pump and Logic Power-Supply Input. Bypass PVDD to PGND with a 1µF capacitor and connect
to VDD. PVDD and VDD are internally connected and should each have a 1µF bypass capacitor located
as close to the device as possible.SVSSHeadphone Ampliier Negative Power-Supply Input. Connect to PVSS and bypass with a 1µF capacitor to PGND.
SUPPLY CURRENT
vs. SUPPLY VOLTAGEMAX9729 toc29
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
NO LOAD
INPUTS AC-GROUNDED
SHUTDOWN CURRENT
vs. SUPPLY VOLTAGEMAX9729 toc30
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (µA)
MAX9729 toc28
20ms/div
200mV/div
200mV/div
100mV/div
FADER OPERATIONMAX9729Stereo Headphone Ampliier with BassMax, Volume Control, and Input Mux
Typical Operating Characteristics (continued)
Pin Description
Detailed DescriptionThe MAX9729 stereo headphone amplifier features
Maxim’s DirectDrive architecture, eliminating the large output-coupling capacitors required by conventional sin-gle-supply headphone amplifiers. The MAX9729 consists
of two 52mW Class AB headphone amplifiers, 3:1 stereo input multiplexer/mixer, two adjustable gain preamplifiers,
a dedicated beep amplifier with independent gain control,
hardware/software shutdown control, inverting charge
pump, integrated 32-level volume control, BassMax cir-cuitry, comprehensive click-and-pop suppression cir-cuitry, and an I2C/SMBus-compatible interface (see the
Functional Diagram/Typical Operating Circuit). A negative power supply (PVSS) is created internally by inverting the positive supply (PVDD). Powering the amplifiers from VDD and PVSS increases the dynamic range of the amplifiers to almost twice that of other single-supply amplifiers,
increasing the total available output power.
An I2C/SMBus-compatible interface allows serial com-
munication between the MAX9729 and a microcontroller.
two different values using the ADD input allowing two MAX9729 ICs to share the same bus (see Table 1). The
internal command registers control the shutdown mode of
the MAX9729, select/mix input signal sources, enable the BassMax circuitry, headphone and beep amplifier gains, and set the volume level (see Table 2). The MAX9729’s BassMax circuitry improves audio reproduction by boost-
ing the bass response of the amplifier, compensating for any low-frequency attenuation introduced by the head-
phone. External components set the MAX9729’s overall gain allowing for custom gain settings (see the BassMax
Gain-Setting Components section).
DirectDriveTraditional single-supply headphone amplifiers have their outputs biased about a nominal DC voltage, typi-cally half the supply, for maximum dynamic range. Large coupling capacitors are needed to block this DC
bias from the headphone. Without these capacitors,
a significant amount of DC current flows to the head- phone, resulting in unnecessary power dissipation and
PINNAMEFUNCTIONBMRRight BassMax Input. Connect an external passive network between OUTR and BMR to apply bass
boost to the right-channel output. See the BassMax Gain-Setting Components section. Connect BMR to SGND if BassMax is not used.OUTRRight Headphone OutputOUTLLeft Headphone OutputBMLLeft BassMax Input. Connect an external passive network between OUTL and BML to apply bass boost
to the left-channel output. See the BassMax Gain-Setting Components section. Connect BML to SGND,
if BassMax is not used.BEEP_ENBeep Enable Input. Connect BEEP_EN to PVDD to enable the beep ampliier or to PGND to disable the beep ampliier.SHDNActive-Low Shutdown Input. Drive SHDN low to disable the MAX9729. Connect SHDN to VDD while B7 in command register 0x00 is equal to 1 for normal operation (see Command Registers section).VDDPower-Supply Input. Bypass VDD to PGND with a 1µF capacitor and connect to PVDD. VDD and PVDD are internally connected and should each have a 1µF bypass capacitor located as to close to the device
as possible.BEEPBeep InputINL1Left-Channel Input 1INL2Left-Channel Input 2INL3Left-Channel Input 3INR1Right-Channel Input 1EPExposed Paddle. Connect EP to SVSS or leave unconnected.
MAX9729Stereo Headphone Ampliier with BassMax, Volume Control, and Input Mux
Pin Description (continued)
possible damage to both headphone and headphone amplifier. In addition to the cost and size disadvantages, the DC-blocking capacitors required by conventional headphone amplifiers limit low-frequency response and
can distort the audio signal.
Maxim’s DirectDrive architecture uses a charge pump to create an internal negative supply voltage. This allows
the MAX9729 headphone amplifier outputs to be biased about ground, almost doubling the dynamic range while operating from a single supply (see Figure 1). With no DC
component, there is no need for the large DC-blocking capacitors. Instead of two large (up to 220μF) tantalum capacitors, the MAX9729 charge pump requires only two small 1μF ceramic capacitors, conserving board space, reducing cost, and improving the frequency response of the headphone amplifier. See the Output Power vs. Charge-Pump Capacitance and Load Resistance graph
in the Typical Operating Characteristics for details of the possible capacitor sizes.
Charge PumpThe MAX9729 features a low-noise charge pump. The 610kHz switching frequency is well beyond the audio
range, and does not interfere with the audio signals. This enables the MAX9729 to achieve an SNR of 99dB. The
switch drivers feature a controlled switching speed that minimizes noise generated by turn-on and turn-off tran-sients. Limiting the switching speed of the charge pump also minimizes di/dt noise caused by the parasitic bond
wire and trace inductances.
Click-and-Pop SuppressionIn conventional single-supply headphone amplifiers, the output-coupling capacitor is a major contributor of audible
clicks and pops. The amplifier charges the coupling
capacitor to its output bias voltage at startup. During
shutdown, the capacitor is discharged. The charging and
discharging results in a DC shift across the capacitor,
which appears as an audible transient at the headphone
speaker. Since the MAX9729 headphone amplifier does
not require output-coupling capacitors, no audible tran-
sients occur.
Additionally, the MAX9729 features extensive click-and-pop suppression that eliminates any audible transient sources internal to the device. The Power-Up/Power-
Down Waveform in the Typical Operating Characteristics
shows that there are minimal transients at the output upon
startup or shutdown.
In most applications, the preamplifier driving the MAX9729
coupling capacitor is charged to the preamplifier’s bias voltage through the MAX9729’s input resistor (RIN) during
startup. The resulting shift across the capacitor creates a voltage transient that must settle before the 50ms turn-on time has elapsed. Delay the rise of SHDN by at least 4 time constants (4 x RIN x CIN) relative to the start of the preamplifier to avoid clicks/pops caused by the input filter.
ShutdownThe MAX9729 features a 5μA, low-power shutdown mode
that reduces quiescent current consumption and extends battery life. Shutdown is controlled by the SHDN logic
input or software interface. Driving the SHDN input low disables the drive amplifiers, bias circuitry, charge pump,
and sets the headphone amplifier output resistance to 20kΩ. Similarly, the MAX9729 enters shutdown when bit seven (B7) in the command register, 0x00, is set to 0 (see
the Command Registers section). SHDN and B7 must be
high to enable the MAX9729. The I2C/SMBus interface is
VOUT
VOUT
VDD / 2
GND
VDD
+VDD
GND
-VDD
CONVENTIONAL DRIVER BIASING SCHEME
DirectDrive BIASING SCHEME
VDD
2VDD
Figure 1. Traditional Amplifier Output vs. MAX9729 DirectDrive
Output
MAX9729Stereo Headphone Ampliier with BassMax, Volume Control, and Input Mux
affected when in shutdown. This allows the master device
to write to the MAX9729 while in shutdown.
When a shutdown is activated, either hardware (SHDN pin) or software (I2C register), the volume is smoothly reduced, according to a constant slope ramp. Similarly,
when a shutdown is deactivated, either hardware or soft-ware, the volume is smoothly increased, according to a
constant slope ramp, until the volume programmed in the
register file is reached.
BassMax (Bass Boost)Typical headphones do not have a flat-frequency response. The small physical size of the diaphragm does not allow the headphone speaker to efficiently reproduce low fre-quencies. This physical limitation results in attenuated bass
response. The MAX9729 includes a bass boost feature
that compensates for the headphone’s poor bass response by increasing the amplifier gain at low frequencies.
The DirectDrive output of the MAX9729 has more head-room than typical single-supply headphone amplifiers.
This additional headroom allows boosting the bass fre-
quencies without the output signal clipping.
Program the BassMax gain and cutoff frequency with external components connected between OUT_ and BM_ (see the BassMax Gain-Setting Components section and
the Functional Diagram/Typical Operating Circuit). Use
the I2C-compatible interface to program the command
register to enable/disable the BassMax circuit.
BM_ is connected to the noninverting input of the output amplifier when BassMax is enabled. BM_ is pulled to SGND when BassMax is disabled. The typical application
of the BassMax circuit involves feeding a lowpass- filtered
version of the output signal back to the amplifier. This is
realized using positive feedback from OUT_ to BM_.
Figure 2 shows the connections needed to implement
BassMax.
Maximum Gain ControlThe MAX9729 features eight different programmable maximum gain settings ranging from +3.5dB to +26dB (see Table 8). Bits [2:0] in command register 0x01 control the maximum gain setting (AV_MAX).
Volume ControlThe MAX9729 includes a 32-level volume control that adjusts the total voltage gain of the headphone amplifier according to the values of bits [4:0] in the 0x00 command
register. With BassMax disabled, the total voltage gain of
the MAX9729 is equal to:
AV_TOTAL = AV_MAX − ATTEN(dB)
where AV_TOTAL is the total voltage gain in dB, AV_MAX is the maximum gain setting in dB, and ATTEN is the volume
attenuation in dB.
Tables 5a, 5b, 5c show all the possible volume attenua-tion settings and the resulting AV_TOTAL with BassMax
disabled. Figure 8 shows the volume control transfer func-tion. Mute attenuation is typically better than 100dB when driving a 32Ω load. To perform smooth-sounding volume
changes, step through all intermediate volume settings at a rate of approximately 2ms per step when a volume
change occurs.
Automatic Volume Ramping During Mode Transitions and Input Source SelectionThe MAX9729 implements an automatic volume rampup/
ramp-down function when exiting/entering shutdown and
when selecting different input signal paths with the inter-
nal 3:1 multiplexer. The automatic volume rampup/ ramp-
down function steps through each intermediate volume
setting at a rate of 1.5ms per step allowing for smooth
sounding volume transitions. When exiting/entering shut-
down, the volume ramp-up/rampdown function is imple-
mented regardless of whether the shutdown command is initiated by an I2C command or the SHDN input. When
exiting shutdown, the volume is ramped up to the value stored in register 0x00 (see Table 2). When selecting a
new input signal path with the multiplexer, the MAX9729
first ramps down the volum, selects the new input source,
and then ramps the volume back up to the value stored in register 0x00. This prevents any audible clicks and pops
due to abrupt changes in signal amplitude when selecting
a different input signal source.Figure 2. BassMax External ConnectionsR2
OUT_
BM_
FROM
VOLUME
ATTENUATOR
STAGE
MAX9729BassMax
ENABLE
TO HEADPHONE
SPEAKER
MAX9729Stereo Headphone Ampliier with BassMax, Volume Control, and Input Mux
BEEP InputThe MAX9729 features a BEEP input with eight different attenuation settings (see Table 6). The BEEP input is use-ful for applications requiring the routing of a system alert
signal to the stereo audio path. The attenuation value of the BEEP input is set by bits [7:5] in the 0x01 command register (see Tables 2 and 6). The attenuation settings of the BEEP input are independent of the volume settings stored in register 0x00 (see Table 2). The BEEP input is enabled when BEEP_EN is connected to VDD and disabled when driven low. When BEEP_EN is high, the selected INL_ and INR_ inputs are disconnected from the signal path and the BEEP input signal is routed to both headphone outputs after being attenuated by the value set by bits [7:5] in register 0x01. When BEEP_EN is low, the BEEP input is disconnected from the signal path and the selected INL_ and INR_ inputs are reconnected.
Input Multiplexer/MixerThe MAX9729 includes a stereo 3:1 multiplexer/mixer,
allowing selection and mixing of three different stereo input sources. Bits [6:5] in register 0x00 control the selection/mix-ing of the input signal sources (see Tables 2 and 4). When all three stereo inputs are selected (Bits [6:5] = 11), the stereo signals are summed (mixed) together and connected
to the signal path. The MAX9729 implements the automatic
volume ramping function when an input source change occurs to ensure smooth sounding transitions. Clipping may occur if three high level signals are summed. Reprogram
the preamplifier maximum gain setting to compensate.
Serial InterfaceThe MAX9729 features an I2C/SMBus-compatible 2-wire serial interface consisting of a serial data line (SDA) and a serial clock line (SCL). SDA and SCL facilitate bidirection-
al communication between the MAX9729 and the master at clock rates up to 400kHz. Figure 3 shows the 2-wire
interface timing diagram. The MAX9729 is a transmit/receive slave-only device, relying upon a master device to generate the clock signal. The master device, typically
a microcontroller, initiates data transfer on the bus and generates SCL to permit that transfer.
A master device communicates to the MAX9729 by trans-mitting the slave address with the Read/Write (R/W) bit followed by the data word. Each transmit sequence is framed by a START (S) or REPEATED START (Sr) con-dition and a STOP (P) condition. Each word transmitted over the bus is 8 bits long and is always followed by an
acknowledge or not acknowledge clock pulse.
The MAX9729 SDA line operates as both an input and an open-drain output. A pullup resistor, greater than 500Ω, is required on the SDA bus. The MAX9729 SCL line oper-ates as an input only. A pullup resistor, greater than 500Ω, is required on SCL unless the MAX9729 is operating in a single-master system where the master device has a push-pull SCL output. Series resistors in line with SDA and SCL are optional. Series resistors protect the digital inputs
of the MAX9729 from highvoltage spikes on the bus lines, and minimize crosstalk and undershoot of the bus signals.
Bit TransferOne data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period of the SCL pulse since changes in SDA while SCL is high are control signals (see the START and STOP
Conditions section). SDA and SCL idle high when the
I2C bus is not busy.
SCL
SDA
START
CONDITION
STOP
CONDITION
REPEATED
START
CONDITION
START
CONDITION
tHD, STA
tSU, STA
tHD, STAtSP
tBUF
tSU, STOtLOW
tSU, DAT
tHD, DAT
tHIGHtF
MAX9729Stereo Headphone Ampliier with BassMax, Volume Control, and Input Mux
START and STOP ConditionsSDA and SCL idle high when the bus is not in use. A mas-ter device initiates communication by issuing a START condition. A START condition is a high-to-low transition on SDA with SCL high. A STOP condition is a low-to-high transition on SDA while SCL is high (see Figure 4). A START condition from the master signals the beginning
of a transmission to the MAX9729. The master terminates transmission, and frees the bus, by issuing a STOP con-dition. The bus remains active if a REPEATED START condition is generated instead of a STOP condition.
Early STOP ConditionsThe MAX9729 recognizes a STOP condition at any point during data transmission except if the STOP condition occurs in the same high clock pulse as a START condi-tion. At least one clock pulse must separate any START and STOP conditions.
Slave AddressThe slave address of the MAX9729 is pin programmable using the ADD input to one of two different values (see Table 1). The slave address is defined as the 7 most significant bits (MSBs) of the serial data transmission. The first byte of information sent to the MAX9729 after the START condition must contain the slave address and R/W bit. R/W bit indicates whether the master is writing to or reading from the MAX9729 (R/W = 0 selects the write condition, R/W = 1 selects the read condition). After
receiving the proper address, the MAX9729 issues an ACK by pulling SDA low for one clock cycle.
AcknowledgeThe acknowledge bit (ACK) is the ninth bit attached to any byte transmitted over the serial interface (see Figure 5). ACK is always generated by the receiving device. The
MAX9729 generates an ACK when receiving a slave address or data by pulling SDA low during the ninth clock
period. The SDA line must remain stable and low during
the high period of the ACK clock pulse. When transmit-
ting data, the MAX9729 waits for the receiving device
to generate an ACK. Monitoring ACK allows detection
of unsuccessful data transfers. An unsuccessful data transfer occurs if a receiving device is busy or if a system
fault has occurred. In the event of an unsuccessful data
transfer, the bus master should reattempt communication
at a later time.
Write Data FormatA write to the MAX9729 includes transmission of a START condition, the slave address with the R/W bit set to 0 (see Table 1), one or two command bytes to configure the command registers, and a STOP condition. Figure
6a illustrates the proper data transmission for writing to register 0x00 in a single frame. Figure 6b illustrates the proper data transmission for writing to both registers 0x00 and 0x01 in a single frame.
As shown in Figures 6a and 6b, the MAX9729 com-municates an ACK after each byte of information is received. The MAX9729 latches each command byte into
the respective command registers after an ACK is com-
municated. The master device terminates the write data transmission by issuing a STOP condition.
When writing to register 0x01, register 0x00 must be writ-
ten to first in the same data frame as shown in Figure 6b. In other words, when updating register 0x01 both regis-
ters must be written to.
Table 1. MAX9729 Slave Address with
R/W BitFigure 4. START, STOP, and REPEATED START ConditionsFigure 5. Acknowledge
ADD
MAX9729 SLAVE ADDRESS
R/WA6 (MSB)A5A4A3A2A1A0GND10100000
SCL
SDASrPSCL
START
CONDITION
SDA89
CLOCK PULSE FOR
ACKNOWLEDGMENT
ACKNOWLEDGE
NOT ACKNOWLEDGE
MAX9729Stereo Headphone Ampliier with BassMax, Volume Control, and Input Mux
