MAX9597CTI+ ,Low-Power Audio/Video Interface for Single SCART ConnectorsBlock DiagramV V V12 ID AUD12V 3.3V 3.3VMAX9597STB CHIP2I C INTERFACE2I C AND REGISTERSµCRGB, Y/C, ..
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MAX9600EUP+ ,Dual ECL and Dual/Quad PECL, 500ps, Ultra-High-Speed Comparatorsapplications where high-fidelity track-♦ -1.2V to +4V Input Range with +6V/-4.2V Suppliesing of nar ..
MAX9601 ,Dual ECL and Dual/Quad PECL, 500ps, Ultra-High-Speed ComparatorsApplicationsDual PECL OutputVLSI and High-Speed Memory ATEComparator with LatchMAX9601EUP 20 TSSOPH ..
MAX9601EUP ,Dual ECL and Dual/Quad PECL / 500ps / Ultra-High-Speed ComparatorsApplicationsDual PECL OutputVLSI and High-Speed Memory ATEComparator with LatchMAX9601EUP 20 TSSOPH ..
MAX9601EUP+ ,Dual ECL and Dual/Quad PECL, 500ps, Ultra-High-Speed ComparatorsApplicationsDual PECL OutputVLSI and High-Speed Memory ATEComparator with LatchMAX9601EUP 20 TSSOPH ..
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MB89163 ,8-bit Proprietary MicrocontrollerFUJITSU SEMICONDUCTORDS07-12405-2EDATA SHEET8-bit Proprietary MicrocontrollerCMOS2F MC-8L MB89160/1 ..
MB89163 ,8-bit Proprietary MicrocontrollerFUJITSU SEMICONDUCTORDS07-12405-2EDATA SHEET8-bit Proprietary MicrocontrollerCMOS2F MC-8L MB89160/1 ..
MAX9597CTI+
Low-Power Audio/Video Interface for Single SCART Connectors
General DescriptionThe MAX9597 single SCART interface routes audio and
video signals between a set-top box decoder chip and
an external SCART connector under I2C control.
Operating from a 3.3V supply and a 12V supply, the
MAX9597 consumes 53mW during quiescent operation
and 254mW during average operation when driving
typical signals into typical loads.
The MAX9597 audio section contains left and right audio
paths with an independent operational amplifier at the
inputs. The DirectDrive®output amplifiers create a
2VRMSfull-scale audio signal biased around ground,
eliminating the need for bulky output capacitors and
reducing click-and-pop noise. The zero-cross detection
circuitry also further reduces clicks and pops by
enabling audio sources to switch only during a zero-
crossing.
The MAX9597 video section contains 4 channels of
video filter amplifiers. The standard-definition video sig-
nals from the set-top box decoder chip are lowpass fil-
tered to remove out-of-bandwidth artifacts. The
MAX9597 also supports slow-switching and fast-switch-
ing signals.
The MAX9597 is available in a compact 28-pin thin
QFN package and is specified over the 0°C to +70°C
commercial temperature range.
Features53mW Quiescent Power Consumption5µW Shutdown ConsumptionAudio Operational Amplifiers to Create Input
FiltersClickless/Popless, DirectDrive AudioVideo Reconstruction Filter with 10MHz Passband
and 43dB Attenuation at 27MHz3.3V and 12V Supply Voltages
MAX9597
Low-Power Audio/Video Interface
for Single SCART Connectors19-4159; Rev 1; 10/08
EVALUATION KIT
AVAILABLE
Ordering Information+Denotes a lead-free/RoHS-compliant package.
*EP = Exposed pad.
PARTTEMP RANGEPIN-PACKAGEMAX9597CTI+0°C to +70°C28 TQFN-EP*
I2C INTERFACE
AND REGISTERS
MAX9597
VIDEO FILTERS
AUDIO
WITH DirectDrive
OUTPUTS
SLOW SWITCHING
FAST SWITCHING
CHARGE PUMP
V12VAUDVID
12V3.3V3.3VGND
VIDEO
ENCODER
STEREO
AUDIO
DAC
RGB, Y/C, CVBS
SINGLE OR
DIFFERENTIAL
STEREO AUDIO
STB CHIP
I2C
RGB, Y/C, CVBS
L/R AUDIO
FAST AND SLOW SWITCHING
SCART
System Block Diagram
ApplicationsSet-Top Boxes
AV Receivers
TVs
DVD Players
DirectDrive is a registered trademark of Maxim Integrated
Products, Inc.
MAX9597
Low-Power Audio/Video Interface
for Single SCART Connectors
ELECTRICAL CHARACTERISTICS(VVID= VAUD= 3.3V, V12= 12V, GND = EP = 0, no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSVideo Supply Voltage RangeVVIDInferred from video PSRR test at 3.0V and
3.6V3.03.33.6V
Audio Supply Voltage RangeVAUDInferred from audio PSRR tests at 3.0V and
3.6V3.03.33.6V
Slow-Switching Supply Voltage
RangeV12Inferred from slow-switching levels11.41212.6V
Normal operation, all video output
amplifiers are enabled1320mAVVID Quiescent Supply CurrentIVID_Q
Shutdown110µA
Normal operation34.1mAVAUD Quiescent Supply CurrentIAUD_QShutdown0.0110µA
Normal operation1.5100V12 Quiescent Supply CurrentI12_QShutdown0.110µA
VIDEO CHARACTERISTICS
DC-COUPLED INPUTVVID = 3V1.15
VVID = 3.135V1.2Input Voltage RangeVIN
RL = 75Ω to GND or
150Ω to VVID/2,
inferred from gain testVVID = 3.3V1.3
VP-P
Input CurrentIINVIN = GND23µA
Input ResistanceRIN300kΩ
AC-COUPLED INPUTSync-Tip Clamp LevelVCLPSync-tip clamp-506.1mV
Sync Crush
Sync-tip clamp; percentage reduction in
sync pulse (0.3VP-P); guaranteed by input
clamping current measurement
Input Clamping CurrentSync-tip clamp23µA
ABSOLUTE MAXIMUM RATINGS(All voltages referenced to GND, unless otherwise noted.)
VVID..........................................................................-0.3V to +4V
V12to EP ................................................................-0.3V to +14V
VAUDto EP...............................................................-0.3V to +4V
EP to GND.............................................................-0.1V to +0.1V
All Video Inputs .......................................................-0.3V to +4V
All Audio Inputs to EP.............................(VEP- 1)V to (VEP+ 1)V
SDA, SCL, DEV_ADDR ............................................-0.3V to +4V
TV_SS_OUT.................................................-0.3V to (V12+ 0.3V)
Current
All Video/Audio Inputs..................................................±20mA
C1P, C1N, CPVSS........................................................±50mA
Output Short-Circuit Current Duration
All Video Outputs, TV_FS_OUT to VVID, GND........Continuous
Audio Outputs to VAUD, EP....................................Continuous
TV_SS_OUT to V12, EP...........................................Continuous
Continuous Power Dissipation (TA= +70°C)
28-Pin Thin QFN
(derate 21.3mW/°C above +70°C)...........................1702mW
Operating Temperature Range ..............................0°C to +70°C
Junction Temperature .....................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
MAX9597
Low-Power Audio/Video Interface
for Single SCART Connectors
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSMax Input Source Resistance300Ω
Bias VoltageVBIASBias circuit0.570.60.63V
Input ResistanceBias circuit10kΩ
DC CHARACTERISTICSVVID = 3V,
VIN = VCLP to
(VCLP + 1.15V)
VVID = 3.135V,
VIN = VCLP to
(VCLP + 1.2V)
VVID = 3V,
VIN = (VBIAS - 0.575V)
to (VBIAS + 0.575V)
DC Voltage GainAV
RL = 75Ω
to GND
RL = 150Ω
to VVID/2
VVID = 3.135V
VIN = (VBIAS - 0.6V)
to (VBIAS + 0.6V)
V/V
DC Gain MismatchGuaranteed by DC voltage gain-2+2%
Sync-tip clamp0.20.300.4Output LevelBias circuit1.381.51.62V
Sync-tip clamp, measured at
output, VVID = 3V, VIN = VCLP
to (VCLP + 1.15V), RL = 75Ω
to GND or RL = 150Ω to
VVID/2
Measured at output, VVID =
3.135V, VIN = VCLP to (VCLP
+ 1.2V), RL = 75Ω to GND or
RL = 150Ω to VVID/2
Bias circuit, measured at
output, VVID = 3V, VIN =
(VBIAS - 0.575V) to (VBIAS +
0.575V), RL = 75Ω to GND or
RL = 150Ω to VVID/2
Output Voltage Swing
Guaranteed
by DC
voltage gain
Measured at output, VVID =
3.135V, VIN = (VBIAS - 0.6V)
to (VBIAS + 0.6V), RL = 75Ω
to GND or RL = 150Ω to
VVID/2
VP-P
Output Short-Circuit Current100mA
Output Leakage CurrentOutput disabled0.0210µA
Power-Supply Rejection Ratio3.0V ≤ VVID ≤ 3.6V5075dB
ELECTRICAL CHARACTERISTICS (continued)(VVID= VAUD= 3.3V, V12= 12V, GND = EP = 0, no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at= +25°C.) (Note 1)
MAX9597
Low-Power Audio/Video Interface
for Single SCART Connectors
ELECTRICAL CHARACTERISTICS (continued)(VVID= VAUD= 3.3V, V12= 12V, GND = EP = 0, no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
AC CHARACTERISTICSFilter Passband FlatnessVOUT = 2VP-P, f = 100kHz to 10MHz1dB
f = 11MHz3
f = 27MHz43Filter Attenuation
VOUT = 2VP-P,
attenuation is
referred to 100kHzf = 54MHz63
Differential GainDG5-step modulated staircase, f = 4.43MHz0.2%
Differential PhaseDP5-step modulated staircase, f = 4.43MHz0.3Degrees
2T Pulse-to-Bar K Rating
2T = 200ns; bar time is 18µs; the beginning
2.5% and the ending 2.5% of the bar time is
ignored
0.5K%
2T Pulse Response2T = 200ns0.5K%
2T Bar Response
2T = 200ns; bar time is 18µs; the beginning
2.5% and the ending 2.5% of the bar time is
ignored
0.5K%
Nonlinearity5-step staircase0.5%
Group Delay Distortion100kHz ≤ f ≤ 5MHz, outputs are 2VP-P3.5ns
Peak Signal to RMS Noise100kHz ≤ f ≤ 5MHz60dB
Power-Supply Rejection Ratiof = 100kHz, 100mVP-P47dB
Output Impedancef = 5MHz5.5Ω
Video Crosstalkf = 4.43MHz-68.5dB
AUDIO CHARACTERISTICS OUTPUT AMPLIFIER (Note 2)Voltage Gain3.9544.05V/V
Gain Mismatch-1.5+1.5%
Flatnessf = 20Hz to 20kHz, 0.25VRMS input0.01dB
Frequency Bandwidth0.25VRMS input, frequency where output is
-3dB referenced to 1kHz205kHz
Capacitive DriveNo sustained oscillations, 75Ω series
resistor on output300pF
Input Signal Amplitudef = 1kHz, THD < 1%0.5VRMS
Output DC LevelNo input signal, VIN = 0V-3+3mV75110Power-Supply Rejection Ratiof = 1kHz91dB
Signal-to-Noise Ratiof = 1kHz, 0.25VRMS input, 20Hz to 20kHz97dB
0.25VRMS input0.0011Total Harmonic Distortion Plus
Noise
RL = 3.33kΩ,
f = 1kHz0.5VRMS input0.0021%
Output Impedancef = 1kHz0.28Ω
Mute Suppressionf = 1kHz, 0.25VRMS input101dB
Audio Crosstalkf = 1kHz, 0.25VRMS input100dB
MAX9597
Low-Power Audio/Video Interface
for Single SCART Connectors
ELECTRICAL CHARACTERISTICS (continued)(VVID= VAUD= 3.3V, V12= 12V, GND = EP = 0, no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
VIDEO TO AUDIO INTERACTIONVideo input: f = 15kHz, 1VP-P signal100CrosstalkAudio input: f = 15kHz, 0.1VRMS signal102dB
INPUT AMPLIFIER OPEN-LOOP CHARACTERISTICSTA = +25°C25100Input Offset VoltageVOSVCM = 0VTA = 0°C to +70°C225µV
Input Bias CurrentIBVCM = 0V100550nA
Input Offset CurrentIOSVCM = 0V1.530nA
Common-Mode Input Voltage
RangeVCMInferred from CMRR test-0.707+0.707V
Common-Mode Rejection RatioCMRR80100dB
Power-Supply Rejection RatioPSRRVCM = 0V90125dB
Large-Signal Voltage GainAVOLVCM = 0V, -0.8V ≤ VOUT ≤ +0.8V6080dB
Output Voltage SwingVOUTRL = 124Ω, inferred from AVOL test1.6VP-P
Gain-Bandwidth ProductGBWP8.25MHz
Slew RateSR1.24V/µs
Input Voltage-Noise DensityVNf = 1kHz13.5nV/√Hz
Input Current-Noise DensityINf = 1kHz0.2pA/√Hz
Capacitive Load StabilityAVCL = 1V/V, no sustained oscillation20pF
CHARGE PUMPSwitching Frequency580kHz
FAST SWITCHINGOutput Low VoltageIOL = 0.5mA0.0030.1V
Output High VoltageIOH = 0.5mAVVID -
VVID -
0.003V
Output Resistance5.5Ω
Rise TimeRL = 143Ω to GND2ns
Fall TimeRL = 143Ω to GND2ns
SLOW SWITCHINGOutput Low Voltage10kΩ to EP, 11.4V ≤ V12 ≤ 12.6V1.5V
Output Medium Voltage10kΩ to EP, 11.4V ≤ V12 ≤ 12.6V56.5V
Output High Voltage10kΩ to EP, 11.4V ≤ V12 ≤ 12.6V10V
Input Current-1+1µA
DIGITAL INTERFACE (SDA, SCL)Input High VoltageVIH0.7 x
VVIDV
MAX9597
Low-Power Audio/Video Interface
for Single SCART Connectors
ELECTRICAL CHARACTERISTICS (continued)(VVID= VAUD= 3.3V, V12= 12V, GND = EP = 0, no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSInput Low VoltageVIL0.3 x
VVIDV
Input HysteresisVHYS0.05 x
VVIDV
Input Leakage CurrentIIH, IILSCL and SDA have 40kΩ pullup resistors to
VVID-1+1µA
Input Capacitance10pF
Input Current
VVIDMAX = 3.6V
0.1VVID < SDA < 0.9VVIDMAX
0.1VVID < SCL < 0.9VVIDMAX
I/O pins of fast-mode devices must not
obstruct the SDA and SCL lines if VVID is
switched off
-10+10µA
Output Low Voltage SDAVOLISINK = 6mA0.4V
Serial-Clock FrequencyfSCL0400kHz
Bus Free Time Between a STOP
and a START ConditiontBUF1.3µs
Hold Time, (REPEATED) START
ConditiontHD, STA0.6µs
Low Period of the SCL ClocktLOW1.3µs
High Period of the SCL ClocktHIGH0.6µs
Setup Time for a REPEATED
START ConditiontSU, STA0.6µs
Data Hold TimetHD, DAT
A master device must provide a hold time of
at least 300ns for the SDA signal (referred
to VIL of the SCL signal) to bridge the
undefined region of SCL’s falling edge0.9µs
Data Setup TimetHD, DAT100ns
Fall Time of SDA TransmittingtF
CB = total capacitance of one bus line in pF
< 400pF; tR and tF measured between
0.3VVID and 0.7VVID (CB is in pF)
250ns
Setup Time for STOP ConditiontSU, STO0.6µs
Pulse Width of Spike SuppressedtSPInput filters on the SDA and SCL inputs
suppress noise spikes less than 50ns050ns
OTHER DIGITAL I/ODEV_ADDR Low Level0.3 x
VVIDV
DEV_ADDR High Level0.7 x
VVIDV
DEV_ADDR Input Current-1+1µA
Note 1:All devices are 100% production tested at TA= +25°C and are guaranteed by design for TA= 0°C to +70°C as specified.
Note 2:Input operational amplifier configured in voltage follower configuration, unless otherwise noted.
MAX9597
Low-Power Audio/Video Interface
for Single SCART Connectors
VIDEO SMALL-SIGNAL GAIN
vs. FREQUENCYMAX9597 toc01
FREQUENCY (Hz)
GAIN (dB)
10M1M
100k100M
VOUT = 100mVP-P
VIDEO SMALL-SIGNAL GAIN FLATNESS
vs. FREQUENCYMAX9597 toc02
GAIN (dB)
10M1M100k100M
FREQUENCY (Hz)
VOUT = 100mVP-P
VIDEO LARGE-SIGNAL GAIN
vs. FREQUENCYMAX9597 toc03
GAIN (dB)
10M1M100k100M
FREQUENCY (Hz)
VOUT = 2VP-P
VIDEO LARGE-SIGNAL GAIN FLATNESS
vs. FREQUENCYMAX9597 toc04
GAIN (dB)
10M1M100k100M
FREQUENCY (Hz)
VOUT = 2VP-P
VIDEO CROSSTALK vs. FREQUENCYMAX9597 toc05
CROSSTALK (dB)
10M1M100k100M
FREQUENCY (Hz)
VOUT = 2VP-P
VIDEO GROUP DELAY DISTORTION
vs. FREQUENCYMAX9597 toc06
GROUP DELAY (ns)
10M1M100k100M
FREQUENCY (Hz)
VOUT = 2VP-P
VIDEO POWER-SUPPLY REJECTION RATIO
vs. FREQUENCYMAX9597 toc07
PSRR (dB)
10M1M100k100M
FREQUENCY (Hz)
VOLTAGE GAIN
vs.TEMPERATURE
MAX9597 toc08
TEMPERATURE (°C)
VOLTAGE GAIN (V/V)
VIDEO OUTPUT VOLTAGE
vs. INPUT VOLTAGEMAX9597 toc09
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
Typical Operating Characteristics
(VVID= VAUD= 3.3V, V12= 12V, GND = EP = 0, video load is 150Ωto GND, audio load is 10kΩto GND, TA= +25°C, unless other-
wise noted.)
MAX9597
Low-Power Audio/Video Interface
for Single SCART Connectors
Typical Operating Characteristics (continued)(VVID= VAUD= 3.3V, V12= 12V, GND = EP = 0, video load is 150Ωto GND, audio load is 10kΩto GND, TA= +25°C, unless other-
wise noted.)
DIFFERENTIAL GAIN AND PHASEMAX9597 toc10
DIFFERENTIAL PHASE (deg)103245
DIFFERENTIAL GAIN (%)
100ns/div
2T RESPONSEINPUT
200mV/div
MAX9597 toc11
OUTPUT
400mV/div
400ns/div
12.5T RESPONSEINPUT
200mV/div
MAX9597 toc12
OUTPUT
400mV/div
10µs/div
PAL VIDEO TEST SIGNALINPUT
0.5V/div
MAX9597 toc13
OUTPUT
1V/div
VIDEO OUTPUT BIAS VOLTAGE
vs. TEMPERATURE
MAX9597 toc14
TEMPERATURE (°C)
VIDEO OUTPUT BIAS VOLTAGE (V)
AUDIO LARGE-SIGNAL BANDWIDTH
vs. FREQUENCY
MAX9597 toc15
FREQUENCY (Hz)
GAIN (dB)
100k10k1k100
-201M
VIN = 0.25VRMS
RL = 10kΩ
AUDIO CROSSTALK
vs. FREQUENCYMAX9597 toc16
FREQUENCY (Hz)
CROSSTALK (dB)
10k1k
100100k
VIN = 0.25VRMS
RL = 10kΩ
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCYMAX9597 toc17
FREQUENCY (Hz)
THD+N (%)
10k1k100
0.0001100k
RL = 3.3kΩ
VIN = 0.25VRMS
VIN = 0.5VRMS
VAUD POWER-SUPPLY REJECTION RATIO
(INPUT REFERRED) vs. FREQUENCYMAX9597 toc18
FREQUENCY (Hz)
PSRR (dB)
10k1k100
-120100k
VAUD = 3.3V + 100mVP-P
MAX9597
Low-Power Audio/Video Interface
for Single SCART ConnectorsVVID QUIESCENT SUPPLY CURRENT
vs. TEMPERATURE
MAX9597 toc19
TEMPERATURE (°C)
QUIESCENT SUPPLY CURRENT (mA)
V12 QUIESCENT SUPPLY CURRENT
vs. TEMPERATURE
MAX9597 toc21
TEMPERATURE (°C)
QUIESCENT SUPPLY CURRENT (
INPUT-AMPLIFIER INPUT OFFSET
VOLTAGEvs. TEMPERATURE
MAX9597 toc22
TEMPERATURE (°C)
INPUT OFFSET VOLTAGE (mV)
INPUT-AMPLIFIER INPUT BIAS CURRENT
vs. TEMPERATURE
MAX9597 toc23
TEMPERATURE (°C)
INPUT BIAS CURRENT (
INPUT-AMPLIFIER GAIN AND PHASE
vs. FREQUENCYMAX9597 toc24
GAIN (dB)
PHASE (deg)
10M1M100k10k
-60100M
AV = +100V/V
VIN = 10mVP-P
RLOAD = OPEN
CL = 0pF/22pF
PHASE MARGIN (CL = 0pF) = 60°
PHASE MARGIN (CL = 22pF) = 44°
GAIN
CL = OpF
CL = 22pF
PHASE
Typical Operating Characteristics (continued)
(VVID= VAUD= 3.3V, V12= 12V, GND = EP = 0, video load is 150Ωto GND, audio load is 10kΩto GND, TA= +25°C, unless other-
wise noted.)
INPUT-AMPLIFIER TOTAL HARMONIC
DISTORTION PLUS NOISE vs. FREQUENCYMAX9597 toc25
THD+N (%)
10010k1k
0.0001100k
VIN = 0.25VRMS
VIN = 0.5VRMS
UNITY GAIN
RL = OPEN
VAUD QUIESCENT SUPPLY CURRENT
vs. TEMPERATURE
MAX9597 toc20
TEMPERATURE (°C)
QUIESCENT SUPPLY CURRENT (mA)
MAX9597
Low-Power Audio/Video Interface
for Single SCART Connectors
Typical Operating Characteristics (continued)(VVID= VAUD= 3.3V, V12= 12V, GND = EP = 0, video load is 150Ωto GND, audio load is 10kΩto GND, TA= +25°C, unless other-
wise noted.)OUTPUT
50mV/div
INPUT-AMPLIFIER SMALL-SIGNAL
TRANSIENT RESPONSEMAX9597 toc26
200ns/div
UNITY GAIN
RL = OPEN
INPUT
50mV/divOUTPUT
50mV/div
INPUT-AMPLIFIER SMALL-SIGNAL
TRANSIENT RESPONSEMAX9597 toc27
200ns/div
UNITY GAIN
RL = 124Ω
INPUT
50mV/divOUTPUT
500mV/div
INPUT-AMPLIFIER LARGE-SIGNAL
TRANSIENT RESPONSEMAX9597 toc28
1µs/div
UNITY GAIN
RL = OPEN
INPUT
500mV/divOUTPUT
500mV/div
INPUT-AMPLIFIER LARGE-SIGNAL
TRANSIENT RESPONSEMAX9597 toc29
1µs/div
UNITY GAIN
RL = 124Ω
INPUT
500mV/div
MAX9597
Low-Power Audio/Video Interface
for Single SCART Connectors
Pin Description
PINNAMEFUNCTION1VAUDAudio Supply. Connect to a 3.3V supply. Bypass with a 10µF aluminum electrolytic capacitor in
parallel with a 0.1µF ceramic capacitor to EP.C1PCharge-Pump Flying Capacitor Positive Terminal. Connect a 1µF capacitor from C1P to C1N.C1NCharge-Pump Flying Capacitor Negative Terminal. Connect a 1µF capacitor from C1P to C1N.CPVSSCharge-Pump Negative Power Supply. Bypass with a 10µF aluminum electrolytic capacitor in
parallel with a 1µF ceramic capacitor to EP.DEV_ADDRDevice Address Set Input. Connect DEV_ADDR to GND, VVID, SDA, or SCL. See Table 3.SDABidirectional, I2C Data I/O. Output is open drain and tolerates up to 3.6V.SCLI2C Clock InputENC_B_INEncoder Blue Video InputENC_G_INEncoder Green Video InputENC_R/C_INEncoder Red/Chroma Video InputENC_CVBS_INEncoder Composite Video InputTV_CVBS_OUTTV SCART Composite Video Output. The sync tip is biased at 0.3V.VVIDVideo and Digital Supply. Connect to a +3.3V supply. Bypass with a parallel 1µF and 0.1µF
ceramic capacitor to GND. VVID also serves as a digital supply for the I2C interface.TV_FS_OUTTV SCART Fast-Switching Logic Output. This signal drives a back-terminated, 75Ω transmission
line.GNDVideo GroundTV_R/C_OUTTV SCART Red/Chroma Video Output. The black level of the red signal is set to 0.3V and the
blank level of the chroma signal is 1.5V.TV_G_OUTTV SCART Green Video Output. The black level of the green signal is set to 0.3V.TV_B_OUTTV SCART Blue Video Output. The black level of the blue signal is set to 0.3V.V12+12V Supply. Bypass V12 with a 0.1µF capacitor to EP.TV_SS_OUTTV SCART Slow-Switch Signal OutputTV_OUTLTV SCART Left-Channel Audio OutputENC_INL+Left Input-Amplifier Noninverting TerminalENC_INL-Left Input-Amplifier Inverting TerminalENC_INLOUTLeft Input-Amplifier OutputENC_INROUTRight Input-Amplifier OutputENC_INR-Right Input-Amplifier Inverting TerminalENC_INR+Right Input-Amplifier Noninverting TerminalTV_OUTRTV SCART Right-Channel Audio Output
—EPExposed Pad. The exposed pad is the internal ground for the audio amplifiers and charge pump.
A low-impedance connection to EP is required for proper isolation.
MAX9597
Low-Power Audio/Video Interface
for Single SCART Connectors
Detailed DescriptionThe MAX9597 represents Maxim’s third generation of
SCART audio/video (A/V) switches. Under I2C control,
these devices route audio, video, and control informa-
tion between the set-top box decoder chip and a
SCART connector. The audio signals are left audio and
right audio. The video signals are composite video with
blanking and sync (CVBS) and component video (red,
green, blue). S-video (Y/C) can be transported across
the SCART interface if CVBS is reassigned to luma (Y)
and red is reassigned to chroma (C). Support for
S-video is optional. The slow-switch signal and the fast-
switch signal carry control information. The slow-switch
signal is a 12V, trilevel signal that indicates whether the
picture aspect ratio is 4:3, 16:9, or causes the television
to use an internal A/V source, such as an antenna. The
fast-switch signal indicates whether the television
should display CVBS or RGB signals.
CVBS, left audio, and right audio are full duplex. All the
other signals are half duplex. Therefore, one device on
the link must be designated as the transmitter, and the
other device must be designated as the receiver.
The low power consumption of the MAX9597 enables
the creation of lower power set-top boxes, televisions,
and DVD players. Unlike competing SCART ICs, the
audio and video circuits of the MAX9597 operate entirely
from 3.3V rather than from 5V and 12V. Only the slow-
switch circuit of the MAX9597 requires a 12V supply.
The MAX9597 features DirectDrive audio circuitry to
eliminate click-and-pop noise. With DirectDrive, the DC
bias of the audio line outputs is always at ground when
the MAX9597 is being powered up or powered down.
Conventional audio line output drivers that operate from
a single supply require series AC-coupling capacitors.
During power-up, the DC bias on the AC-coupling
capacitor moves from ground to a positive voltage, and
during power-down, the opposite occurs. The changing
DC bias usually causes an audible transient.
Audio SectionThe audio circuit consists of a left and right audio path,
each with an independent operational amplifier fol-
lowed by a gain-of-4 amplifier. The encoder (stereo
audio DAC) is the input source, and the output goes to
the TV SCART connector. See Figure 1.
ZERO-CROSS
DETECTOR
ENC_INL+
TV_OUTL
CHARGE
PUMP
C1P
C1N
CPVSS
ENC_INL-
ENC_INLOUT
ZERO-CROSS
DETECTOR
ENC_INR+
TV_OUTR
ENC_INR-
ENC_INROUT
VAUD
VAUD
VAUD
AV = 4V/V
AV = 4V/V
INPUT
OP AMP
INPUT
OP AMP
MAX9597
MAX9597
Low-Power Audio/Video Interface
for Single SCART ConnectorsThe full-scale output of the independent operational
amplifiers is 0.5VRMS. The closed-loop gain of the oper-
ational amplifier circuit should be designed such that
the resulting full-scale output is 0.5VRMS. The fixed,
gain-of-4 amplifiers that follow the independent opera-
tional amplifiers amplify the 0.5VRMSto 2VRMS, which
complies with the SCART standard.
An integrated charge pump inverts the +3.3V supply
(VAUD) to create a -3.3V supply (CPVSS), enabling the
audio circuit to operate from bipolar supplies. The
audio signal from the beginning to the end of the signal
path is always biased at ground.
Clickless Muting and UnmutingThe TV audio channel incorporates a zero-crossing
detect (ZCD) circuit that minimizes click noise due to
abrupt signal level changes that occur when entering
or coming out of a mute condition at an arbitrary
moment.
To implement the zero-crossing function when switch-
ing audio signals, set ZCD (register 00h, bit 6) high.
The MAX9597 switches the signal in or out of mute at
the next zero crossing after the mute or unmute request
occurs. See Table 8.
Audio OutputsThe MAX9597 audio output amplifiers feature Maxim’s
DirectDrive architecture, eliminating the need for output-
coupling capacitors required by conventional single-
supply audio line drivers. Conventional single-supply
audio line drivers have their outputs biased about a
nominal DC voltage (typically half the supply) for maxi-
mum dynamic range. Large coupling capacitors are
needed to block this DC bias. Clicks and pops are cre-
ated when the coupling capacitors are charged during
power-up and discharged during power-down.
An internal charge pump inverts the positive supply
(VAUD), creating a negative supply (CPVSS). The audio
output amplifiers operate from the bipolar supplies with
the outputs biased about audio ground (Figure 2). The
benefit of this audio ground bias is that the amplifier
outputs do not have a DC component. The DC-blocking
capacitors required with conventional audio line drivers
are unnecessary, conserving board space, reducing
system cost, and improving frequency response.
The MAX9597 features a low-noise charge pump that
requires only two small ceramic capacitors. The
580kHz switching frequency is well beyond the audio
range and does not interfere with audio signals. The
switch drivers feature a controlled switching speed that
minimizes noise generated by turn-on and turn-off tran-
sients. The di/dt noise caused by the parasitic bond
wire and trace inductance is minimized by limiting the
switching speed of the charge pump.
The SCART standard specifies 2VRMSas the full-scale
for audio signals. As the audio circuits process
0.5VRMSfull-scale audio signals internal to the
MAX9597, the gain-of-4 output amplifiers restore the
audio signals to a full scale of 2VRMS.
Video SectionThe video circuit routes different video formats between
the set-top box decoder and the TV SCART connector.
It also routes slow-switch and fast-switch control infor-
mation as shown in Figure 3.
Video InputsWhether the incoming video input signal is AC-coupled
or DC-coupled into the MAX9597 depends upon the ori-
gin, format, and voltage range of the video signal. Table
1 below shows the recommended connections. Always
AC-couple an external video signal through a 0.1µF
capacitor because its voltage range is not well defined
(see the Typical Application Circuit). For example, the
+VDD
-VDD
GNDVOUT
CONVENTIONAL DRIVER-BIASING SCHEME
DirectDrive BIASING SCHEME
VDD/2
VDD
GND
VOUT
Figure 2. Conventional Driver Output Waveform vs. MAX9597
Output Waveform
MAX9597
Low-Power Audio/Video Interface
for Single SCART Connectorsvideo transmitter circuit might have a different ground
than the video receiver, thereby level shifting the DC
bias. The 50Hz power line hum might cause the video
signal to change DC bias slowly.
Internal video signals that are between 0V and 1V can
be DC-coupled. Most video DACs generate video sig-
nals between 0V and 1V because the video DAC
sources current into a ground-referenced resistor. For
the minority of video DACs that generate video signals
between 2.3V and 3.3V because the video DAC sinks
current from a VDD-referenced resistor, AC-couple the
video signal to the MAX9597.
The MAX9597 restores the DC level of incoming,
AC-coupled video signals with either transparent sync-
tip clamps or bias circuits. When using an AC-coupled
input, the transparent sync-tip clamp automatically
clamps the input signal minimum to ground, preventing it
from going lower. A small current of 2µA pulls down on
the input to prevent an AC-coupled signal from drifting
outside the input range of the part. The transparent sync-
tip clamp is used with CVBS, RGB, and luma signals.
The transparent sync-tip clamp is transparent when the
incoming video signal is DC-coupled and at ground or
above. Under such conditions, the clamp never acti-
vates. Therefore, the outputs of video DACs that gener-
ate signals between 0V and 1V can be directly
connected to the MAX9597 inputs.
The bias circuit accepts AC-coupled chroma, which is
a subcarrier with the color information modulated onto
it. The bias voltage of the bias circuits is around
600mV.
ENC_R/C_IN can receive either a red video signal or a
chroma video signal. Set the input configuration by writ-
TV_CVBS_OUT
CLAMP/BIASENC_R/C_IN
CLAMPENC_CVBS_IN
TV_R/C_OUT
ENC_G_INTV_G_OUT
ENC_B_INTV_B_OUT
VVID
GND
TV_FS_OUT
V12
+6V
CLAMP
CLAMP
TV_SS_OUT
AV = 2V/V
AV = 2V/V
AV = 2V/V
AV = 2V/V
AV = 1V/V
AV = 1V/V
MAX9597
LPF
LPF
LPF
LPF
Figure 3. MAX9597 Video Section Function Diagram
MAX9597
Low-Power Audio/Video Interface
for Single SCART Connectors
Video Reconstruction FilterThe video DAC outputs of the set-top box decoder chip
need to be lowpass-filtered to reject the out-of-band
noise. The MAX9597 integrates sixth-order, Butterworth
filters. The filter passband (±1dB) is typically 10MHz,
and the attenuation at 27MHz is 43dB. The filters are
suited for standard-definition video.
Video OutputsThe video output amplifiers can both source and sink
load current, allowing output loads to be DC- or
AC-coupled. The amplifier output stage needs approxi-
mately 300mV of headroom from either supply rail.
If the supply voltage is greater than 3.135V (5% below
a 3.3V supply), each amplifier can drive two DC-cou-
pled video loads to ground. If the supply is less than
3.135V, each amplifier can drive only one DC-coupled
or AC-coupled video load.
The SCART standard allows for video signals to have a
superimposed DC component within 0V and 2V.
Therefore, most video signals are DC-coupled at the out-
put. In the unlikely event that the video signal needs to
be AC-coupled, the coupling capacitors should be
220µF or greater to keep the highpass filter formed by
the 37.5Ωequivalent resistance of the video transmis-
sion line to a corner frequency of 4.8Hz or below to keep
it well below the 25Hz frame rate of the PAL standard.
The video outputs can be enabled or disabled by bits 1
to 5 of register 0Dh. See Table 11.
Slow SwitchingThe MAX9597 supports the IEC 933-1, Amendment 1,
trilevel slow-switching standard that selects the aspect
ratio for the display (TV). Under I2C control, the
MAX9597 sets the slow-switching output voltage level.
Table 2 shows the valid input levels of the slow-switch-
ing signal and the corresponding operating modes of
the display device.
One port is available for slow-switching signals for the
TV. The slow-switching outputs can be set to a logic
level or high impedance by writing to bit 0 and 1 of reg-
ister 07h. See Table 9.
VIDEO ORIGINFORMATVOLTAGE RANGE
(V)COUPLINGINPUT CIRCUIT CONFIGURATIONExternalCVBSUnknownACTransparent sync-tip clamp
ExternalRGBUnknownACTransparent sync-tip clamp
ExternalYUnknownACTransparent sync-tip clamp
ExternalCUnknownACBias circuit
InternalCVBS0 to 1DCTransparent sync-tip clamp
InternalR, G, B0 to 1DCTransparent sync-tip clamp
InternalY, C0 to 1DCTransparent sync-tip clamp
InternalY, Pb, Pr0 to 1DCTransparent sync-tip clamp
InternalCVBS2.3 to 3.3ACTransparent sync-tip clamp
InternalR, G, B2.3 to 3.3ACTransparent sync-tip clamp
InternalY2.3 to 3.3ACTransparent sync-tip clamp
InternalC2.3 to 3.3ACBias circuit
Table 1. Recommended Coupling for Incoming Video Signals and Input Circuit
Configuration****Use a 0.1µF capacitor to AC-couple a video signal into the MAX9597.
SLOW-SWITCHING
SIGNAL VOLTAGE
(V)
MODE0 to 2
Display device uses an internal
source such as a built-in tuner to
provide a video signal.
4.5 to 7.0
Display device uses a video signal
from the SCART connector and sets
the display to a 16:9 aspect ratio.
9.5 to 12.6
Display device uses a signal from the
SCART connector and sets the
display to a 4:3 aspect ratio.
Table 2. Slow-Switching Modes
MAX9597
Low-Power Audio/Video Interface
for Single SCART Connectors
Fast SwitchingThe fast-switching signal was originally used to switch
between CVBS and RGB signals on a pixel-by-pixel
basis so that on-screen display (OSD) information
could be inserted. Since modern set-top box decoder
chips have integrated OSD circuitry, there is no need to
create OSD information using the older technique.
Now, the fast-switching signal is just used to switch
between CVBS and RGB signal sources.
Set the source of the fast-switching signal by writing to
bits 4 and 3 of register 07h. The fast-switching signal to
the TV SCART connector can be enabled or disabled
by bit 1 of register 0Dh. See Tables 9 and 11.
2C Serial Interface The MAX9597 features an I2C/SMBus™-compatible,
2-wire serial interface consisting of a serial-data line
(SDA) and a serial-clock line (SCL). SDA and SCL facili-
tate communication between the MAX9597 and the mas-
ter at clock rates up to 400kHz. Figure 4 shows the
2-wire interface timing diagram. The master generates
SCL and initiates data transfer on the bus. A master
device writes data to the MAX9597 by transmitting a
START (S) condition, the proper slave address with the
R/Wbit set to 0, followed by the register address and
then the data word. Each transmit sequence is framed
by a START and a STOP (P) condition. Each word trans-
mitted to the MAX9597 is 8 bits long and is followed by
an acknowledge clock pulse. A master reads from the
MAX9597 by transmitting the slave address with the R/W
bit set to 0, the register address of the register to be
read, a REPEATED START (Sr) condition, the slave
address with the R/Wbit set to 1, followed by a series of
SCL pulses. The MAX9597 transmits data on SDA in
sync with the master-generated SCL pulses. The master
acknowledges receipt of each byte of data. Each read
sequence is framed by a START or REPEATED START
condition, an acknowledge or a not acknowledge, and a
STOP condition. SDA operates as both an input and an
open-drain output. A pullup resistor, typically greater
than 500Ω, is required on the SDA bus. SCL operates as
only an input. A pullup resistor, typically greater than
500Ω, is required on SCL if there are multiple masters on
the bus, or if the master in a single-master system has an
open-drain SCL output. Series resistors in line with SDA
and SCL are optional. Series resistors protect the digital
inputs of the MAX9597 from high-voltage spikes on the
bus lines, and minimize crosstalk and undershoot of the
bus signals.
Bit TransferOne data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse. Changes in SDA while SCL is high
are control signals (see the START and STOP
DEV_ADDRB7B6B5B4B3B2B1B0WRITE ADDRESS
(HEX)
READ ADDRESS
(HEX)GND1001010R/W94h95h
VVID1001011R/W96h97h
SCL1001100R/W98h99h
SDA1001101R/W9Ah9Bh
Table 3. Slave AddressSCL
SDA
START
CONDITION
STOP
CONDITION
REPEATED
START CONDITION
START
CONDITION
tHD, STA
tSU, STA
tHD, STAtSP
tBUF
tSU, STOtLOW
tSU, DAT
tHD, DAT
tHIGHtF
Figure 4. I2C Serial-Interface Timing Diagram
