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MAX9376EUBTIN/a300avaiLVDS/Anything-to-LVPECL/LVDS Dual Translator


MAX9376EUB ,LVDS/Anything-to-LVPECL/LVDS Dual TranslatorELECTRICAL CHARACTERISTICS(V = +3.0V to +3.6V, differential input voltage |V | = 0.1V to 3.0V, inpu ..
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MAX9376EUB
LVDS/Anything-to-LVPECL/LVDS Dual Translator
General Description
The MAX9376 is a fully differential, high-speed,
LVDS/anything-to-LVPECL/LVDS dual translator
designed for signal rates up to 2GHz. One channel is
LVDS/anything-to-LVPECL translator and the other
channel is LVDS/anything-to-LVDS translator. The
MAX9376’s extremely low propagation delay and high
speed make it ideal for various high-speed network
routing and backplane applications.
The MAX9376 accepts any differential input signal with-
in the supply rails and with minimum amplitude of
100mV. Inputs are fully compatible with the LVDS,
LVPECL, HSTL, and CML differential signaling stan-
dards. LVPECL outputs have sufficient current to drive
50Ωtransmission lines. LVDS outputs conform to the
ANSI EIA/TIA-644 LVDS standard.
The MAX9376 is available in a 10-pin µMAX package
and operates from a single +3.3V supply over the -40°C
to +85°C temperature range.
Applications

Backplane Logic Standard Translation
LVDS-to-LVPECL, LVPECL-to-LVDS
Up/Downconverters
LANs
WANs
DSLAMs
DLCs
Features
Guaranteed 2GHz Switching FrequencyAccepts LVDS/LVPECL/Anything Inputs421ps (typ) Propagation Delays30ps (max) Pulse Skew2psRMS(max) Random JitterMinimum 100mV Differential Input to Guarantee
AC Specifications
Temperature-Compensated LVPECL Output+3.0V to +3.6V Power-Supply Operating Range>2kV ESD Protection (Human Body Model)
MAX9376VDS/Anything-to-LVPECL/LVDS Dual Translator
Pin Configuration

19-2809; Rev 0; 4/03
Functional Diagram appears at end of data sheet.
MAX9376
LVDS/Anything-to-LVPECL/LVDS Dual Translator
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS

(VCC= +3.0V to +3.6V, differential input voltage |VID| = 0.1V to 3.0V, input voltage (VIN, VIN) = 0 to VCC, input common-mode voltage
VCM= 0.05V to (VCC- 0.05V), LVPECL outputs terminated with 50Ω±1% to (VCC- 2.0V), LVDS outputs terminated with 100Ω±1%, = -40°C to +85°C. Typical values are at VCC= +3.3V, |VID| = 0.2V, input common-mode voltage VCM= 1.2V, TA= +25°C, unless
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND...........................................................-0.3V to +4.1V
Inputs (IN_, IN_).........................................-0.3V to (VCC + 0.3V)
IN to IN................................................................................±3.0V
Continuous Output Current.................................................50mA
Surge Output Current .......................................................100mA
Continuous Power Dissipation (TA= +70°C)
10-Pin µMAX (derate 6.9mW/°C above +70°C)..........155mW
θJAin Still Air..........................................................+144°C/W
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
ESD Protection
Human Body Model (IN_, IN_, OUT_, OUT_)..................≥2kV
Soldering Temperature (10s)...........................................+300°C
MAX9376VDS/Anything-to-LVPECL/LVDS Dual Translator
AC ELECTRICAL CHARACTERISTICS

(VCC= +3.0V to +3.6V, differential input voltage |VID| = 0.1V to 1.2V, input frequency ≤1.34GHz, differential input transition time =
125ps (20% to 80%), input voltage (VIN, VIN) = 0 to VCC, input common-mode voltage (VCM) = 0.05V to (VCC- 0.05V), LVPECL out-
puts terminated with 50Ω±1% to (VCC- 2.0V), LVDS outputs terminated with 100Ω±1%, TA = -40°C to +85°C. Typical values are at
DC ELECTRICAL CHARACTERISTICS (continued)

(VCC= +3.0V to +3.6V, differential input voltage |VID| = 0.1V to 3.0V, input voltage (VIN, VIN) = 0 to VCC, input common-mode voltage
VCM= 0.05V to (VCC- 0.05V), LVPECL outputs terminated with 50Ω±1% to (VCC- 2.0V), LVDS outputs terminated with 100Ω±1%, = -40°C to +85°C. Typical values are at VCC= +3.3V, |VID| = 0.2V, input common-mode voltage VCM= 1.2V, TA= +25°C, unless
otherwise noted.) (Notes 1, 2, 3)
MAX9376
LVDS/Anything-to-LVPECL/LVDS Dual Translator
SUPPLY CURRENT
vs. FREQUENCY

MAX9376 toc01
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
OUTPUT AMPLITUDE
vs. FREQUENCY
MAX9376 toc02
FREQUENCY (MHz)
OUTPUT AMPLITUDE (mV)
PROPAGATION DELAY
vs. TEMPERATURE
MAX9376 toc03
TEMPERATURE (°C)
PROPAGATION DELAY (ps)3510-15
OUTPUT RISE/FALL TIME
vs. TEMPERATURE
MAX9376 toc04
TEMPERATURE (°C)
OUTPUT RISE/FALL TIME (ps)3510-15
Typical Operating Characteristics
(VCC= +3.3V, differential input voltage |VID| = 0.2V, VCM= 1.2V, input frequency = 500MHz, LVPECL outputs terminated with 50Ω
±1% to VCC- 2.0V, LVDS outputs terminated with 100Ω±1%, TA= +25°C, unless otherwise noted.)
AC ELECTRICAL CHARACTERISTICS (continued)

(VCC= +3.0V to +3.6V, differential input voltage |VID| = 0.1V to 1.2V, input frequency ≤1.34GHz, differential input transition time =
125ps (20% to 80%), input voltage (VIN, VIN) = 0 to VCC, input common-mode voltage (VCM) = 0.05V to (VCC- 0.05V), LVPECL out-
puts terminated with 50Ω±1% to (VCC- 2.0V), LVDS outputs terminated with 100Ω±1%, TA = -40°C to +85°C. Typical values are at
VCC= +3.3V, |VID| = 0.2V, input common-mode voltage VCM= 1.2V, TA= +25°C, unless otherwise noted.) (Note 4)
Note 1:
Measurements are made with the device in thermal equilibrium. All voltages are referenced to ground except VTHD, VID,
VOD, and ∆VOD.
Note 2:
Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3:
DC parameters production tested at TA= +25°C and guaranteed by design and characterization over the full operating
temperature range.
Note 4:
Guaranteed by design and characterization, not production tested. Limits are set at ±6 sigma.
Note 5:
tSKEWis the magnitude difference of differential propagation delays for the same output under same conditions; tSKEW=
|tPHL- tPLH|.
Note 6:
Device jitter added to the input signal.
MAX9376VDS/Anything-to-LVPECL/LVDS Dual Translator
MAX9376
LVDS/Anything-to-LVPECL/LVDS Dual Translator
Applications Information
LVPECL Output Termination

Terminate the MAX9376 LVPECL outputs with 50Ωto
(VCC- 2V) or use equivalent Thevenin terminations.
Terminate OUT1 and OUT1with identical termination
on each for low output distortion. When a single-ended
signal is taken from the differential output, terminate
both OUT1 and OUT1.
Ensure that output currents do not exceed the current
limits as specified in the Absolute Maximum Ratings.
Under all operating conditions, the device’s total ther-
mal limits should be observed.
LVDS Output Termination

The MAX9376 LVDS outputs are current-steering
devices; no output voltage is generated without a termi-
nation resistor. The termination resistors should match
the differential impedance of the transmission line.
Output voltage levels are dependent upon the value of
the termination resistor. The MAX9376 is optimized for
point-to-point interface with 100Ωtermination resistors
at the receiver inputs. Termination resistance values
may range between 90Ωand132Ω, depending on the
characteristic impedance of the transmission medium.
Supply Bypassing

Bypass VCCto ground with high-frequency surface-
mount ceramic 0.1µF and 0.01µF capacitors. Place the
capacitors as close to the device as possible with the
0.01µF capacitor closest to the device pins.
Traces

Circuit board trace layout is very important to maintain
the signal integrity of high-speed differential signals.
Maintaining integrity is accomplished in part by reduc-
ing signal reflections and skew, and increasing com-
mon-mode noise immunity.
Signal reflections are caused by discontinuities in the
50Ωcharacteristic impedance of the traces. Avoid dis-
continuities by maintaining the distance between differ-
ential traces, not using sharp corners or using vias.
Maintaining distance between the traces also increases
common-mode noise immunity. Reducing signal skew
is accomplished by matching the electrical length of
the differential traces.
Chip Information

TRANSISTOR COUNT: 614
PROCESS: Bipolar
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