MAX9150EUI+T ,Low-Jitter, 10-Port LVDS RepeaterApplicationsCellular Phone Base StationsMAX9150Add/Drop MuxesDO2+ 1 28 DO3+Digital CrossconnectsDO2 ..
MAX9152ESE ,800Mbps LVDS/LVPECL-to-LVDS 2 x 2 Crosspoint Switchapplications requiring high speed, low power, and low-2 x 2 Crosspoint Switchnoise signal distribut ..
MAX9152ESE+ ,800Mbps, LVDS/LVPECL-to-LVDS 2 x 2 Crosspoint Switchapplications requiring high speed, low power, and low-2 x 2 Crosspoint Switchnoise signal distribut ..
MAX9152ESE+T ,800Mbps, LVDS/LVPECL-to-LVDS 2 x 2 Crosspoint SwitchApplicationsCell Phone Base StationsMAX9152Add/Drop MuxesEN0EN1Digital CrossconnectsDSLAMsSEL0 SEL1 ..
MAX9152ESE+T ,800Mbps, LVDS/LVPECL-to-LVDS 2 x 2 Crosspoint SwitchELECTRICAL CHARACTERISTICS (continued)(V = +3.0V to +3.6V, NC/RSEL = open for R = 75Ω ±1%, NC/RSEL ..
MAX9152EUE+ ,800Mbps, LVDS/LVPECL-to-LVDS 2 x 2 Crosspoint SwitchELECTRICAL CHARACTERISTICS(V = +3.0V to +3.6V, NC/RSEL = open for R = 75Ω ±1%, NC/RSEL = high for R ..
MB88344 ,8-Bit D/A Converter with Operational Amplifier Output BuffersFUJITSU SEMICONDUCTORDS04-13505-3EDATA SHEETLINEAR IC8-Bit D/A Converter with Operational Amplifier ..
MB88344 ,8-Bit D/A Converter with Operational Amplifier Output BuffersFUJITSU SEMICONDUCTORDS04-13505-3EDATA SHEETLINEAR IC8-Bit D/A Converter with Operational Amplifier ..
MB88344 ,8-Bit D/A Converter with Operational Amplifier Output BuffersFUJITSU SEMICONDUCTORDS04-13505-3EDATA SHEETLINEAR IC8-Bit D/A Converter with Operational Amplifier ..
MB88345 ,D/A Converter for Digital Tuning (24-channel, 8-bit, on-chip OP amp)FUJITSU SEMICONDUCTORDS04-13508-2EDATA SHEETLinear IC ConverterCMOSD/A Converter for Digital Tuni ..
MB88345PF ,D/A Converter for Digital Tuning (24-channel, 8-bit, on-chip OP amp)FEATURES• Ultra-low power consumption (1.1 mW/ch : typical) • Compact space-saving package (QFP-32 ..
MB88346B ,R-2R TYPE 8-BIT D/A CONVERTER WITH OPERATIONAL AMPLIFIER OUTPUT BUFFERSFUJITSU SEMICONDUCTORDS04-13501-2EDATA SHEETLINEAR ICR-2R TYPE 8-BIT D/A CONVERTER WITHOPERATIONAL ..
MAX9150EUI+-MAX9150EUI+T
Low-Jitter, 10-Port LVDS Repeater
MAX9150
Low-Jitter, 10-Port LVDSRepeater19-1815; Rev 1; 3/09
EVALUATION KIT
AVAILABLE
Ordering InformationPART TEMP. RANGE PIN-PACKAGEMAX9150EUI-40°C to +85°C28 TSSOP
100Ω
LVDS
LVDS
BACKPLANE
OR CABLE
100Ω 1
10
100Ω
100Ω 100Ω
MAX9150RX
RX
MAX9111
MAX9111
TX
MAX9110
Typical Application CircuitDO3+
DO3-
DO4+
DO4-
DO5+
DO5-
DO8-
VCC
GND
DO6+
DO6-
DO7+
DO7-
DO8+
DO9-
DO9+
DO10-
DO10+
VCC
GND
RIN-
RIN+
GND
DO1-
DO1+
DO2-
DO2+
TOP VIEW
MAX9150
PWRDN
TSSOP
Pin Configuration
General DescriptionThe MAX9150 low-jitter, 10-port, low-voltage differential
signaling (LVDS) repeater is designed for applications
that require high-speed data or clock distribution while
minimizing power, space, and noise. The device
accepts a single LVDS input and repeats the signal at
10 LVDS outputs. Each differential output drives a total
of 50Ω, allowing point-to-point distribution of signals on
transmission lines with 100Ωterminations on each end.
Ultra-low 120ps (max) peak-to-peak jitter (deterministic
and random) ensures reliable communication in high-
speed links that are highly sensitive to timing error,
especially those incorporating clock-and-data recovery,
or serializers and deserializers. The high-speed switch-
ing performance guarantees 400Mbps data rate and
less than 100ps skew between channels while operat-
ing from a single +3.3V supply.
Supply current at 400Mbps is 160mA (max) and is
reduced to 60µA (max) in low-power shutdown mode.
Inputs and outputs conform to the EIA/TIA-644 LVDS
standard. A fail-safe feature sets the outputs high when
the input is undriven and open, terminated, or shorted.
The MAX9150 is available in a 28-pin TSSOP package.
Refer to the MAX9110/MAX9112 and MAX9111/MAX9113
data sheets for LVDS line drivers and receivers.
________________________ApplicationsCellular Phone Base Stations
Add/Drop Muxes
Digital Crossconnects
Network Switches/Routers
Backplane Interconnect
Clock Distribution
FeaturesUltra-Low 120psp-p(max) Total Jitter
(Deterministic and Random)100ps (max) Skew Between ChannelsGuaranteed 400Mbps Data Rate60µA Shutdown Supply CurrentConforms to EIA/TIA-644 LVDS StandardSingle +3.3V SupplyFail-Safe Circuit Sets Output High for Undriven
Inputs
High-Impedance LVDS Input when VCC= 0V
MAX9150
Low-Jitter, 10-Port LVDSRepeater
ABSOLUTE MAXIMUM RATINGSELECTRICAL CHARACTERISTICS
(VCC= +3.0V to +3.6V, RL= 50Ω±1%, |VID|= 0.1V to 1.0V, VCM= |VID/ 2|to 2.4V - |VID/ 2|, PWRDN= high, TA= -40°C to +85°C,
unless otherwise noted. Typical values are at VCC= +3.3V, TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND...........................................................-0.3V to +4.0V
RIN+, RIN- to GND................................................-0.3V to +4.0V
PWRDNto GND..........................................-0.3V to (VCC+ 0.3V)
DO_+, DO_- to GND..............................................-0.3V to +4.0V
Short-Circuit Duration (DO_+, DO_-).........................Continuous
Continuous Power Dissipation (TA= +70°C)
28-Pin TSSOP (derate 12.8mW/°C above +70°C).....1026mW
Storage Temperature.........................................-65°C to +150°C
Maximum Junction Temperature.....................................+150°C
Operating Temperature Range...........................-40°C to +85°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSW R D N
Input High VoltageVIH2.0V
Input Low VoltageVIL0.8V
Input CurrentIINVIN = VCC and 0V-1515µA
LVDS INPUT
Differential Input High ThresholdVTH7100mV
Differential Input Low ThresholdVTL-100-7mV
PWRDN = high or low; VRIN+ = 2.4V,
RIN- = open or RIN+ = open, VRIN- = 2.4V-6+1
Single-Ended Input CurrentIIN
PWRDN = high or low; VRIN+ = 0V,
RIN- = open or RIN+ = open, VRIN- = 0V-18+1
Power-Off Single-Ended Input
CurrentIIN(OFF)VCC = 0V; VRIN+ = 2.4V, RIN- = open
or RIN+ = open, VRIN- = 2.4V-1+12µA
Differential Input ResistanceRIDIFFVCC = +3.6V or 0V, PWRDN = high or low5kΩ
LVDS DRIVER
Differential Output VoltageVODFigure 1250320450mV
Change in VOD Between
Complementary Output StatesΔVODFigure 125mV
Offset (Common-Mode) VoltageVOSFigure 10.901.251.375V
Change in VOS Between
Complementary Output StatesΔVOSFigure 125mV
Output High VoltageVOHFigure 11.6V
Output Low VoltageVOLFigure 10.7V
Differential Output Resistance
(Note 2)RODIFFVCC = +3.6V or 0V, PWRDN = high or low150240330Ω
Differential High Output Voltage
in Fail-SafeVOD+RIN+, RIN- undriven with short, open, or
100Ω termination250450mV
VID = +100mV, VDO_+ = GNDOutput Short-Circuit CurrentISCVID = -100mV, VDO_- = GND-15mA
MAX9150
Low-Jitter, 10-Port LVDSRepeater
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC= +3.0V to +3.6V, RL= 50Ω±1%, |VID|= 0.1V to 1.0V, VCM= |VID/ 2|to 2.4V - |VID/ 2|, PWRDN= high, TA= -40°C to +85°C,
unless otherwise noted. Typical values are at VCC= +3.3V, TA= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
VCC = 0V, PWRDN = GND;
VDO_+ = 3.6V or 0V, DO_- = open; or
VDO_- = 3.6V or 0V, DO_+ = open+1µA
Single-Ended Output High-
Impedance CurrentIOZ
PWRDN = GND;
VDO_+ = 3.6V or 0V, DO_- = open; or
VDO_- = 3.6V or 0V, DO_+ = open+1µA
SUPPLY CURRENT100140Supply Current (Note 2)ICC200MHz (400Mbps)Figure 2130160mA
Power-Down Supply CurrentICCZPWRDN = GND60µAELECTRICAL CHARACTERISTICS
(VCC= +3.0V to +3.6V, RL= 50Ω±1%, CL= 5pF, |VID|= 0.2V to 1.0V, VCM= |VID/ 2|to 2.4V - |VID/ 2|, PWRDN= high, TA= -40°C
to +85°C, unless otherwise noted. Typical values are at VCC= +3.3V, TA= +25°C.) (Notes 2–5)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Differential Propagation Delay
High-to-LowtPHLDFigures 2, 31.62.23.5ns
Differential Propagation Delay
Low-to-HightPLHDFigures 2, 31.62.23.5ns
Total Peak-to-Peak Jitter
(Random and Deterministic)
(Note 6)
tJPPFigures 2, 320120psp-p
Differential Output-to-Output
Skew (Note 7)tSKOOFigures 2, 340100ps
Differential Part-to-Part Skew
(Note 8)tSKPPFigures 2, 31.9ns
Rise/Fall TimeTTLH, tTHLFigures 2, 3150220450psaxi m um Inp ut Fr eq uency ( N ote 9)fMAXFigures 2, 3400Mbps
MAX9150
Low-Jitter, 10-Port LVDSRepeater
Typical Operating Characteristics
(Figure 2, VCC= +3.3V, RL= 50Ω, CL= 5pF, IVIDI = 200mV, VCM= 1.2V, fIN= 50MHz, TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT (mA)
SUPPLY CURRENT vs. FREQUENCYMAX9150 toc01
INPUT FREQUENCY (MHz)
DIFFERENTIAL PROPAGATION DELAY
vs. SUPPLY VOLTAGE
MAX9150 toc02
VCC (V)
DIFFERENTIAL PROPAGATION DELAY (ns)
tPHLD
tPLHD70608090100
MAX9150 toc03
RL (Ω)
DIFFERENTIAL PROPAGATION DELAY
vs. OUTPUT LOAD
DIFFERENTIAL PROPAGATION DELAY (ns)
tPLHD
tPHLD
Note 1:Current-into-device pins is defined as positive. Current-out-of-device pins is defined as negative. All voltages are
referenced to ground, except VTH, VTL, VOD, and ΔVOD.
Note 2:Guaranteed by design, not production tested.
Note 3:AC parameters are guaranteed by design and characterization.
Note 4:CLincludes scope probe and test jig capacitance.
Note 5:Signal generator conditions, unless otherwise noted: frequency = 200MHz, 50% duty cycle, RO= 50Ω, tR= 1ns, and tF=
1ns (0% to 100%).
Note 6:Signal generator conditions for tJPP: VOD= 200mV, VOS= 1.2V, frequency = 200MHz, 50% duty cycle, RO= 50Ω, tR= 1ns,
and tF= 1ns (0% to 100%. tJPPincludes pulse (duty cycle) skew.
Note 7:tSKOOis the magnitude difference in differential propagation delay between outputs for a same-edge transition.
Note 8:tSKPPis the |MAX - MIN|differential propagation delay.
Note 9:Device meets VODand AC specifications while operating at fMAX.
ELECTRICAL CHARACTERISTICS (continued)(VCC= +3.0V to +3.6V, RL= 50Ω±1%, CL= 5pF, |VID|= 0.2V to 1.0V, VCM= |VID/ 2|to 2.4V - |VID/ 2|, PWRDN= high, TA= -40°C
to +85°C, unless otherwise noted. Typical values are at VCC= +3.3V, TA= +25°C.) (Notes 2–5)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSPower-Down TimetPD100ns
Power-Up TimetPUFigures 4, 5100µs
MAX9150
Low-Jitter, 10-Port LVDSRepeater-10B
F, I
A, E
DIFFERENTIAL OUTPUT-TO-OUTPUT
SKEW vs. SUPPLY VOLTAGE
MAX9150 toc05
VCC (V)
DIFFERENTIAL OUTPUT-TO-OUTPUT SKEW (ps)
A = D02 - D01 B = D03 - D01 C = D04 - D01
D = D05 - D01 E = D06 - D01 F = D07 - D01
G = D08 - D01 H = D09 - D01 I = D010 - D01185
TRANSITION TIME vs. SUPPLY VOLTAGE
MAX9150 toc06
VCC (V)
TRANSITION TIME (ps)
tTHL
tTLH
TRANSITION TIME vs. CAPACITANCE
MAX9150 toc08
CL (pF)
TRANSITION TIME (ps)
tTHL
tTLH
MAX9150 toc04
VCM (V)
DIFFERENTIAL PROPAGATION DELAY
vs. COMMON-MODE VOLTAGEDIFFERENTIAL PROPAGATION DELAY (ns)
tPLHD
tPHLD
TRANSITION TIME vs. OUTPUT LOAD
MAX9150 toc07
RL (Ω)
TRANSITION TIME (ps)
tTHL
tTLH
ypical Operating Characteristics (continued)(Figure 2, VCC= +3.3V, RL= 50Ω, CL= 5pF, IVIDI = 200 mV, VCM= 1.2V, fIN= 50MHz, TA = +25°C, unless otherwise noted.)70608090100
DIFFERENTIAL OUTPUT vs. OUTPUT LOADRL (Ω)
MAX9150 toc10
DIFFERENTIAL OUTPUT (mV)
DIFFERENTIAL OUTPUT vs. SUPPLY VOLTAGE
MAX9150 toc09
VCC (V)
DIFFERENTIAL OUTPUT (mV)
Detailed DescriptionThe LVDS interface standard is a signaling method
intended for point-to-point communication over a con-
trolled impedance medium, as defined by the
ANSI/TIA/EIA-644 and IEEE 1596.3 standards. The
LVDS standard uses a lower voltage swing than other
common communication standards, achieving higher
data rates with reduced power consumption while
reducing EMI emissions and system susceptibility to
noise.
The MAX9150 is a 400Mbps, 10-port LVDS repeater
intended for high-speed, point-to-point, low-power
applications. This device accepts an LVDS input and
repeats it on 10 LVDS outputs. The device is capable of
detecting differential signals as low as 100mV and as
high as 1V within a 0 to 2.4V input voltage range. The
LVDS standard specifies an input voltage range of 0 to
2.4V referenced to ground.
The MAX9150 outputs use a current-steering configura-
tion to generate a 5mA to 9mA output current. This cur-
rent-steering approach induces less ground bounce
and no shoot-through current, enhancing noise margin
and system speed performance. The driver outputs are
short-circuit current limited, and are high impedance
(to ground) when PWRDN= low or the device is not
powered. The outputs have a typical differential resis-
tance of 240Ω.
The MAX9150 current-steering architecture requires a
resistive load to terminate the signal and complete the
transmission loop. Because the device switches the
direction of current flow and not voltage levels, the out-
put voltage swing is determined by the total value of
the termination resistors multiplied by the output cur-
rent. With a typical 6.4mA output current, the MAX9150
produces a 320mV output voltage when driving a trans-
mission line terminated at each end with a 100Ωtermi-
nation resistor (6.4mA x 50Ω= 320mV). Logic states
are determined by the direction of current flow through
the termination resistors.
Fail-SafeFail-safe is a receiver feature that puts the output in a
known logic state (high) under certain fault conditions.
The MAX9150 outputs are differential high when the
inputs are undriven and open, terminated, or shorted
(Table 1).
MAX9150
Low-Jitter, 10-Port LVDSRepeater
Table 1. Input/Output Function Table
INPUT, VIDOUTPUTS, VOD+100mVHigh
-100mVLow
OpenHigh
ShortHigh
TerminatedUndrivenHigh
Note:VID= RIN+ - RIN-, VOD= DO_+ - DO_-
High = 450mV > VOD> 250mV
Low = -250mV > VOD> -450mV
PINNAMEFUNCTION1, 3, 11, 13,
16, 18, 20,
24, 26, 28
DO2+, DO1+, DO10+,
DO9+, DO8+, DO7+,
DO6+, DO5+, DO4+, DO3+
2, 4, 12, 14,
15, 17, 19,
23, 25, 27
DO2-, DO1-, DO10-, DO9-,
DO8-, DO7-,
DO6-, DO5-, DO4-, DO3-
Differential LVDS Outputs. Connect a 100Ω resistor across each of the output
pairs (DO_+ and DO_-) adjacent to the IC, and connect a 100Ω resistor at the
input of the receiving circuit.PWRDNPower Down. Drive PWRDN low to disable all outputs and reduce supply current
to 60µA. Drive PWRDN high for normal operation.
6, 9, 21GNDGround
10, 22VCCPower. Bypass each VCC pin to GND with 0.1µF and 1nF ceramic capacitors.RIN+RIN-
LVDS Receiver Inputs. RIN+ and RIN- are high-impedance inputs. Connect a
resistor from RIN+ to RIN- to terminate the input signal.
Pin Description
