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MAX9107ESA
25ns / Dual/Quad/Single / Low-Power / TTL Comparators
MAX9107/MAX9108/MAX9109
25ns, Dual/Quad/Single, Low-Power,
TTLComparators
Pin Configurations19-2045; Rev. 0; 5/01
General DescriptionThe MAX9107/MAX9108/MAX9109 dual/quad/single,
high-speed, low-power voltage comparators are
designed for use in systems powered from a single
+5V supply. Their 25ns propagation delay (with 10mV
input overdrive) is achieved with a power consumption
of only 1.75mW per comparator. The wide input com-
mon-mode range extends from 200mV below ground
to within 1.5V of the positive supply rail.
The MAX9107/MAX9108/MAX9109 outputs are TTL-
compatible, requiring no external pullup circuitry.
These easy-to-use comparators incorporate internal
hysteresis to ensure clean output switching even when
the devices are driven by a slow-moving input signal.
The MAX9107/MAX9108/MAX9109 are higher-speed,
lower-power, lower-cost upgrades to industry-standard
comparators MAX907/MAX908/MAX909. The MAX9109
features an output latch but does not have comple-
mentary outputs.
The dual MAX9107 is available in both 8-pin SO and
SOT23 packages. The quad MAX9108 is available in
14-pin TSSOP and SO packages while the single
MAX9109 is available in an ultra-small 6-pin SC70
package, a space-saving 6-pin SOT23 package and
an 8-pin SO package.
Applications
Features25ns Propagation Delay350µA (1.75mW) Supply Current Per Comparator Single 4.5V to 5.5V Supply OperationWide Input Range Includes GroundLow 500µV Offset VoltageInternal Hysteresis Provides Clean Switching
(2mV)TTL-Compatible Outputs Internal Latch (MAX9109 only)No Phase Reversal for Overdriven InputsSpace-Saving Packages:
6-Pin SC70 (MAX9109)
8-Pin SOT23 (MAX9107)
14-Pin TSSOP (MAX9108)
Ordering InformationBattery-Powered Systems
A/D Converters
Line Receivers
Threshold Detectors/
Discriminators
Sampling Circuits
Zero-Crossing Detectors
MAX9107/MAX9108/MAX9109
25ns, Dual/Quad/Single, Low-Power,
TTLComparatorsPower-Supply Ranges
Supply Voltage (VCCto GND)..............................................6V
Differential Input Voltage........................-0.3V to (VCC+ 0.3V)
Common-Mode Input Voltage to GND...-0.3V to (VCC+ 0.3V)
Latch-Enable Input Voltage
(MAX9109 only)...................................-0.3V to (VCC+ 0.3V)
Output Short-Circuit Duration to VCCor GND........................10s
Continuous Power Dissipation (TA= +70°C)
6-Pin SC70 (derate 3.1mW/°C above +70°C)..............245mW
6-Pin SOT23 (derate 8.7mW/°C above +70°C)............696mW
8-Pin SOT23 (derate 9.1mW/°C above +70°C)............727mW
8-Pin SO (derate 5.9mW/°C above +70°C)..................470mW
14-Pin TSSOP (derate 9.1mW/°C above +70°C).........727mW
14-Pin SO (derate 8.33mW/°C above +70°C)..............666mW
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
ELECTRICAL CHARACTERISTICS(VCC= +5V, VCM= 0, VLE= 0 (MAX9109 only), TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ABSOLUTE MAXIMUM RATINGS
MAX9107/MAX9108/MAX9109
25ns, Dual/Quad/Single, Low-Power,
TTLComparators
ELECTRICAL CHARACTERISTICS (continued)(VCC= +5V, VCM= 0, VLE= 0 (MAX9109 only), TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
Note 1:Devices are 100% production tested at TA= +25°C. All temperature limits are guaranteed by design.
Note 2:Input Offset Voltage is defined as the center of the input-referred hysteresis zone. Specified for VCM= 0. See Figure 1.
Note 3:Trip Point is defined as the input voltage required to make the comparator output change state. The difference
between upper (VTRIP+) and lower (VTRIP-) trip points is equal to the width of the input-referred hysteresis zone (VHYST).
Specified for an input common-mode voltage (VCM) of 0. See Figure 1.
Note 4:Inferred from the CMRR test. Note that a correct logic result is obtained at the output, provided that at least one input is
within the VCMRlimits. Note also that either or both inputs can be driven to the upper or lower absolute maximum limit with-
out damage to the part.
Note 5:Tested over the full-input voltage range (VCMR).
Note 6:Differential Propagation Delay is specified as the difference between any two channels in the MAX9107/MAX9108 (both
outputs making either a low-to-high or a high-to-low transition).
Note 7:Propagation Delay Skew is specified as the difference between any single channel’s output low-to-high transition (tPD+)
and high-to-low transition (tPD-).
Note 8:Latch specifications apply to MAX9109 only. See Figure 2.
MAX9107/MAX9108/MAX9109
25ns, Dual/Quad/Single, Low-Power,
TTLComparatorsINPUT OFFSET VOLTAGE
vs. TEMPERATURE
MAX9107/08/09 toc04
TEMPERATURE (°C)
INPUT OFFSET VOLTAGE (mV)
OUTPUT LOW VOLTAGE
vs. SINK CURRENT
MAX9107/08/09 toc07
ISINK (mA)
(V)
INPUT BIAS CURRENT
vs. TEMPERATURE
MAX9107/08/09 toc05
TEMPERATURE (°C)
INPUT CURRENT (nA)
TRIP POINT
vs. TEMPERATURE
MAX9107/08/09 toc06
TEMPERATURE (°C)
(mV)
OUTPUT HIGH VOLTAGE
vs. SOURCE CURRENT
MAX9107/08/09 toc08
ISOURCE (µA)
(V)
PROPAGATION DELAY
vs. INPUT OVERDRIVE
MAX9107/08/09 toc09
INPUT OVERDRIVE (mV)
PROPAGATION DELAY (ns)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
(OUTPUTS AT VOL)
MAX9107/08/09 toc01
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
(OUTPUTS AT VOH)
MAX9107/08/09 toc02
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
INPUT VOLTAGE RANGE
vs. TEMPERATURE
MAX9107/08/09 toc03
TEMPERATURE (°C)
INPUT VOLTAGE RANGE (V)
__________________________________________Typical Operating Characteristics(VCC= 5V, VCM= 0, CL= 15pF, TA= +25°C, unless otherwise noted.)
MAX9107/MAX9108/MAX9109
25ns, Dual/Quad/Single, Low-Power,
TTLComparators 5ns/div
PROPAGATION DELAY (tPD-)OVERDRIVE
10mV
OUTPUT
1V/div
MAX9107/08/09 toc11
INPUT
50mV/div
10ns/div
PROPAGATION DELAY (tPD+)INPUT
50mV/div
OVERDRIVE
10mV
OUTPUT
1V/div
MAX9107/08/09 toc10
50ns/div
SINUSOID 2MHz RESPONSEINPUT
50mV/div
OUTPUT
1V/div
MAX9107/08/09 toc12
PROPAGATION DELAY
vs. CAPACITIVE LOAD
MAX9107/08/09 toc13
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
PROPAGATION DELAY
vs. TEMPERATURE
MAX9107/08/09 toc14
TEMPERATURE (°C)
PROPAGATION DELAY (ns)10k1k100
PROPAGATION DELAY
vs. SOURCE IMPEDANCEMAX9107/08/09 toc15
SOURCE IMPEDANCE (Ω)
PROPAGATION DELAY (ns)
____________________________Typical Operating Characteristics (continued)(VCC= 5V, VCM= 0, CL= 15pF, TA= +25°C, unless otherwise noted.)
MAX9107/MAX9108/MAX9109
25ns, Dual/Quad/Single, Low-Power,
TTLComparators
_______________Detailed Description
TimingNoise or undesired parasitic AC feedback cause most
high-speed comparators to oscillate in the linear region
(i.e., when the voltage on one input is at or near the
voltage on the other input). The MAX9107/MAX9108/
MAX9109 eliminate this problem by incorporating an
internal hysteresis of 2mV. When the two comparator
input voltages are equal, hysteresis effectively causes
one comparator input voltage to move quickly past the
other, thus taking the input out of the region where
oscillation occurs. Standard comparators require that
hysteresis be added through the use of external resis-
tors. The MAX9107/MAX9108/MAX9109’s fixed internal
hysteresis eliminates these resistors. To increase hys-
teresis and noise margin even more, add positive feed-
back with two resistors as a voltage divider from the
output to the noninverting input.
Adding hysteresis to a comparator creates two trip
points: one for the input voltage rising and one for the
input voltage falling (Figure 1). The difference between
these two input-referred trip points is the hysteresis.
The average of the trip points is the offset voltage.
Figure 1 illustrates the case where IN- is fixed and IN+
is varied. If the inputs were reversed, the figure would
look the same, except the output would be inverted.
The MAX9109 includes an internal latch, allowing the
result of a comparison to be stored. If LE is low, the
latch is transparent (i.e., the comparator operates as
though the latch is not present). The state of the com-
parator output is latched when LE is high (Figure 2).
Applications Information
Circuit LayoutBecause of the MAX9107/MAX9108/MAX9109’s high
gain bandwidth, special precautions must be taken to
realize the full high-speed capability. A printed circuit
board with a good, low-inductance ground plane is
mandatory. Place the decoupling capacitor (a 0.1µF
ceramic capacitor is a good choice) as close to VCCas
