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MAX8530ETTG2MAXIMN/a2199avaiDual Low-Dropout Linear Regulator with Reset or Low-Noise Output in UCSP or QFN
MAX8530ETTG2+T |MAX8530ETTG2TMAXN/a30002avaiDual Low-Dropout Linear Regulator with Reset or Low-Noise Output in UCSP or QFN
MAX8530ETTK2MAXIMN/a2500avaiDual Low-Dropout Linear Regulator with Reset or Low-Noise Output in UCSP or QFN
MAX8530ETTP2+MAXIMN/a4844avaiDual Low-Dropout Linear Regulator with Reset or Low-Noise Output in UCSP or QFN
MAX8530ETTP2+TMAXN/a1260avaiDual Low-Dropout Linear Regulator with Reset or Low-Noise Output in UCSP or QFN


MAX8530ETTG2+T ,Dual Low-Dropout Linear Regulator with Reset or Low-Noise Output in UCSP or QFNApplicationsM AX85 30E TTxy*-T - 40°C to + 85°C 1.5V to 3.3V 6 Thin Q FN-EP* *Cellular and Cord ..
MAX8530ETTK2 ,Dual Low-Dropout Linear Regulator with Reset or Low-Noise Output in UCSP or QFNfeatures include short-circuit protection and ♦ <1µA Shutdown Currentthermal-shutdown protection.♦ ..
MAX8530ETTP2 , Dual Low-Dropout Linear Regulators with RESET or Low-Noise Output in UCSP or QFN
MAX8530ETTP2+ ,Dual Low-Dropout Linear Regulator with Reset or Low-Noise Output in UCSP or QFNFeaturesThe MAX8530/MAX8531 offer the benefits of low- ♦ Guaranteed 200mA Output Current for OUT1dr ..
MAX8530ETTP2+T ,Dual Low-Dropout Linear Regulator with Reset or Low-Noise Output in UCSP or QFNELECTRICAL CHARACTERISTICS(IN = 3.8V, SHDN = IN, C = 10nF (MAX8531), T = -40°C to +85°C, unless oth ..
MAX8532EBTJ-T ,Low-Noise, Low-Dropout, 200mA Linear Regulator in UCSPApplicationsOUT PIN-PART TEMP RANGECellular and Cordless Phones VOLTAGE PACKAGEPDAs and Palmtop Com ..
MB81F643242C-10FN ,4 x 512K x 32 bit synchronous dynamic RAMFUJITSU SEMICONDUCTORADVANCED INFO. AE0.1EDATA SHEETMEMORYCMOS4 · 512 K · 32 BITSYNCHRONOUS DYNAMIC ..
MB81F643242C-10FN ,4 x 512K x 32 bit synchronous dynamic RAMfeatures a fully synchronous operation referenced to a positive edge clock whereby all operations a ..
MB81N643289-60FN ,8 x 256K x 32 bit double data rate FCRAMapplications where large memory density and high effective bandwidth arerequired and where a simple ..
MB8264A-10 , MOS 65536-BIT DYNAMIC RANDOM ACCESS MEMORY
MB8264A-10 , MOS 65536-BIT DYNAMIC RANDOM ACCESS MEMORY
MB8264A-10 , MOS 65536-BIT DYNAMIC RANDOM ACCESS MEMORY


MAX8530ETTG2-MAX8530ETTG2+T-MAX8530ETTK2-MAX8530ETTP2+-MAX8530ETTP2+T
Dual Low-Dropout Linear Regulator with Reset or Low-Noise Output in UCSP or QFN
General Description
The MAX8530/MAX8531 offer the benefits of low-
dropout voltage and ultra-low power regulation in
subminiaturized UCSP and QFN packages with an inte-
grated microprocessor reset circuit (MAX8530 only).
The devices operate from a 2.5V to 6.5V input and
deliver up to 200mA and 150mA outputs with low
dropout of 100mV (typ) at 100mA. Designed with an
internal P-channel MOSFET pass transistor, the supply
current is kept at a low 130µA (with both LDOs on),
independent of the load current and dropout voltage.
Other features include short-circuit protection and
thermal-shutdown protection.
The MAX8530 provides microprocessor open-drain,
active-low reset output to monitor OUT1, eliminating
external components and adjustments. The MAX8530
asserts a 100ms (min) RESETsignal when OUT1 drops
below 87% of the nominal output voltage. The MAX8531
includes a reference bypass pin for low outputnoise
(40µVRMS).
Both devices include a logic-controlled shutdown input
and are available in 6-bump UCSP and 6-pin thin QFN
exposed pad packages.
Applications

Cellular and Cordless Phones
PDAs and Palmtop Computers
Notebook Computers
Digital Cameras
PCMCIA Cards
Wireless LAN Cards
Hand-Held Instruments
Features
Guaranteed 200mA Output Current for OUT1Guaranteed 150mA Output Current for OUT2Low 100mV (typ) Dropout at 100mA Load for
both LDOs
Open-Drain, Active-Low 100ms (min) Reset Timer
(MAX8530)
Low 40µVRMSOutput Noise (MAX8531)Low 130µA Operating Supply Current<1µA Shutdown CurrentThermal-Overload and Short-Circuit ProtectionOutput Current LimitTiny Packages Available
1.16 x 1.57 x 0.6mm UCSP (3 x 2 Grid)
3mm x 3mm Thin QFN
MAX8530/MAX8531
Dual Low-Dropout Linear Regulators
with RESETor Low-Noise Output in UCSP or QFN
Ordering Information

19-2711; Rev 1; 8/05
*xy = Output voltage code (see the Output Voltage Selector
Guide).
**EP = Exposed pad.
+Denotes lead-free package.
EVALUATION KITAVAILABLE
Pin Configurations appear at end of data sheet.
Output Voltage Selector Guide appears at end of data sheet.
PARTTEMP
RANGE
OUT_
VOLTAGE
PIN-
PACKAGE
MAX8530E
BTxy*- T- 40° C to + 85° C 1.5V to 3.3V 6 UCS PAX 8530E BTxy*+ T- 40° C to + 85° C 1.5V to 3.3V 6 UCS PAX 8530E TTxy*- T- 40° C to + 85° C 1.5V to 3.3V 6 Thi n QFN- EP**AX 8530E TTxy*+ T- 40° C to + 85° C 1.5V to 3.3V 6 Thi n QFN- EP**
MAX8531E
BTxy*- T- 40° C to + 85° C 1.5V to 3.3V 6 UCS PAX 8531E BTxy*+ T- 40° C to + 85° C 1.5V to 3.3V 6 UCS PAX 8531E TTxy*- T- 40° C to + 85° C 1.5V to 3.3V 6 Thi n QFN- EPAX 8531E TTxy*+ T- 40° C to + 85° C 1.5V to 3.3V 6 Thi n QFN- EPOUT1
2.2μFCIN
2.2μF
INPUT
2.5V TO 6.5V
1.5V TO 3.3V
AT 200mA
1.5V TO 3.3V
AT 150mA1μF
SHDN
OFFOUT2
GND
RESET
BASEBAND
VI/O
VCORE
RESETMAX8530
Typical Operating Circuit
MAX8530/MAX8531
Dual Low-Dropout Linear Regulators
with RESETor Low-Noise Output in UCSP or QFN
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(IN = 3.8V, SHDN= IN, CBP = 10nF (MAX8531), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
(Note 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
IN, SHDN, RESET, BP to GND.................................-0.3V to +7V
OUT1, OUT2 to GND...................................-0.3V to (VIN+ 0.3V)
Output Short-Circuit Duration........................................Indefinite
Continuous Power Dissipation (TA = +70°C)
6-Bump UCSP (derate 3.9mW/°C above +70°C)........308mW
6-Lead QFN (derate 24.4mW/°C above +70°C)........1951mW
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
6-Bump+ UCSP Solder Profile....................................(Note 1)
6-Lead QFN Lead Temperature (10s).........................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Input VoltageVIN2.56.5V
Undervoltage Lockout ThresholdVUVLOIN rising, hysteresis is 40mV (typ)2.152.252.42V
TA = +25°C, IOUT1 = IOUT2 = 1mA-1+1
TA = -40°C to +85°C, IOUT1 = IOUT2 = 1mA-2+2Output Voltage Accuracy
TA = - 40°C to + 85° C , IOU T 1 = 0.1m A to 200m A,
IOU T 2 = 0.1m A to 150m A-3+3
OUT1200Maximum Output CurrentIOUT_OUT2150mA
OUT1210330550Current LimitILIMOUT2165280500mA
No load130220Ground CurrentIQIOUT1 = IOUT2 = 100mA150µA
Dropout VoltageVOUT_ - VINIOUT_ = 100mA (Note 3)100200mV
Line RegulationΔVLNRIN = (OUT_ + 0.1V) to 3.8V-0.2+0.2%/V
MAX8530320Output Voltage Noise10Hz to 100kHz, COUT = 10µF,
IOUT = 10mAMAX853140µVRMS
MAX853060Ripple RejectionPSRR100Hz, IOUT = 30mAMAX853162dB
SHUTDOWN

SHDN = 0, TA = +25°C0.011SHDN Supply CurrentIOFFSHDN = 0, TA = +85°C0.1µA
VIHInput high voltage1.6SHDN Input ThresholdVILInput low voltage0.4V
TA = +25°C0.7100SHDN Input Bias CurrentISHDNSHDN = IN or GNDTA = +85°C0.8nA
THERMAL PROTECTION

Thermal-Shutdown TemperatureTSHDNTJ rising160°C
Thermal-Shutdown HysteresisΔTSHDN10°C
Note 1:
For UCSP solder profile information, visit /1st_pages/UCSP.html.
MAX8530/MAX8531
Dual Low-Dropout Linear Regulators
with RESETor Low-Noise Output in UCSP or QFN
ELECTRICAL CHARACTERISTICS (continued)

(IN = 3.8V, SHDN= IN, CBP = 10nF (MAX8531), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
(Note 2)
Note 2:
All units are 100% production tested at TA= +25°C. Limits over the operating temperature range are guaranteed by design.
Note 3:
The dropout voltage is defined as VIN- VOUT,when VOUTis 100mV below the value of VOUTfor VIN= VOUT+ 0.5V.
Specification applies only when VOUT≥2.5V.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
RESET OUTPUT (MAX8530 ONLY)

RESET ThresholdVTHPercentage of nominal output, OUT1 falling,
when RESET falls.848789%
RESET Threshold Hysteresis0.5%
IRESET = 500µA, IN = 3.8V1020RESET Output Voltage Low
(Open-Drain, Active Low)VOLIRESET = 100µA, IN = 1.2V1040mV
TA = +25°C0.0011RESET Open-Drain
Output Leakage CurrentV RESET = 6.5VTA = +85°C0.01µA
RESET Active Timeout DelayFrom OUT1 rising to RESET rising.100200360ms
Typical Operating Characteristics

VOUT1= 3.3V, VOUT2= 1.5V, load = 80mA (both output voltages), VIN= 3.8V, COUT_= 2.2µF, CBP= 0.01µF, CIN= 2.2µF,and TA= +25°C,
unless otherwise noted.
SUPPLY CURRENT
vs. SUPPLY VOLTAGE

MAX8530 toc01
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (54321
80mA LOAD, BOTH OUTPUTS
NO LOAD
SUPPLY CURRENT
vs. LOAD CURRENT

MAX8530 toc02
LOAD CURRENT (mA)
SUPPLY CURRENT (604050203010
BOTH OUTPUTS LOADED
SUPPLY CURRENT
vs. TEMPERATURE

MAX8530 toc03
TEMPERATURE (°C)
SUPPLY CURRENT (3510-15
80mA LOAD, BOTH OUTPUTS
MAX8530/MAX8531
Dual Low-Dropout Linear Regulators
with RESETor Low-Noise Output in UCSP or QFN
Typical Operating Characteristics (continued)

VOUT1= 3.3V, VOUT2= 1.5V, load = 80mA (both output voltages), VIN= 3.8V, COUT_= 2.2µF, CBP= 0.01µF, CIN= 2.2µF,and TA= +25°C,
unless otherwise noted.
DROPOUT VOLTAGE
vs. LOAD CURRENT

MAX8530 toc04
LOAD CURRENT (mA)
DROPOUT VOLTAGE (mV)
LDO DROPOUT VOLTAGE vs. VOUT
MAX8530 toc05
VOUT (V)
DROPOUT VOLTAGE (mV)
IOUT1 = 80mA
OUTPUT VOLTAGE ACCURACY
vs. TEMPERATURE

MAX8530 toc06
TEMPERATURE (°C)
OUTPUT VOLTAGE (%)3510-15
PSRR vs. FREQUENCY
MAX8530 toc07
FREQUENCY (kHz)
PSRR (dB)
OUT2 = 2.85V
OUT1 = 2.85V
100Ω LOAD
CHANNEL-TO-CHANNEL ISOLATION
vs. FREQUENCY (MAX8531)

MAX8530 toc08
FREQUENCY (kHz)
CHANNEL-TO-CHANNEL ISOLATION (dB)
100Ω LOAD
OUTPUT NOISE SPECTRAL DENSITY
vs. FREQUENCY (MAX8531)

MAX8530 toc09
FREQUENCY (kHz)
NOISE DENSITY (nV
RMS
Hz)10.1
10,000
OUTPUT NOISE (10Hz TO 100kHz)
(MAX8531)
MAX8530 toc10
VOUT_500μV/
div
10ms/div
LINE TRANSIENT

MAX8530 toc11
VOUT_
4.5V
40μs/div
VIN3.5V
1V/div
20mV/div
AC-COUPLED
MAX8530/MAX8531
Dual Low-Dropout Linear Regulators
with RESETor Low-Noise Output in UCSP or QFN
LOAD TRANSIENT
(VIN = 3.8V, ILOAD = 1mA TO 80mA)

MAX8530 toc12
ILOAD
50mA/div
10μs/div
VOUT
20mV/div
AC-COUPLED
Pin Description
PIN
MAX8530
(QFN)
MAX8531
(QFN)
MAX8530
(UCSP)
MAX8531
(UCSP)
NAMEFUNCTION
1B3B3OUT2Regulator 2 Output. Guaranteed 150mA output current.2B2B2INRegulator Input3B1B1OUT1Regulator 1 Output. Guaranteed 200mA output current.4A1A1GNDGround. Also functions as a heatsink for the 6-pin QFN. Solder to a large
pad or the circuit board ground plane to maximize thermal dissipation.5A2A2SHDNShutdown Input. A logic low shuts down both regulators. Connect to IN
for normal operation.—A3—RESETReset Active-Low Open-Drain Output. Minimum timeout of 100ms. RESET
is low in shutdown.—A3BPReference Noise Bypass. Connect to a 0.01µF ceramic capacitor for
reduced noise at both outputs.
Typical Operating Characteristics (continued)

VOUT1= 3.3V, VOUT2= 1.5V, load = 80mA (both output voltages), VIN= 3.8V, COUT_= 2.2µF, CBP= 0.01µF, CIN= 2.2µF,and TA= +25°C,
unless otherwise noted.
LOAD TRANSIENT NEAR DROPOUT

MAX8530 toc13
ILOAD
50mA/div
10μs/div
VOUT
20mV/div
AC-COUPLED
VIN = VOUT + 0.1V
RESET RESPONSE
(MAX8530)

MAX8530 toc14
VOUT-
2V/
div
40ms/div
VINVRESET
2V/
div
2V/
div
SHUTDOWN RESPONSE

MAX8530 toc15
VOUT-
1V/
div
1ms/div
VSHDN
2V/
div
MAX8530/MAX8531
Detailed Description

The MAX8530/MAX8531 are low-power, low-dropout,
low-quiescent current linear regulators with reset
designed primarily for battery-powered applications.
For preset output voltages, refer to the Output Voltage
Selector Guide. Other combinations between 1.5V and
3.3V are available in 50mV increments. This device
supplies loads up to 200mA for OUT1 and 150mA for
OUT2. The MAX8530/MAX8531 consist of a 1.25V ref-
erence, error amplifiers, P-channel pass transistors,
reset block, and internal feedback voltage-dividers.
The 1.25V bandgap reference is connected to the error
amplifier’s inverting input. The error amplifier compares
this reference with the feedback voltage and amplifies
the difference. If the feedback voltage is lower than the
reference voltage, the pass-transistor gate is pulled
lower, allowing more current to pass to the output and
increasing the output voltage. If the feedback voltage is
too high, the pass-transistor gate is pulled up, allowing
less current to pass to the output. The output voltage is
fed back through an internal resistor voltage-divider
connected to the OUT_ pin.
RESET

The reset circuit is active at power-up and power-down.
RESETis held low at power-up. The reset timing starts
once the OUT1 voltage reaches 87% (typ) of its regula-
tion voltage. The RESETsignal goes high 200ms (typ)
after the OUT1 voltage reaches 87% (typ) of its regulation
voltage. At power-off, RESETgoes low when the OUT1
voltage is below 87% (typ) of its regulation voltage.
Dual Low-Dropout Linear Regulators
with RESETor Low-Noise Output in UCSP or QFN

ERROR
AMP
SHDN
GND
OUT1
RESET*
* MAX8530 ONLY
**MAX8531 ONLY
BP**
OUT2
MOS
DRIVER
WITH ILIMIT
DELAYTHERMAL
SENSOR
LDO2
87%
REF
1.25V
REF
SHUTDOWN
AND
POWER-ON
CONTROL
MAX8530MAX8531
Functional Diagram
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