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MAX8513
Wide-Input, High-Frequency, Triple-Output Supplies with Voltage Monitor and Power-On Reset
Pin Configurations appear at end of data sheet.
General DescriptionThe MAX8513/MAX8514 integrate a voltage-mode PWM
step-down DC-DC controller and two LDO controllers, a
voltage monitor, and a power-on reset for the lowest-cost
power-supply and monitoring solution for xDSL modems,
routers, gateways, and set-top boxes.
The DC-DC controller switching frequency can be set with
an external resistor from 300kHz to 1.4MHz, to allow for
the optimization of cost, size, and efficiency. For noise-
sensitive applications, the DC-DC controller can also
be synchronized to an external clock, minimizing noise
interference. Operation above 1.1MHz reduces noise
for high data-rate xDSL applications. An adjustable soft-
start and adjustable foldback current limit provide reliable
startup and fault protection. The DC-DC controller output
voltage can be set externally to a voltage from 1.25V to
5.5V. Current limiting is accomplished by inductor current
sensing for improved efficiency, or by an external sense
resistor for better accuracy.
The MAX8513/MAX8514s’ first LDO controller is designed
to provide a low-cost, high-current regulated output from
0.8V to 5.5V using an N-channel MOSFET or a low-
current output using a low-cost NPN transistor. The
MAX8513’s second regulator can be used to generate
0.8V to 27V output with a low-cost PNP transistor. Both
LDO regulators can operate either from the DC-DC con-
troller output or from a higher voltage derived with a fly-
back overwinding on the DC-DC converter inductor. The
MAX8514’s second LDO regulator is designed to provide
a negative output with an NPN transistor.
A sequence input allows the outputs to either power up
together, or for the DC-DC regulator to power up first and
each LDO controller to power up in sequence. An input
power-fail output (PFO) is provided for input power-fail
warning, such as in dying-gasp applications. A power-on
reset circuit with a 140ms delay is also included to indicate
when all outputs have achieved regulation and stabilized.
Applications●xDSL, Cable, ISDN Modems, and Routers●Wireless Routers●Set-Top Boxes
Features●Low-Cost DC-DC Controller with Two LDOs●Wide Input Range: 4.5V to 28V●300kHz to 1.4MHz Adjustable Switching Frequency●Low Noise for High Data-Rate xDSL Applications●Synchronizable to External Clock●Adjustable Soft-Start●Lossless Adjustable Foldback Current Limit●Power-On Reset with 140ms Delay●Adjustable Input Power-Fail Warning for Dying Gasp●Selectable Output-Voltage Sequencing or
Output-Voltage Tracking
PARTTEMP RANGEPIN-PACKAGE
MAX8513EEI-40°C to +85°C28 QSOP
MAX8514EEI-40°C to +85°C28 QSOP
MAX8514AEI -40°C to +125°C28 QSOP
STEP-
DOWN
CONTROLLER
VIN
(4.5V TO 28V)
VOUT1
(1.25V TO 5.5V)
VOUT2
(0.8V TO VOUT1)
VOUT3
(0.8V TO 27V)
LDO
CONTROLLER 1
LDO
CONTROLLER 2
OUTPUT
POWER-ON RESET
INPUT POWER-
FAIL MONITOR
MAX8513SYNC
OFF
MAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
Functional Diagram
Ordering Information
EVALUATION KIT AVAILABLE
IN, DRV3P, SUP2 to GND .....................................-0.3V to +30V
DRV2 to GND .......................................-0.3V to (VSUP2 + 0.3V)
DRV3N to GND ..................(VSUP3N - 28V) to (VSUP3N + 0.3V)
FREQ, PFI, PFO, POR, SUP3N, SYNC/EN,
CSP, CSN to GND ...............................................-0.3V to +6V
VL to GND .................-0.3V to the lesser of (VIN + 0.3V) or +6V
COMP1, FB1, FB2, FB3P, FB3N, REF, ILIM,
SS, SEQ to GND....................................-0.3V to (VVL + 0.3V)
PVL to PGND ..........................................................-0.3V to +6V
DL to PGND ............................................-0.3V to (VPVL + 0.3V)
BST to LX ................................................................-0.3V to +6V
DH to LX ..................................................-0.3V to (VBST + 0.3V)
PGND to GND ......................................................-0.3V to +0.3V
VL Short Circuit to GND ............................................Continuous
Continuous Power Dissipation
28-Pin QSOP (derate 10.8mW/°C above +70°C) .......860mW
Operating Temperature Range
MAX8513EEI, MAX8514EEI ..........................-40°C to +85°C
MAX8514AEI ................................................-40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
(VIN = VLX = VSUP2 = 12V, VPVL = VBST - VLX = VDRV3P = 5V, VSUP3N = 3.3V, VDRV3N = -5V, CVL = 4.7µF, CREF = 0.22µF, RFREQ = 15.0kΩ, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
GENERALIN Operating Range5.528.0V
IN = VL4.55.5
IN Supply Current
VFB1 = 1.3V, VFB2 = VFB3 = 1.0V, does
not include switching current to PVL and
BST, SYNC/EN = VL
2.63.2mA
IN Shutdown CurrentVSYNC/EN = 0, RFREQ = 50kΩ200300µA
VL REGULATORVL Output VoltageVIN = 6V to 28V, IVL = 0.1mA to 40mA4.7555.25V
VL Dropout VoltageFrom IN to VL, VIN = 5V, IVL = 40mA560mV
VL Line RegulationVIN = 6V to 28V, IVL = 5mA0.05%
VL Undervoltage ThresholdVL rising, VHYST = 675mV (typ)3.64.2V
OUT1 (BUCK CONVERTER)Output Voltage RangeVOUT1(Note 1)1.255.50V
FB1 Regulation ThresholdVFB11.2341.251.259V
Error-Ampliier Open-Loop
Voltage GainAVOL6590dB
FB1 Input Bias CurrentIFB1_BIASVFB1 = 1.3V-200+10+200nA
Error-Ampliier Gain Bandwidth25MHz
DH Output-Resistance HighRDH_HIGH1.52.55Ω
DH Output-Resistance LowRDH_LOW1.22.1Ω
DL Output-Resistance HighRDL_HIGH2.55Ω
DL Output-Resistance LowRDL_LOW0.71.3Ω
MAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
Absolute Maximum RatingsStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(VIN = VLX = VSUP2 = 12V, VPVL = VBST - VLX = VDRV3P = 5V, VSUP3N = 3.3V, VDRV3N = -5V, CVL = 4.7µF, CREF = 0.22µF, RFREQ = 15.0kΩ, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSCurrent-Limit Threshold (Positive)VCS
VILIM = 2.00V, VCSN = 0 to 5.5V246275300VILIM = 0.50V, VCSN = 0 to 5.5V506781
VILIM = VVL, VCSN = 0 to 5.5V151170188
Current-Limit Threshold
(Negative)VCS
VILIM = 2.00V, VCSN = 0 to 5.5V-333-272-199VILIM = 0.50V, VCSN = 0 to 5.5V-90-67-42
VILIM = VVL, VCSN = 0 to 5.5V-210-166-122
CSP and CSN Bias CurrentVCSP = VCSN = 0 to 5.5V-120+135µA
ILIM Bias CurrentVILIM = 1.25V-5.3-5-4.7µA
SS Soft-Start Charge CurrentVSS = 0.6V152535µA
Soft-Start Discharge Resistance100200Ω
LX, BST, PVL Leakage CurrentVLX = VIN = 28V, VBST = 33V, VPVL = 5V,
VSYNC/EN = 00.0320µA
FB1 Power-On Reset Threshold1.081.1251.20V
OUT2 (POSITIVE LDO)SUP2 Operating RangeVSUP2(Note 1)4.528.0V
DRV2 Clamp VoltageVDRV2VFB2 = 0.75V7.759.00V
SUP2 Supply Current160300µA
SUP2 Shutdown Supply Current VSYNC/EN = 0310µA
FB2 Regulation VoltageVFB20.7840.800.808V
FB2 Input Bias CurrentIFB2_BIASVFB2 = 0.75V0.01100nA
DRV2 Output Current LimitVIN = 5V, VDRV2 = 5V, VFB2 = 0.77V1530mA
DRV2 Output Current Limit
During Soft-StartVIN = 6V, VDRV2 = 5V, VFB2 = 0.70V81012mA
FB2 Power-On Reset Threshold0.6900.7200.742V
FB2 to DRV2 TransconductanceGC2IDRV2 = +250µA, -250µA0.120.20.36S
OUT3P (POSITIVE PNP LDO) (MAX8513 ONLY)DRV3P Operating RangeVDRV3P128V
FB3P Regulation VoltageVDRV3P = 5V, IDRV3P = 1mA0.7900.8030.816V
FB3P to DRV3P Large-Signal
TransconductanceGC3PVDRV3P = 5V, IDRV3P = 0.5mA to 5mA0.380.61.1S
Feedback Input Bias CurrentVFB3P = 0.75V0.01100nA
Driver Sink CurrentVFB3P = 0.75V
DRV3P = 2.5V1535DRV3P = 4.0V40
FB3P POR Threshold0.6900.7200.742V
FB3P Soft-Start Period1312Clock
Cycles
MAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
Electrical Characteristics (continued)
(VIN = VLX = VSUP2 = 12V, VPVL = VBST - VLX = VDRV3P = 5V, VSUP3N = 3.3V, VDRV3N = -5V, CVL = 4.7µF, CREF = 0.22µF, RFREQ = 15.0kΩ, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
OUT3N (NEGATIVE NPN LDO CONTROLLER) (MAX8514 ONLY)SUP3N Operating Range (Note 1)1.55.5V
DRV3N Operating Range(Note 1)VSUP3N
- 21V
VSUP3N
- 1.5VV
SUP3N Supply CurrentVDRV3N = 1.5V, VSUP3N = 3.5V,
IDRV3N = -1mA (source)1.12mA
FB3N Regulation VoltageVDRV3N = 1.5V, VSUP3N = 3.5V,
IDRV3N = -1mA (source)-20-5+10mV
FB3N to DRV3N Large-Signal
TransconductanceGC3N VDRV3N = 0, IDRV3N = -0.5mA to -5mA
(source)0.2250.360.550S
Feedback Input Bias CurrentVFB3N = -100mV601000nA
Driver Source CurrentVFB3N = 200mV, VDRV3N = 0,
VSUP3N = 3.5V1325mA
FB3N POR Threshold450500550mV
FB3N Soft-Start Period2048Clock
Cycles
REFERENCEREF Output VoltageVREF-2µA < IREF < +50µA1.2311.251.269V
OSCILLATORFrequencyfS
RFREQ = 10.7kΩ ±1% from FREQ to GND130013901460
kHzRFREQ = 15.0kΩ ±1% from FREQ to GND9339851040
RFREQ = 50.0kΩ ±1% from FREQ to GND260290324
FREQ Resistance-Frequency
Product15.0MHz x kΩ
Maximum Duty Cycle
(Measured at DH Pin)
RFREQ = 10.7kΩ ±1% from FREQ to GND778391RFREQ = 15.0kΩ ±1% from FREQ to GND808795
RFREQ = 50.0kΩ ±1% from FREQ to
GND939699
Minimum On-Time
(Measured at DH Pin)RFREQ = 10.7kW ±1% from FREQ to GND2062ns
SYNC/EN Pulse WidthLow or high (Note 1)200ns
SYNC/EN Frequency Range
SYNC/EN input frequency needs to be within ±30% of the value set at the FREQ
pin (Note 1)
2001850kHz
SYNC/EN Input Voltage, High2.4V
SYNC/EN Input Voltage, Low0.8V
SYNC/EN Input CurrentVSYNC/EN = 0 to 5.5V-1+1µA
MAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
Electrical Characteristics (continued)
(VIN = VLX = VSUP2 = 12V, VPVL = VBST - VLX = VDRV3P = 5V, VSUP3N = 3.3V, VDRV3N = -5V, CVL = 4.7µF, CREF = 0.22µF, RFREQ = 15.0kΩ, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
(VIN = VLX = VSUP2 = 12V, VPVL = VBST - VLX = VDRV3P = 5V, VSUP3N = 3.3V, VDRV3N = -5V, CVL = 4.7µF, CREF = 0.22µF, RFREQ = 15.0kΩ, TA = -40°C to +125°C (Note 2), unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
SEQ, PFI, PFO, PORSEQ Input-Voltage High2.4V
SEQ Input-Voltage Low0.8V
SEQ Input CurrentVSEQ = 0 to VVL110µA
POR Output-Voltage LowVFB1, VFB2, VFB3P,
VFB3N, out-of-regulation
IPOR = 1.6mA10200IPOR = 0.1mA,
VIN = 1.0V20200
POR Output Leakage CurrentVFB1, VFB2, and VFB3P or VFB3N,
in-regulation0.0011µA
POR Power-Ready Delay TimeFrom VFB1, VFB2, and VFB3P or VFB3N,
in-regulation to POR = high impedance140315560ms
PFI Input ThresholdFalling, VHYST = 20mV1.201.221.25V
PFI Input Bias CurrentVPFI = 1.0V0.1100nA
PFO Output-Voltage LowPFI = 1.1V
IPFO = 1.6mA20200IPFO = 0.1mA,
VIN = 1.0V 10200
PFO Output Leakage CurrentPFI = 1.4V, PFO = 5V0.0011µA
THERMAL PROTECTIONThermal ShutdownJunction temperature rising+170°C
Thermal-Shutdown Hysteresis25°C
PARAMETERSYMBOLCONDITIONSMINMAXUNITS
GENERALIN Operating Range5.528.0VIN = VL4.55.5
IN Supply Current
VFB1 = 1.3V, VFB2 = VFB3 = 1.0V, does not
include switching current to PVL and BST,
SYNC/EN = VL
3.2mA
IN Shutdown CurrentVSYNC/EN = 0, RFREQ = 50kΩ300µA
VL REGULATORVL Output VoltageVIN = 6V to 28V, IVL = 0.1mA to 40mA4.755.25V
VL Dropout VoltageFrom IN to VL, VIN = 5V, IVL = 40mA610mV
VL Undervoltage ThresholdVL rising, VHYST = 675mV (typ)3.64.2V
MAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
Electrical Characteristics (continued)
Electrical Characteristics
(VIN = VLX = VSUP2 = 12V, VPVL = VBST - VLX = VDRV3P = 5V, VSUP3N = 3.3V, VDRV3N = -5V, CVL = 4.7µF, CREF = 0.22µF, RFREQ = 15.0kΩ, TA = -40°C to +125°C (Note 2), unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINMAXUNITS
OUT1 (BUCK CONVERTER)Output Voltage RangeVOUT1(Note 1)1.255.50V
FB1 Regulation ThresholdVFB11.2251.265V
Error-Ampliier Open-Loop
Voltage GainAVOL65dB
FB1 Input Bias CurrentIFB1_BIASVFB1 = 1.3V-200+200nA
DH Output-Resistance HighRDH_HIGH2.55Ω
DH Output-Resistance LowRDH_LOW2.1Ω
DL Output-Resistance HighRDL_HIGH5Ω
DL Output-Resistance LowRDL_LOW1.3Ω
Current-Limit Threshold (pos)VCS
VILIM = 2.00V, VCSN = 0 to 5.5V243303VILIM = 0.50V, VCSN = 0 to 5.5V4983
VILIM = VVL, VCSN = 0 to 5.5V147190
Current-Limit Threshold (neg)VCS
VILIM = 2.00V, VCSN = 0 to 5.5V-333-199VILIM = 0.50V, VCSN = 0 to 5.5V-90-42
VILIM = VVL, VCSN = 0 to 5.5V-210-122
CSP and CSN Bias CurrentVCSP = VCSN = 0 to 5.5V-120+135µA
ILIM Bias CurrentVILIM = 1.25V-5.7-4.3µA
SS Soft-Start Charge CurrentVSS = 0.6V1535µA
Soft-Start Discharge Resistance200Ω
LX, BST, PVL Leakage CurrentVLX = VIN = 28V, VBST = 33V, VPVL = 5V, SYNC/EN = 020µA
FB1 Power-On Reset Threshold1.081.20V
OUT2 (POSITIVE LDO)SUP2 Operating RangeVSUP2(Note 1)4.528.0V
DRV2 Clamp VoltageVDRV2VFB2 = 0.75V7.759.00V
SUP2 Supply Current300µA
SUP2 Shutdown Supply CurrentVSYNC/EN = 010µA
FB2 Regulation VoltageVFB20.7750.816V
FB2 Input Bias CurrentIFB2_BIASVFB2 = 0.75V150nA
DRV2 Output Current LimitVIN = 5V, VDRV2 = 5V, VFB2 = 0.77V12mA
DRV2 Output Current Limit
During Soft-StartVIN = 6V, VDRV2 = 5V, VFB2 = 0.70V812mA
FB2 Power-On Reset Threshold0.6900.742V
FB2 to DRV2 TransconductanceGC2IDRV2 = +250µA, -250µA0.110.41S
MAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
Electrical Characteristics (continued)
(VIN = VLX = VSUP2 = 12V, VPVL = VBST - VLX = VDRV3P = 5V, VSUP3N = 3.3V, VDRV3N = -5V, CVL = 4.7µF, CREF = 0.22µF, RFREQ = 15.0kΩ, TA = -40°C to +125°C (Note 2), unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINMAXUNITS
OUT3P (POSITIVE PNP LDO) (MAX8513 ONLY)DRV3P Operating RangeVDRV3P128V
FB3P Regulation VoltageVDRV3P = 5V, IDRV3P = 1mA0.7800.820V
FB3P to DRV3P Large-Signal
TransconductanceGC3PVDRV3P = 5V, IDRV3P = 0.5mA to 5mA0.31.4S
Feedback Input Bias CurrentVFB3P = 0.75V100nA
Driver Sink CurrentVFB3P = 0.75VDRV3P = 2.5V15mA
FB3P POR Threshold0.6900.742V
OUT3N (NEGATIVE NPN LDO CONTROLLER) (MAX8514 ONLY)SUP3N Operating Range(Note 1)1.55.5V
DRV3N Operating Range(Note 1)VSUP3N
-21V
VSUP3N
-15VV
SUP3N Supply CurrentVDRV3N = 1.5V, VSUP3N = 3.5V,
IDRV3N = -1mA (source)2mA
FB3N Regulation VoltageVDRV3N = 1.5V, VSUP3N = 3.5V,
IDRV3N = -1mA (source)-20+10mV
FB3N to DRV3N Large-Signal
TransconductanceGC3N
VDRV3N = 0, IDRV3N = -0.5mA to -5mA
(source)0.2250.550S
Feedback Input Bias CurrentVFB3N = -100mV1500nA
Driver Source CurrentVFB3N = 200mV, VDRV3N = 0,
VSUP3N = 3.5V13mA
FB3N POR Threshold450550mV
REFERENCEREF Output VoltageVREF-2µA < IREF < +50µA1.221.27V
OSCILLATORFrequencyfS
RFREQ = 10.7kΩ ±1% from FREQ to GND13001500
kHzRFREQ = 15.0kΩ ±1% from FREQ to GND9171070
RFREQ = 50.0kΩ ±1% from FREQ to GND250335
Maximum Duty Cycle
(Measured at DH Pin)
RFREQ = 10.7kΩ ±1% from FREQ to GND7791RFREQ = 15.0kΩ ±1% from FREQ to GND8095
RFREQ = 50.0kΩ ±1% from FREQ to GND9399
Minimum On-Time
(Measured at DH Pin)RFREQ = 10.7kΩ ±1% from FREQ to GND62ns
SYNC/EN Pulse WidthLow or high (Note 1)200ns
SYNC/EN Frequency Range
SYNC/EN input frequency needs to be within ±30% of the value set at the FREQ
pin (Note 1)
2001850kHz
MAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
Electrical Characteristics (continued)
(VIN = VLX = VSUP2 = 12V, VPVL = VBST - VLX = VDRV3P = 5V, VSUP3N = 3.3V, VDRV3N = -5V, CVL = 4.7µF, CREF = 0.22µF, RFREQ = 15.0kΩ, TA = -40°C to +125°C (Note 2), unless otherwise noted.)
Note 1: Guaranteed by design, not production tested.
Note 2: Specifications to -40°C are guaranteed by design, not production tested.
PARAMETERSYMBOLCONDITIONSMINMAXUNITSSYNC/EN Input Voltage, High2.4V
SYNC/EN Input Voltage, Low0.8V
SYNC/EN Input CurrentVSYNC/EN = 0 to 5.5V-1+1µA
SEQ, PFI, PFO, PORSEQ Input Voltage, High2.4V
SEQ Input Voltage, Low0.8V
SEQ Input CurrentVSEQ = 0 to VVL10µA
POR Output Voltage, LowVFB1, VFB2, VFB3P, FB3N out-of-regulation
IPOR = 1.6mA200mV
IPOR = 0.1mA,
VIN = 1.0V200mV
POR Output Leakage CurrentVFB1, VFB2, and VFB3P or VFB3N,
in- regulation1µA
POR Power-Ready Delay TimeFrom VFB1, VFB2, and VFB3P or VFB3N,
in- regulation to POR = high impedance140560ms
PFI Input ThresholdFalling, VHYST = 20mV1.201.25V
PFI Input Bias CurrentVPFI = 1.0V300nA
PFO Output Voltage, LowPFI = 1.1V
IPFO = 1.6mA200mV
IPFO = 0.1mA,
VIN = 1.0V200mV
PFO Output Leakage CurrentPFI = 1.4V, PFO = 5V1µA
MAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
Electrical Characteristics (continued)
(Circuit of MAX8513 evaluation kit, VIN = 12V, TA = +25°C, fS = 1.4MHz, unless otherwise noted.)
(TA = +25°C, unless otherwise noted.)
EFFICIENCY vs. IOUT1
(IOUT2 = 0, IOUT3 = 0)MAX8513/14 toc02
IOUT1 (A)
EFFICIENCY (%)
VIN = 9V
VIN = 12V
VIN = 16V
VOUT1 vs. IOUT1MAX8513/14 toc03
IOUT1 (A)
OUT1
(V)
VOUT2 = 2.5V AT 0.75A
VOUT3 = 12V AT 25mA
VOUT2 vs. IOUT2MAX8513/14 toc04
IOUT2 (A)
OUT2
(V)
VOUT1 = 3.3V AT 1A
VOUT3 = 12V AT 25mA
VOUT3 vs. IOUT3MAX8513/14 toc05
IOUT3 (mA)
OUT3
(V)403035101520255
VOUT1 = 3.3V AT 1A
VOUT2 = 2.5V AT 0.75A
VOUT1 vs. VINMAX8513/14 toc06
VIN (V)
OUT1
(V)1614159101112138
IOUT1 = 0
IOUT1 = 3A
VOUT2 = 2.5V AT 0.75A
VOUT3 = 12V AT 25mA
VOUT2 vs. VINMAX8513/14 toc07
OUT2
(V)1614159101112138
IOUT2 = 0
IOUT2 = 1.5A
VOUT1 = 3.3V AT 1A
VOUT3 = 12V AT 25mA
EFFICIENCY vs. VINMAX8513/14 toc01
VIN (V)
EFFICIENCY (%)1614159101112138
VOUT1 = 3.3V, IOUT1 = 2A
VOUT2 = 2.5V, IOUT2 = 1.5A
VOUT3 = 12V, IOUT3 = 50mA
VOUT3 vs. VINMAX8513/14 toc08
OUT3
(V)1614159101112138
IOUT3 = 0
IOUT3 = 50mA
VOUT1 = 3.3V AT 1A
VOUT2 = 2.5V AT 0.75A
OSCILLATOR FREQUENCY
vs. INPUT VOLTAGEMAX8513/14 toc09
OSCILLATOR FREQUENCY (MHz)1614159101112138
RFREQ = 10.7kΩ
TA = -40°C
TA = +85°C
TA = +25°C
MAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
Typical Operating Characteristics
(Circuit of MAX8513 evaluation kit, VIN = 12V, TA = +25°C, fS = 1.4MHz, unless otherwise noted.)
OUTPUT1 LOAD-TRANSIENT RESPONSEMAX8513/14 toc10
40µs/div
50mV/div
50mV/div
100mV/div
VOUT1
AC-COUPLED
VOUT2
AC-COUPLED
VOUT3
AC-COUPLED
IOUT1
1A/div
IOUT2 = 0.75A, IOUT3 = 25mA
OUTPUT3 LOAD-TRANSIENT RESPONSEMAX8513/14 toc11
40µs/div
50mV/div
50mV/div
50mV/div
5mA
VOUT1
AC-COUPLED
VOUT2
AC-COUPLED
VOUT3
AC-COUPLED
IOUT3
50mA/div
IOUT1 = 1A, IOUT2 = 0.75A
MAX8513/14 toc12
200ns/div
VDH
10V/div
VDL
5V/div
VLX
10V/div
VD2
(ANODE)
20V/div
SWITCHING WAVEFORMS
(ALL OUTPUTS AT FULL LOAD)MAX8513/14 toc13
1µs/div
VDH
5V/div
VDL
10V/div
SYNC/EN
5V/div
SYNCHRONIZATIONMAX8513/14 toc14
VIN
5V/div
VOUT1
2V/div
IOUT1 = 2A, IOUT2 = 1.5A, IOUT3 = 50mA
PFO
2V/div
PFO RESPONSEMAX8513/14 toc15
VOUT3
10V/div
VOUT1
2V/div
VOUT2
5V/div
POR
5V/div
POR RESPONSEMAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
Typical Operating Characteristics (continued)
(Circuit of MAX8513 evaluation kit, VIN = 12V, TA = +25°C, fS = 1.4MHz, unless otherwise noted.)
MAX8513/14 toc16
2ms/div
VOUT2
2V/div
SYNC/EN
5V/div
VOUT3
5V/div
VOUT1
2V/div
STAGGERED SEQUENCE (SEQ = GND)MAX8513/14 toc17
4ms/div
VOUT2
2V/div
SYNC/EN
5V/div
VOUT3
5V/div
VOUT1
2V/div
TRACKING SEQUENCE (SEQ = VL)MAX8513/14 toc18
20µs/div
2A/div
VOUT1
2V/div
VLX
10V/div
OUTPUT1 SHORT CIRCUIT
(ALL OUTPUTS AT FULL LOAD)MAX8513/14 toc19
20µs/div
2A/div
VOUT1
2V/div
VLX
10V/div
OUTPUT1 SHORT CIRCUIT
(ALL OUTPUTS AT NO LOAD)OUTPUT RIPPLE AND HARMONICS
(MEASURED AT OUT1)
MAX8513/14 toc20
NOISE (mV)
VIN = 12V
VOUT1 = 3.3V AT 2A
VOUT2 = 2.5V AT 1.5A
VOUT3 = 12V AT 50mA
MAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
Typical Operating Characteristics (continued)
PIN
NAMEMAX8513MAX8514FUNCTIONPFI 11
Power-Fail Input. Connect PFI to an external resistive-divider between IN, PFI, and GND.
PFI senses VIN to detect voltage failure. Trip falling threshold at this input is 1.22V, with
20mV of hysteresis.
PFO22Power-Fail Output. Open-drain output that goes low if VPFI < 1.22V.33OUT1 High-Side Gate-Drive Output. DH drives the high-side N-channel MOSFET (Q1 in the
Typical Applications Circuits). DH is a loating driver output that swings from LX to BST.44OUT1 High-Side Driver Return Path. The high-side FET driver uses BST and LX for its
respective high and low-side supplies.
BST55OUT1 Boost Capacitor Connection for High-Side Gate Drive. Connect a 0.1µF ceramic
capacitor from BST to LX with a less than 5mm trace length.66OUT1 Low-Side Gate-Drive Output. DL drives the low-side N-channel MOSFET (Q2 in the
Typical Applications Circuits). DL swings from 0 to VPVL.
PVL77OUT1 Gate-Drive Supply Bypass Connection. Connect PVL to VL through a 10Ω resistor
(R15), and bypass PVL to PGND with a minimum 1µF capacitor (C1).
PGND88Power-Ground Connection and Low-Side Supply for Dl Driver99
Internal +5V Linear-Regulator Bypass Pin. Bypass VL to GND with a minimum 2.2µF
ceramic capacitor (C10) and 5mm or less of trace length. VL should be connected to IN
when VIN < 5.5V.
COMP11010OUT1 Compensation Node. See the OUT1 Compensation section.
FB11111OUT1 Feedback Input. Connect a resistive-divider (R1, R2) from OUT1 to FB1 to GND to
regulate FB1 at 1.25V.
FREQ1212
Oscillator Frequency-Set Input. A resistor from FREQ to GND sets the oscillator frequency from 300kHz to 1.4MHz (f = 15MHz x kΩ / RFREQ). RFREQ is still required if an external clock is used at SYNC/EN, and the SYNC/EN input frequency should be within ±30% of the
frequency set by RFREQ.
REF13131.25V Reference Output. Connect a 0.1µF or larger ceramic capacitor (C9) from REF to
GND.
GND1414Analog/Signal Ground
FB21515OUT2 Feedback Input. Connect a resistive-divider (R5, R6) from OUT2 to FB2 to GND to
regulate FB2 to 0.8V.
DRV21616OUT2 Gate Drive. DRV2 connects to the gate of an external N-channel MOSFET to form a
positive linear voltage regulator.
SUP21717Supply Input for DRV2. Connect to a voltage source of at least 1V above the maximum
desired DRV2 gate voltage.
MAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
Pin Description
PIN
NAMEMAX8513MAX8514FUNCTIONSEQ1818
Connect to VL for output tracking. Connect to GND for output staggered sequence.
Staggered sequence ramps up VOUT2 and VOUT3 softly to avoid glitches on the previous
voltage due to charging of the LDO’s output capacitors.
SYNC/EN1919
Shutdown Control and Synchronization Input. There are three operating modes:
• When SYNC/EN is low, the controller is off but the VL regulator is still running.
• When SYNC/EN is high, the controller is enabled with the switching frequency set by
RFREQ.
• When SYNC/EN is driven by an external clock, the controller is enabled and switches at
the external clock frequency.
N.C.20—No Connection. Not internally connected. Connect to GND or leave loating.
SUP3N—20OUT3N Base-Drive Supply. Connect SUP3N to any positive voltage between 1.5V and 5.5V
to provide power for the negative linear-regulator transistor driver.
DRV3P21—OUT3P Base Drive. Connect DRV3P to the base of an external PNP pass transistor to form
a positive linear voltage regulator.
DRV3N—21OUT3N Base Drive. Connect DRV3N to the base of an external NPN pass transistor to form
a negative linear voltage regulator.2222Main Voltage Input (4.5V to 28V). Bypass IN to GND, close to the IC, with a minimum 1µF
ceramic capacitor (C2). IN powers the linear regulator whose output is VL.
POR 2323Power-On Reset. Open-drain output that goes high after all outputs reach the regulation limit
and a 315ms delay time has elapsed.
FB3P24—OUT3P Feedback Input. FB3P is referenced to 0.8V and connects to a resistive-divider
(R13, R14) to control a positive linear voltage regulator.
FB3N—24OUT3N Feedback Input. Connect a resistive-divider (R13, R14) from OUT1 to FB3N to
OUT3N to regulate FB3N to 0V.
ILIM2525ILIM Set Input. Connect a resistive-divider (R17, R18) from OUT1 to ILIM to GND. See the
Current Limit section.
CSP2626Positive Current-Sense Input. Used to detect OUT1 current limit.
CSN2727Negative Current-Sense Input. Used to detect OUT1 current limit.2828
Analog Soft-Start Control Input. This pin goes into the positive input of the VOUT1’s error ampliier. When the MAX8513/MAX8514 are turned on, SS is at GND and charges up to
1.25V with a constant 25µA. Connect a capacitor (C13) from SS to GND for the desired
soft-start time.
MAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
Pin Description (continued)
Figure 1. MAX8513 Functional Diagram
MAX8513REFERENCEN
ERROR
AMP
SYNC/EN
GND
FREQ
SEQ
PFI
REF
FB3P
DRV3P
FB2
DRV2
SUP2
ILIM
COMP
FB1
CSN
CSP
PGND
PVL
BST
PWM
COMP.
BIAS
5µA1/7.5
GC2
GC3P
1.25V
0.8V
0.8V
1VP-P
PFO
POR
MAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
Figure 2. MAX8514 Functional Diagram
MAX8514ERROR
AMP
SYNC/EN
GND
FREQ
SEQ
PFI
REF
FB3N
DRV3N
FB2
SUP3N
DRV2
SUP2
ILIM
COMP
FB1
CSN
CSP
PGND
PVL
BST
PWM
COMP.
BIAS
5µA1/7.5
GC2
GC3N
1.25V
0.8V
1VP-P
PFO
POR
REFERENCE
MAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
Detailed DescriptionThe MAX8513/MAX8514 combine a step-down DC-DC
converter and two LDOs, providing three output volt-
ages for xDSL modem and set-top box applications. The
switching frequency is set with an external resistor con-
nected from the FREQ pin to GND, and is adjustable from
300kHz to 1.4MHz. The main step-down DC-DC control-
ler operates in a voltage-mode, pulse-width-modulation
(PWM) control scheme. The MAX8513/MAX8514 include
two low-cost LDO controllers capable of delivering current
from the DC-DC main output, an extra winding, the input,
or from an alternate supply voltage. The first LDO control-
ler drives an external NMOS or NPN with a maximum
drive of 7.75V. The second LDO controller provides either
a positive 0.8V to 27V output using an external PNP pass
device, or a negative -1V to -18V output with an external
NPN pass device.
DC-DC ControllerThe MAX8513/MAX8514 step-down DC-DC converters
use a PWM voltage-mode control scheme. An internal
high-bandwidth (25MHz) operational amplifier is used
as an error amplifier to regulate the output voltage. The
output voltage is sensed and compared with an internal
1.25V reference to generate an error signal. The error
signal is then compared with a fixed-frequency ramp by
a PWM comparator to give the appropriate duty cycle to
maintain output-voltage regulation. At the rising edge of
the internal clock and when DL (the low-side MOSFET
gate drive) is at 0V, the high-side MOSFET turns on.
When the ramp voltage reaches the error-amplifier output
voltage, the high-side MOSFET latches off until the next
clock pulse. During the high-side MOSFET on-time, cur-
rent flows from the input through the inductor to the output
capacitor and load. At the moment the high-side MOSFET
turns off, the energy stored in the inductor during the on-
time is released to support the load. The inductor current
ramps down through the low-side MOSFET body diode.
After a fixed delay, the low-side MOSFET turns on to
shunt the current from its body diode for a lower voltage
drop to increase the efficiency. The low-side MOSFET
turns off at the rising edge of the next clock pulse, and
when its gate voltage discharges to zero, the high-side
MOSFET turns on after an additional fixed delay and
another cycle starts.
The MAX8513/MAX8514 operate in forced-PWM mode,
so even under light load the controller maintains a con-
stant switching frequency to minimize noise and possible
interference with system circuitry.
Current LimitThe MAX8513/MAX8514s’ switching regulator senses
the inductor current either through the DC resistance of
the inductor itself for lossless sensing, or through a series
resistor for more accurate sensing. When using the DC
resistance of the inductor, an RC filter circuit is needed
(see R19, R20, and C14 of the Typical Applications
Circuits and the Current-Limit Setting section). When
peak voltage across the sensing circuit (which occurs at
the peak of the inductor current) exceeds the current-limit
threshold set by ILIM, the controller turns off the high-
side MOSFET and turns on the low-side MOSFET. The
inductor current ramps down and DH turns on again if
the inductor current is below the current-limit threshold
at the next clock pulse. The MAX8513/MAX8514 current-
limit threshold can be set by two external resistors to be
proportional to the output voltage with an adjustable offset
level, providing foldback current-limit and short-circuit
protection. This feature greatly reduces power dissipation
and prevents overheating of external components during
an indefinite short-circuit at the output. See the Foldback
Current Limit section for how to set ILIM with external
resistors. The current-limit threshold defaults to 170mV
when ILIM is connected to VL, and in this case, the cur-
rent limit functions as a constant current limit only. The
LDO controllers do not have current limit and rely on input
current limit for protection.
Synchronous-Rectiier Driver (DL)Synchronous rectification reduces the conduction loss in
the rectifier by replacing the normal Schottky catch diode
with a low-on-resistance MOSFET switch. The MAX8513/
MAX8514 also use the synchronous rectifier to ensure
proper startup of the boost gate-drive circuit.
High-Side Gate-Drive Supply (BST)flying-capacitor boost circuit (see D1 and C3 in the
Typical Applications Circuits) generates the gate-drive
voltage for the high-side N-channel MOSFET. On startup,
the synchronous rectifier (low-side MOSFET, Q2) forces
LX to ground and charges the boost capacitor (C3) to
VVL - VDIODE. On the second half-cycle, the controller
turns on the high-side MOSFET by closing an internal
switch between BST and DH. This boosts the voltage
at BST to VVL - VDIODE + VIN, providing the necessary
gate-to-source voltage to turn on the high-side N-channel
MOSFET.
MAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
Internal 5V Linear RegulatorAll MAX8513/MAX8514 functions (except for the positive
output LDO with an NFET or NPN, and the negative LDO
on the MAX8514) are powered from the on-chip low-drop-
out 5V regulator with its input connected to IN. Bypass the
regulator’s output (VL) with a 2.2µF or greater ceramic
capacitor. The VIN to VVL dropout voltage is typically
350mV, so when VIN is greater than 5.5V, VVL is typically
5V. If VIN is between 4.5V and 5.5V, short VL to IN.
Undervoltage LockoutIf VVL drops below 3.8V, the MAX8513/MAX8514 assume
that the supply voltage is too low to make valid decisions.
When this happens, the undervoltage lockout (UVLO)
circuitry inhibits switching, forces POR and PFO low,
and forces DL and DH gate drivers low. After VVL rises
above 3.9V, the controller powers up the outputs (see the
Startup section).
StartupThe MAX8513/MAX8514 start switching when VVL rises
above the 3.9V UVLO threshold. However, the controller
is not enabled unless all three of the following conditions
are met:
1) VVL exceeds the 3.9V UVLO threshold.
2) The internal reference exceeds 90% of its nominal
value.
3) The thermal limit is not exceeded.
Once the MAX8513/MAX8514 assert the internal enable
signal, the step-down controller starts switching and
enables soft-start. The soft-start circuitry gradually ramps
up to the reference voltage to control the rate-of-rise of
the step-down controller and reduce input surge currents.
The soft-start period is determined by the value of the
capacitor from SS to GND (C13 in the Typical Applications
Circuits). SS sources a constant 25µA to charge the soft-
start capacitor to 1.25V.
Output-Voltage SequencingThe MAX8513/MAX8514 can power up in either stag-
gered-output sequencing or output tracking. For stag-
gered-output sequencing, connect SEQ to GND. In this
configuration, VOUT1 comes up first. When it reaches
90% of the nominal regulated value, VOUT2 is softly
turned on. Once VOUT2 reaches 90% of its nominal regu-
lated value, VOUT3 is softly turned on. Individual soft-start
on OUT2 and OUT3 eliminates glitches on the previous
stages due to the charging of output capacitors. See the
Typical Operating Characteristics section for the startup
and staggered-output-sequence waveforms.
Output-Voltage TrackingWhen SEQ is connected to VL, all outputs rise up at the
same time and the external series pass transistors are
driven fully on until reaching the respective regulation
limits. Since the LDOs are powered from the main DC-DC
step-down converter, either directly or through a coupled
winding on the inductor, their outputs track the DC-DC
step-down output (OUT1). See the Typical Operating
Characteristics section for the startup output- tracking
waveforms.
Power-On ResetThe MAX8513/MAX8514 provide a power-on-reset (POR)
signal, which goes high 315ms after all outputs reach
90% of their nominal regulated value. Therefore, by the
time POR goes high, all outputs are already stabilized at
nominal regulated voltages. See the Typical Operating
Characteristics section for the POR waveforms.
Input Power-Fail (PFI and PFO)The MAX8513/MAX8514 have a built-in comparator to
detect the input voltage with an external resistive- divider
at PFI, with a threshold of 1.22V. When the input voltage
drops and trips this comparator, the power-fail output
(PFO) goes low, while all outputs are still within regulation
limits. This is typically used for input power-fail warning
for orderly system shutdown. The amount of warning
time depends on the input storage capacitor, the input
PFI trip voltage level, the main step-down output voltage,
the total output power, and the efficiency. See the Design
Procedure section for how to calculate the input capacitor
to meet the required warning time.
Enable and SynchronizationThe MAX8513/MAX8514 can be turned on with logic high,
and off with logic low at SYNC/EN. When SYNC/EN is
driven with an external clock, the internal oscillator syn-
chronizes the rising edge of the clock at SYNC/EN to DH
going high. When being driven by a synchronization clock
signal at SYNC/EN, the controller synchronizes to the
external clock within two cycles. The frequency at SYNC/EN needs to be within ±30% of the value set by RFREQ.
See the Switching-Frequency Setting section.
MAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
Thermal-Overload ProtectionThermal-overload protection limits the total power dissipa-
tion in the MAX8513/MAX8514. When the junction tem-
perature exceeds TJ = +170°C, a thermal sensor shuts
down the device, forcing DL and DH low and allowing the
IC to cool. The thermal sensor turns the part on again
after the junction temperature cools by 25°C, resulting
in a pulsed output during continuous thermal-overload
conditions. During a thermal event, the main step-down
converter and the linear regulators are turned off, POR
and PFO go low, and soft-start is reset.
Design Procedure
OUT1 Voltage SettingThe output voltage is set by a resistive-divider network
from OUT1 to FB1 to GND (see R1 and R2 in the Typical
Applications Circuits). Select R2 between 5kΩ and 15kΩ.
Then R1 can be calculated by:
OUT1VR1 R2 - 11.25V=×
Input Power-Fail SettingThe PFI input can monitor VIN to determine if it is falling.
When the voltage at PFI crosses 1.22V, the output (PFO)
goes low. The input voltage value at the PFI trip threshold,
VPFI, is set by a resistive-divider network from IN to PFI to
GND (see the Typical Applications Circuits). Select R11, the resistor from PFI to GND between 10kΩ and 40kΩ.
Then R10, the resistor from PFI to IN, is calculated by:
PFIVR10 R11 - 11.22V=×
Switching-Frequency SettingThe resistor connected from FREQ to GND, RFREQ (R7
in the Typical Applications Circuits), sets the switching
frequency, fS, as shown by the equation below:FREQ
15 10f Hz R×=×W
where RFREQ is in ohms.
Inductor ValueThere are several parameters that must be examined
when determining which inductor to use: input voltage,
output voltage, load current, switching frequency, and LIR.
the maximum DC load current. A higher LIR value allows
for a smaller inductor but results in higher losses and
higher output ripple. A good compromise between size
and efficiency is a 30% LIR. Once all of the parameters
are chosen, the inductor value is determined as follows:()OUT1INOUT1SOUT1_MAX V - VL V f I LIR×=×××
where VOUT1 is the main switching regulator output and
fS is the switching frequency.
Choose a standard value close to the calculated value.
The exact inductor value is not critical and can be adjusted
to make tradeoffs between size, cost, and efficiency. Lower
inductor values minimize size and cost, but also increase
the output ripple and reduce the efficiency due to higher
peak currents. On the other hand, higher inductor values
increase efficiency, but eventually resistive losses due to
extra turns of wire exceed the benefit gained from lower
AC current levels. Find a low-loss inductor with the lowest
possible DC resistance that fits the allotted dimensions.
Ferrite cores are often the best choice, although powdered
iron is inexpensive and can work well up to 300kHz. The
chosen inductor’s saturation current rating must exceed
the peak inductor current as calculated below:()INOUT1OUT1PEAKOUT1_MAXIN - V V I I 2 L f V×=+×××
This peak value should be smaller than the value set at
ILIM when VOUT1 is at its nominal regulated voltage (see
the Current Limit and Current-Limit Setting sections).
In applications where a multiple winding inductor (coupled
inductor) is used to generate the supply voltages for the
LDOs, the inductance value calculated above is for the
winding connected to the DC-DC step-down (primary wind-
ings) inductance. The inductance seen from the other wind-
ings (secondary windings) is proportional to the square of
the turns ratio with respect to the primary winding.
The turns ratio is important since it sets the LDOs’ supply
voltage values. The voltage generated by the secondary
winding (VSEC) together with the rectifier diode and out-
put capacitor is calculated as follows:()2SECOUT1 Q2D21V V V - V n=+×
where VQ2 and VD2 are the voltage drops across the
low-side MOSFET on the primary side and the rectifier
MAX8513/MAX8514Wide-Input, High-Frequency Triple-Output Supplies
with Voltage Monitor and Power-On Reset
