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MAX7491MAXIMN/a2avaiDual Universal Switched-Capacitor Filters


MAX7491 ,Dual Universal Switched-Capacitor FiltersApplicationsPIN-PART TEMP RANGE VOLTAGETunable Active FiltersPACKAGE(+V)Multipole FiltersMAX7490CEE ..
MAX7491EEE ,Dual Universal Switched-Capacitor FiltersFeaturesThe MAX7490/MAX7491 consist of two identical low- Dual 2nd-Order Filter in a 16-Pin QSOP P ..
MAX7491EEE+ ,Dual Universal Switched-Capacitor FiltersELECTRICAL CHARACTERISTICS—MAX7490(V = V = +5V; f = 625kHz; 10kΩ || 50pF load to V /2 at LP_, BP_, ..
MAX7491EEE+T ,Dual Universal Switched-Capacitor FiltersMAX7490/MAX749119-1768; Rev 1; 4/09Dual Universal Switched-Capacitor Filters
MAX749CPA ,Digitally Adjustable LCD Bias SupplyMAX74919-0143; Rev 1; 2/95Digitally Adjustable LCD Bias Supply_______________
MAX749CPA+ ,Digitally Adjustable LCD Bias SupplyGeneral Description ________
MB6M ,MINIATURE GLASS PASSIVATED SINGLE-PHASE BRIDGE RECTIFIERThermal Characteristics (TA = 25°C unless otherwise noted)Parameter Symbol MB2M MB4M MB6M UnitDevic ..
MB6S ,Bridge RectifiersThermal Characteristics (T = 25°C unless otherwise noted)AParameter Symbol MB2S MB4S MB6S UnitDevic ..
MB7117E , Schottky TTL 2048-Bit Bipolar Programmable Read-Only Memory
MB71A38-25 , PROGRAMMABLE SCHOTTKY 16384-BIT READ ONLY MEMORY


MAX7491
Dual Universal Switched-Capacitor Filters
General Description
The MAX7490/MAX7491 consist of two identical low-
power, low-voltage, wide dynamic range, rail-to-rail,
2nd-order switched-capacitor building blocks. Each of
the two filter sections, together with two to four external
resistors, can generate all standard 2nd-order func-
tions: bandpass, lowpass, highpass, and notch (band
reject). Three of these functions are simultaneously
available. Fourth-order filters can be obtained by cas-
cading the two 2nd-order filter sections. Similarly, high-
er order filters can easily be created by cascading
multiple MAX7490/MAX7491s.
Two clocking options are available: self-clocking
(through the use of an external capacitor) or external
clocking for tighter cutoff frequency control. The clock-
to-center frequency ratio is 100:1. Sampling is done at
twice the clock frequency, further separating the cutoff
frequency and Nyquist frequency.
The MAX7490/MAX7491 have an internal rail splitter
that establishes a precise common voltage needed for
single-supply operation. The MAX7490 operates from a
single +5V supply and the MAX7491 operates from a
single +3V supply. Both devices feature a low-power
shutdown mode and come in a 16-pin QSOP package.
________________________Applications

Tunable Active Filters
Multipole Filters
ADC Anti-Aliasing
Post-DAC Filtering
Adaptive Filtering
Phase-Locked Loops (PLLs)
Set-Top Boxes
Features
Dual 2nd-Order Filter in a 16-Pin QSOP PackageHigh AccuracyAccuracy: ±0.2%
Clock-to-Center Frequency Error: ±0.2%
Rail-to-Rail Input and Output OperationSingle-Supply Operation: +5V (MAX7490)
or +3V (MAX7491)
Internal or External ClockHighpass, Lowpass, Bandpass, and Notch FiltersClock-to-Center Frequency Ratio of 100:1Internal Sampling-to-Center Frequency Ratio
of 200:1
Center Frequency up to 40kHzEasily Cascaded for Multipole FiltersLow-Power Shutdown: < 1µA Supply Current
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters

LPALPB
BPB
NB/HPB
INVB
COM
EXTCLK
CLK
TOP VIEW
MAX7490
MAX7491
QSOP

BPA
NA/HPA
SHDN
INVA
GND
VDD
Pin Configuration

19-1768; Rev 1; 4/09
Ordering Information
PARTTEMP RANGEPIN-
PACKAGE
SUPPLY
VOLTAGE
(+V)
MAX7490CEE+
0°C to +70°C16 QSOP5
MAX7490EEE+-40°C to +85°C16 QSOP5
MAX7491CEE+
0°C to +70°C16 QSOP3
MAX7491EEE+-40°C to +85°C16 QSOP3
Typical Application Circuit appears at end of data sheet.

+Denotes a lead(Pb)-free/RoHS-compliant package.
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS—MAX7490

(VDD= VEXTCLK= +5V; fCLK = 625kHz; 10kΩ|| 50pF load to VDD/2 at LP_, BP_, and N_/HP_; VSHDN= VDD; 0.1µF from COM to
GND; 50% duty-cycle clock input; COM = VDD/2; TA= TMINto TMAX. Typical values are at TA= +25°C, unless otherwise noted.)
(Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND..............................................................-0.3V to +6V
EXTCLK, SHDNto GND...........................................-0.3V to +6V
INV_, LP_, BP_, N_/HP_, S_, COM,
CLK to GND............................................-0.3V to (VDD+ 0.3V)
Maximum Current into Any Pin ...........................................50mA
Continuous Power Dissipation (TA= +70°C)
16-Pin QSOP (derate 8.30mW/°C above +70°C).........667mW
Operating Temperature Range
MAX749_CEE .....................................................0°C to +70°C
MAX749_EEE...................................................-40°C to +85°C
Die Temperature..............................................................+150°C
Storage Temperature.........................................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
FILTER

Center Frequency RangefOMode 10.001 tokHz
Clock-to-Center Frequency
AccuracyfCLK/fOMode 1, R1 = R3 = 50kΩ , R2 = 10kΩ,
Q = 5, deviation from 100:1±0.2±0.7%
Q AccuracyM od e 1, R1 = R3 = 50kΩ, R2 = 10kΩ, Q = 5±0.2±2%
fO Temperature Coefficient±1ppm/°C
Q Temperature Coefficient±5ppm/°C
DC Lowpass Gain AccuracyMode 1, R1 = R2 = 10kΩ±0.1±0.5%
VOS1DC offset of input inverter±3±12.5
VOS2DC offset of 1st integrator±4±15DC Offset Voltage (Figure 8)
VOS3DC offset of 2nd integrator±4±30
Crosstalk (Note 2)fIN = 10kHz-60dB
Input: COM externally drivenVDD/2
- 0.5VDD/2VDD/2
+ 0.5
COM Voltage RangeVCOM
Output: COM internally drivenVDD/2
- 0.2VDD/2VDD/2
+ 0.2
Input Resistance at COMRCOM140250325kΩ
Clock FeedthroughUp to 5th harmonic of fCLK200μVRMS
Noise (Note 3)Mode 1, R1 = R2 = R3 =10kΩ, LP output,
Q = 160μVRMS
Output Voltage Swing0.2V D D - 0.2V
Input Leakage Current at COMSHDN = GND, VCOM = 0 to VDD±0.1±10μA
CLOCK

Maximum Clock FrequencyfCLK4MHz
EXTCLK = GND, COSC = 1000pF95135175kHzInternal Oscillator Frequency
(Note 4)fOSCEXTCLK = GND, COSC = 100pF1.35MHz
Clock Input HighVDD - 0.5V
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Clock Input Low0.5V
Clock Duty Cycle50 ± 5%
SHDN AND EXTCLK
Input HighVIHVDD - 0.5V
Input LowVIL0.5V
Input Leakage CurrentVINPUT = 0 to VDD±0.4±10μA
POWER REQUIREMENTS

Supply VoltageVDD4.55.5V
Power-Supply CurrentIDDNo external load, mode 1, R1 = R3 = 50kΩ,
R2 = 10kΩ, Q = 53.54.0mA
Shutdown CurrentISHDNSHDN = GND1μA
INTERNAL OP AMPS CHARACTERISTICS

Output Short-Circuit Current±18mA
DC Open-Loop GainRL ≥ 10kΩ, CL ≤ 50pF130dB
Gain Bandwidth ProductGBWRL ≥ 10kΩ, CL ≤ 50pF7MHz
Slew RateSRRL ≥ 10kΩ, CL ≤ 50pF6.4V/μs
ELECTRICAL CHARACTERISTICS—MAX7490 (continued)

(VDD= VEXTCLK= +5V; fCLK = 625kHz; 10kΩ|| 50pF load to VDD/2 at LP_, BP_, and N_/HP_; VSHDN= VDD; 0.1µF from COM to
GND; 50% duty-cycle clock input; COM = VDD/2; TA= TMINto TMAX. Typical values are at TA= +25°C, unless otherwise noted.)
(Note 1)
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
FILTER

Center Frequency RangefOMode 10.001 tokHz
Clock-to-Center Frequency
AccuracyfCLK/fOMode 1, R1 = R3 = 50kΩ , R2 = 10kΩ,
Q = 5, deviation from 100:1±0.2±0.7%
Q AccuracyMode 1, R1 = R3 = 50kΩ, R2 = 10kΩ,
Q = 5±0.2±2%
fO Temperature Coefficient±1ppm/°C
Q Temperature Coefficient±5ppm/°C
DC Lowpass Gain AccuracyMode 1, R1 = R2 = 10kΩ±0.1±0.5%
VOS1DC offset of input inverter±3±12.5
VOS2DC offset of 1st integrator±4±15DC Offset Voltage
(Figure 8)
VOS3DC offset of 2nd integrator±4±25
Crosstalk (Note 2)fIN = 10kHz-60dB
Input: COM externally drivenVDD/2
- 0.1VDD/2VDD/2
+ 0.1
COM Voltage RangeVCOM
Output: COM internally drivenVDD/2
- 0.1VDD/2VDD/2
+ 0.1
Input Resistance at COMRCOM6080120kΩ
Clock FeedthroughUp to 5th harmonic of fCLK200μVRMS
Noise (Note 3)Mode 1, R1= R2 = R3 = 10kΩ,
LP output, Q = 160μVRMS
Output Voltage Swing0.2V D D - 0.2V
Input Leakage Current at COMSHDN = GND, VCOM = 0 to VDD±0.1±10μA
CLOCK

Maximum Clock FrequencyfCLK4MHz
EXTCLK = GND, COSC = 1000pF95135175kHzInternal Oscillator Frequency
(Note 4)fOSCEXTCLK = GND, COSC = 100pF1.35MHz
Clock Input HighVDD - 0.5V
Clock Input Low0.5V
Clock Duty Cycle50 ±5%
SHDN AND EXTCLK
Input HighVIHVDD - 0.5V
Input LowVIL0.5V
Input Leakage CurrentVINPUT = 0 to VDD±0.4±10μA
ELECTRICAL CHARACTERISTICS—MAX7491

(VDD= VEXTCLK= +3V; fCLK = 625kHz; 10kΩ|| 50pF load to VDD/2 at LP_, BP_, and N_/HP_; VSHDN= VDD; 0.1µF from COM to
GND; 50% duty-cycle clock input; COM = VDD/2; TA= TMINto TMAX. Typical values are at TA= +25°C, unless otherwise noted.)
(Note 1)
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
POWER REQUIREMENTS

Supply VoltageVDD2.73.6V
Power-Supply CurrentIDDNo load, mode 1, R1 = R3 = 50kΩ,
R2 = 10kΩ, Q = 53.54.0mA
Shutdown CurrentISHDNSHDN = GND1μA
INTERNAL OP AMPS CHARACTERISTICS

Output Short-Circuit Current±11mA
DC Open-Loop GainRL ≥ 10kΩ, CL ≤ 50pF130dB
Gain Bandwidth ProductGBWRL ≥ 10kΩ, CL ≤ 50pF7MHz
Slew RateSRRL ≥ 10kΩ, CL ≤ 50pF6V/μs
Note 1:
Resistive loading of the N_/HP_, LP_, BP_ outputs includes the resistors used for the filter implementation.
Note 2:
Crosstalk between internal filter sections is measured by applying a 1VRMS10kHz signal to one bandpass filter section input
and grounding the input of the other bandpass filter section. The crosstalk is the ratio between the output of the grounded
filter section and the 1VRMSinput signal of the other section.
Note 3:
Bandwidth of noise measurement is 80kHz.
Note 4:
fOSC(kHz) = 135 x 103/ COSC(COSCin pF)
ELECTRICAL CHARACTERISTICS—MAX7491 (continued)

(VDD= VEXTCLK= +3V; fCLK = 625kHz; 10kΩ|| 50pF load to VDD/2 at LP_, BP_, and N_/HP_; VSHDN= VDD; 0.1µF from COM to
GND; 50% duty-cycle clock input; COM = VDD/2; TA= TMINto TMAX. Typical values are at TA= +25°C, unless otherwise noted.)
(Note 1)
Typical Operating Characteristics

(VDD= +5V for MAX7490, VDD= +3V for MAX7491, fCLK= 625kHz, VSHDN= VEXTCLK= VDD, COM = VDD/2, Mode 1, R3 = R1 = 50kΩ,
R2 = 10kΩ, Q = 5, TA= +25°C, unless otherwise noted.)
2ND-ORDER BANDPASS FILTER
FREQUENCY RESPONSE
MAX7490-01
FREQUENCY (kHz)
GAIN (dB)-30
2ND-ORDER BANDPASS FILTER
PHASE RESPONSE
MAX7490-02
FREQUENCY (kHz)
PHASE (%)
VDD = +5V
fCLK = 625kHz
Q = 5
100100010,000
CLOCK-TO-CENTER FREQUENCY
DEVIATION vs. CLOCK FREQUENCY

MAX7490-03
fCLK (kHz)
fCLK
DEVIATION (%)
VDD = 5V
VDD = 3V
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters

CLOCK-TO-CENTER FREQUENCY
DEVIATION vs. Q
MAX7490-04
CLK
DEVIATION (%)
VDD = 5V
VDD = 3V
CLOCK-TO-CENTER FREQUENCY
DEVIATION vs. TEMPERATURE
MAX7490-05
TEMPERATURE (°C)
fCLK
DEVIATION (%)
100100010,000
Q DEVIATION vs. CLOCK FREQUENCY

MAX7490-06
fCLK (kHz)
Q DEVIATION (%)-4
VDD = 3V
VDD = 5V
Q DEVIATION vs. TEMPERATURE
MAX7490-07
TEMPERATURE (°C)
DEVIATION (%)
NOISE vs. Q
MAX7490-08
NOISE (µV
RMS
SUPPLY CURRENT vs. TEMPERATURE
MAX7490-09
TEMPERATURE (°C)
DD
(mA)
VDD = 5V
VDD = 3V
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX7490-10
VDD (V)
IDD
(mA)
fCLK = 3MHz
fCLK = 625kHz
fCLK = 2kHz
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX7490-11
VDD (V)
IDD
(mA)
-40°C
+25°C
+85°C
-12010k
MAX7491
THD + NOISE vs. FREQUENCY

MAX7490-12
INPUT FREQUENCY (Hz)
THD + NOISE (dB)
A = MODE 1
B = MODE 3
Typical Operating Characteristics (continued)

(VDD= +5V for MAX7490, VDD= +3V for MAX7491, fCLK= 625kHz, VSHDN= VEXTCLK= VDD, COM = VDD/2, Mode 1, R3 = R1 = 50kΩ,
R2 = 10kΩ, Q = 5, TA= +25°C, unless otherwise noted.)
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters

-12010k
MAX7490
THD + NOISE vs. FREQUENCY

MAX7490-13
INPUT FREQUENCY (Hz)
THD + NOISE (dB)
A = MODE 1
B = MODE 3
MAX7491
THD + NOISE vs. INPUT VOLTAGE
MAX7490-14
INPUT VOLTAGE (Vp-p)
THD + NOISE (dB)B
A = MODE 1
B = MODE 3
MAX7490
THD + NOISE vs. INPUT VOLTAGE
MAX7490-15
INPUT VOLTAGE (Vp-p)
THD + NOISE (dB)
A = MODE 1
B = MODE 3
OUTPUT VOLTAGE SWING
vs. LOAD RESISTANCE
MAX7490-16
RLOAD (kΩ) TO COM
OUTPUT SWING (Vp-p)
VDD = 5V
VDD = 3V
INTERNAL OSCILLATOR PERIOD
vs. SMALL CAPACITANCE
MAX7490-17
CAPACITANCE (pF)
INTERNAL OSCILLATOR FREQUENCY (kHz)
VDD = 3V
VDD = 5V
INTERNAL OSCILLATOR PERIOD
vs. LARGE CAPACITANCE
MAX7490-18
CAPACITANCE (nF)
INTERNAL OSCILLATOR FREQUENCY (kHz)
VDD = 5V
VDD = 3V
INTERNAL OSCILLATOR FREQUENCY
vs. SUPPLY VOLTAGE
MAX7490-19
VDD (V)
INTERNAL OSCILLATOR FREQUENCY (kHz)
COSC = 1000pF
INTERNAL OSCILLATOR FREQUENCY
vs. TEMPERATURE
MAX7490-20
TEMPERATURE (°C)
INTERNAL OSCILLATOR FREQUENCY (kHz)
VDD = 3V
VDD = 5V
COSC = 1000pF
Typical Operating Characteristics (continued)

(VDD= +5V for MAX7490, VDD= +3V for MAX7491, fCLK= 625kHz, VSHDN= VEXTCLK= VDD, COM = VDD/2, Mode 1, R3 = R1 = 50kΩ,
R2 = 10kΩ, Q = 5, TA= +25°C, unless otherwise noted.)
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
_______________Detailed Description

The MAX7490/MAX7491 are universal switched-capaci-
tor filters designed with a fixed internal fCLK/fOratio of
100:1. Operating modes use external resistors connect-
ed in different arrangements to realize different filter
functions (highpass, lowpass, bandpass, notch) in all of
the classical filter topologies (Butterworth, Bessel, ellip-
tic, Chebyshev). Figure 1 shows a block diagram.
Clock Signal
External Clock

The MAX7490/MAX7491 switched-capacitor filters are
designed for use with external clocks that have a 50%
±5% duty cycle. When using an external clock, drive
the EXTCLK pin high or connect to VDD. Drive CLK with
CMOS logic levels (GND and VDD). Varying the rate of
the external clock adjusts the center frequency of the
filter:= fCLK /100
Internal Clock

When using the internal oscillator, drive the EXTCLK pin
low or connect to GND and connect a capacitor (COSC)
between CLK and GND. The value of the capacitor
(COSC) determines the oscillator frequency as follows:
fOSC(kHz) = 135 x 103/ COSC(pF)
Since COSCis in the low picofarads, minimize the stray
capacitance at CLK so that it does not affect the inter-
nal oscillator frequency. Varying the frequency of the
internal oscillator adjusts the filter’s center frequency by
a 100:1 clock-to-center frequency ratio. For example,
an internal oscillator frequency of 135kHz produces a
nominal center frequency of 1.35kHz.
NAME
PIN
FILTER AFILTER B
FUNCTION

LP_1162nd-Order Lowpass Filter Output
BP_2152nd-Order Bandpass Filter Output
N_/HP_3142nd-Order Notch/Highpass Filter Output
INV_413Inverting Input of Filter Summing Op Amp512
Summing Input. The connection of the summing input, along with the other
resistor connections, determine the circuit topology (mode) of each 2nd-
order section. S_ must never be left unconnected.
SHDN6Shutdown Input. Drive SHDN low to enable shutdown mode; drive SHDN
high or connect to VDD for normal operation.
GND7Ground Pin
VDD8Positive Supply. Bypass VDD with a 0.1µF capacitor to GND. A low-noise
supply is recommended. Input +5V for MAX7490 or +3V for MAX7491.
CLK9
Clock Input. Connect CLK to an external capacitor (COSC) between CLK and
ground to set the internal oscillator frequency. For external clock operation,
drive CLK with a CMOS-level clock. The duty cycle of the external clock
should be between 45% and 55% for best performance.
EXTCLK10External/Internal Clock Select Input. Connect EXTCLK to VDD when driving
CLK externally. Connect EXTCLK to GND when using the internal oscillator.
COM11
Common Pin. Biased internally at VDD/2. Bypass externally to GND with
0.1µF capacitor. To override the internal biasing, drive COM with an external
low-impedance source.
Pin Description
MAX7490/MAX7491
Dual Universal Switched-Capacitor Filters
2nd-Order Filter Stage

The MAX7490/MAX7491 are dual biquad filters. The
biquad topology allows the use of standard filter tables
and equations to implement simultaneous lowpass,
bandpass, and notch or highpass filters. Topologies
such as Butterworth, Chebyshev, Bessel, elliptic, as
well as custom algorithms are possible.
Internal Common Voltage

The COM pin sets the common-mode input voltage and
is internally biased to VDD/2with a resistor-divider. The
resistors used are typically 250kΩfor the MAX7490,
and typically 80kΩfor the MAX7491. The common-
mode voltage is easily overdriven by an external volt-
age supply if desired. Bypass COM to the analog
ground with at least a 0.1µF capacitor.
Inverting Inputs

Locate resistors that are connected to INV_ as close as
possible to INV_ to reduce stray capacitance and noise
pickup. INV_ are inverting inputs to continuous-time op
amps, and behave like a virtual ground. There is no
sampling energy present on these inputs.
Outputs

Each switched-capacitor section, together with two to
four external resistors, can generate all standard 2nd-
order functions: bandpass, lowpass, highpass, and
notch (band-reject) functions. Three of these functions
are simultaneously available. The maximum signal
swing is limited by the power-supply voltages used.
The amplifiers’ outputs in the MAX7490/MAX7491 are
able to swing to within approximately 0.2V of either
supply.
Driving coaxial cable, large capacitive loads, or total
resistive loads less than 10kΩwill degrade the total
harmonic distortion (THD) performance. Note that the
effective resistive load at the output must include both
the feedback resistors and any external load resistors.
Low-Power Shutdown Mode

The MAX7490/MAX7491 have a shutdown mode that is
activated by driving SHDNlow. In shutdown mode, the
filter supply current reduces to < 1µA (max), and the fil-
ter outputs become high impedance. The COM input
also becomes high impedance during shutdown. For
normal operation, drive SHDNhigh or connect to VDD.
__________Applications Information

Designing with the MAX7490/MAX7491 begins by
selecting the mode that best fits the desired circuit
requirements. Table 1 lists the available modes and
their relative advantages and disadvantages. Table 2
lists the different nomenclature used in the explanations
that follow.∫∫
NA/HPA (3)
SHDN
VDD (8)
GND (7)
CLK (9)
EXTCLK (10)
INVB (13)
COM (11)
INVA (4)
(6)
SA (5)
BPA (2)LPA (1)∫∫
NB/HPB (14)
SB (12)
BPB (15)LPB (16)
Figure 1. Block Diagram
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