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MAX7480EPAMAXIMN/a982avai8th-Order, Lowpass, Butterworth, Switched-Capacitor Filter
MAX7480ESAMAXIMN/a1900avai8th-Order, Lowpass, Butterworth, Switched-Capacitor Filter


MAX7480ESA ,8th-Order, Lowpass, Butterworth, Switched-Capacitor FilterApplicationsADC Anti-AliasingPART TEMP. RANGE PIN-PACKAGEMAX7480ESA -40°C to +85°C 8 SOPost-DAC Fil ..
MAX7480ESA+ ,8th-Order, Lowpass, Butterworth, Switched-Capacitor FilterELECTRICAL CHARACTERISTICS(V = +5V, filter output measured at OUT, 10kΩ || 50pF load to GND at OUT, ..
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MAX7480EPA-MAX7480ESA
8th-Order, Lowpass, Butterworth, Switched-Capacitor Filter
General Description
The MAX7480 8th-order, lowpass, Butterworth,
switched-capacitor filter (SCF) operates from a single
+5V supply. The device draws only 2.9mA of supply
current and allows corner frequencies from 1Hz to
2kHz, making it ideal for low-power post-DAC filtering
and anti-aliasing applications. The MAX7480 features a
shutdown mode, which reduces the supply current to
0.2µA.
Two clocking options are available: self-clocking
(through the use of an external capacitor) or external
clocking for tighter corner-frequency control. An offset
adjust pin allows for adjustment of the DC output level.
The MAX7480 Butterworth filter provides a maximally
flat passband response. The fixed response simplifies
the design task to selecting a clock frequency.
Applications

ADC Anti-Aliasing
Post-DAC Filtering
Features
8th-Order, Lowpass Butterworth FilterLow Noise and Distortion: -73dB THD + NoiseClock-Tunable Corner Frequency (1Hz to 2kHz)100:1 Clock-to-Corner Ratio+5V Single-Supply OperationLow Power
2.9mA (Operating Mode)
0.2µA (Shutdown Mode)
Available in 8-Pin SO/DIP PackageLow Output Offset: ±5mV
MAX7480
8th-Order, Lowpass, Butterworth,
Switched-Capacitor Filter
Typical Operating Circuit

19-1416; Rev 0; 1/99
Pin Configuration
Ordering Information
MAX7480
8th-Order, Lowpass, Butterworth,
Switched-Capacitor Filter
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VDD= +5V, filter output measured at OUT, 10kΩ|| 50pF load to GND at OUT, OS = COM, 0.1µF from COM to GND, SHDN=
VDD, fCLK= 100kHz, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND..............................................................-0.3V to +6V
IN, OUT, COM, OS, CLK............................-0.3V to (VDD+ 0.3V)
SHDN........................................................................-0.3V to +6V
OUT Short-Circuit Duration...................................................1sec
Continuous Power Dissipation (TA= +70°C)
8-Pin SO (derate 5.88mW/°C above +70°C)................471mW
8-Pin DIP (derate 9.09mW/°C above +70°C)...............727mW
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10sec).............................+300°C
MAX7480
8th-Order, Lowpass, Butterworth,
Switched-Capacitor Filter
ELECTRICAL CHARACTERISTICS (continued)

(VDD= +5V, filter output measured at OUT, 10kΩ|| 50pF load to GND at OUT, OS = COM, 0.1µF from COM to GND, SHDN=
VDD, fCLK= 100kHz, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
FILTER CHARACTERISTICS

(VDD= +5V, filter output measured at OUT, 10kΩ||50pF load to GND at OUT, SHDN= VDD, VCOM = VOS = VDD/2, fCLK= 100kHz, TA
= TMINto TMAX,unless otherwise noted. Typical values are at TA= +25°C.)
Note 1:
The maximum fCis defined as the clock frequency fCLK= 100 ·fCat which the peak SINAD drops to 68dB with a sinusoidal
input at 0.2fC.
Note 2:
DC insertion gain is defined as ΔVOUT / ΔVIN.
Note 3:
OS voltages above VDD - 1V saturate the input and result in a 75µA typical input leakage current.
Note 4:
fOSC(kHz) @53 ·103/ COSC(pF).
MAX7480
8th-Order, Lowpass, Butterworth,
Switched-Capacitor Filter
Typical Operating Characteristics

(VDD= +5V, fCLK= 100kHz, SHDN= VDD, VCOM= VOS= VDD/ 2, TA= +25°C, unless otherwise noted.)
MAX7480
8th-Order, Lowpass, Butterworth,
Switched-Capacitor Filter
Typical Operating Characteristics (continued)

(VDD= +5V, fCLK= 100kHz, SHDN= VDD, VCOM= VOS= VDD/ 2, TA= +25°C, unless otherwise noted.)
Table A. THD+N vs. Input Signal
Amplitude Test Conditions
MAX7480
8th-Order, Lowpass, Butterworth,
Switched-Capacitor Filter
Pin Description
_______________Detailed Description

The MAX7480 Butterworth filter operates with a 100:1
clock-to-corner frequency ratio and a 2kHz maximum
corner frequency.
Lowpass Butterworth filters provide a maximally flat
passband response, making them ideal for instrumen-
tation applications that require minimum deviation from
the DC gain throughout the passband.
Figure 1 shows the difference between Bessel and
Butterworth filter frequency responses. With the filter
cutoff frequencies set at 1kHz, trace A shows the
Bessel filter response and trace B shows the
Butterworth filter response.
Background Information

Most switched-capacitor filters (SCFs) are designed
with biquadratic sections. Each section implements two
filtering poles, and the sections are cascaded to pro-
duce higher-order filters. The advantage to this
approach is ease of design. However, this type of
design is highly sensitive to component variations if any
section’s Q is high. An alternative approach is to emu-
late a passive network using switched-capacitor inte-
grators with summing and scaling. Figure 2 shows a
basic 8th-order ladder filter structure.
A switched-capacitor filter such as the MAX7480 emu-
lates a passive ladder filter. The filter’s component sen-
sitivity is low when compared to a cascaded biquad
design, because each component affects the entire fil-
ter shape, not just one pole-zero pair. In other words, a
mismatched component in a biquad design will have a
concentrated error on its respective poles, while the
same mismatch in a ladder filter design results in an
error distributed over all poles.
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