IC Phoenix
 
Home ›  MM76 > MAX7428EKA-MAX7428EKA+T-MAX7430EUB+T,Standard Definition Video Reconstruction Filters and Buffers
MAX7428EKA-MAX7428EKA+T-MAX7430EUB+T Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
MAX7428EKAMAXIMN/a2500avaiStandard Definition Video Reconstruction Filters and Buffers
MAX7428EKA+T |MAX7428EKATMAXIMN/a2500avaiStandard Definition Video Reconstruction Filters and Buffers
MAX7430EUB+T |MAX7430EUBTMAXIMN/a2500avaiStandard Definition Video Reconstruction Filters and Buffers


MAX7428EKA ,Standard Definition Video Reconstruction Filters and BuffersELECTRICAL CHARACTERISTICS(V = +5V ±10%, R = 300kΩ ±1%, C = 0.1µF, C = (1nF to 1µF) ±1%, C = 0 to 2 ..
MAX7428EKA/T ,Standard Definition Video Reconstruction Filters and Buffersapplications. ThePackage (MAX7432)MAX7432 triple filter is optimized for component (YP Pb ror embed ..
MAX7428EKA+T ,Standard Definition Video Reconstruction Filters and BuffersApplicationsMSPB is a trademark of Maxim Integrated Products, Inc.Set-Top BoxesµMAX is a registered ..
MAX7428EKA-T ,Standard Definition Video Reconstruction Filters and BuffersELECTRICAL CHARACTERISTICS(V = +5V ±10%, R = 300kΩ ±1%, C = 0.1µF, C = (1nF to 1µF) ±1%, C = 0 to 2 ..
MAX7428EKA-T ,Standard Definition Video Reconstruction Filters and BuffersFeaturesThe MAX7428/MAX7430/MAX7432 filters are low-cost,  Ideal for CVBS, Y/C (S-Video), and RGB ..
MAX742CPP ,Switch-Mode Regulator with +5V to 【12V or 【15V Dual Outputfeatures undervoltage lockout, thermal shut-down, and programmable soft-start. MAX742C/D 0°C to +70 ..
MB6M ,MINIATURE GLASS PASSIVATED SINGLE-PHASE BRIDGE RECTIFIERThermal Characteristics (TA = 25°C unless otherwise noted)Parameter Symbol MB2M MB4M MB6M UnitDevic ..
MB6S ,Bridge RectifiersThermal Characteristics (T = 25°C unless otherwise noted)AParameter Symbol MB2S MB4S MB6S UnitDevic ..
MB7117E , Schottky TTL 2048-Bit Bipolar Programmable Read-Only Memory


MAX7428EKA-MAX7428EKA+T-MAX7430EUB+T
Standard Definition Video Reconstruction Filters and Buffers
General Description
The MAX7428/MAX7430/MAX7432A filters are low-cost,
high-performance replacements for standard discrete fil-
ter and buffer solutions. The MAX7428/MAX7430/
MAX7432A are ideal for anti-aliasing and DAC smooth-
ing video applications, when analog video is reconstruct-
ed from a digital data stream. These devices require a
single +5V supply and the filters have a cutoff frequency
optimized for NTSC, PAL, and standard definition digital
TV (SDTV) video signals. The MAX7428/MAX7430/
MAX7432A feature Maxim’s single-pin bus (MSPB™)
interface to digitally control channel selection (IN_A or
IN_B), adjust high-frequency boost, bypass the filter,
configure luma vs. chroma operation, and control the
output disable. The MAX7428 single-channel filter is
ideal for composite (CVBS) video signals. The MAX7430
dual filter is optimized for S-Video (Y/C) applications. The
MAX7432A triple filter is optimized for component (YPbPr
or embedded synchronous RGB) video signals. The
MAX7428 is available in a tiny 8-pin SOT23 package, the
MAX7430 is available in a miniature 10-pin µMAX®pack-
age, and the MAX7432A is available in a 14-pin TSSOP
package. The MAX7428/MAX7430/MAX7432A are fully
specified over the -40°C to +85°C extended temperature
range.
Applications

Set-Top Boxes
DVD Players
Hard-Disk Recorders
Camcorders
Features
Ideal for CVBS, Y/C (S-Video), and RGB (Y PbPr)
Outputs for NTSC, PAL, and SDTV
6th-Order Lowpass Filter Drives Two 150ΩVideo LoadsFour Levels of Passband High-Frequency
Boost Control
Input 2 to 1 Multiplexer Output DisableFilter Bypassing+5V Single-Supply VoltageTiny 8-Pin SOT23 Package (MAX7428), 10-Pin
µMAX Package (MAX7430), and 14-Pin TSSOP
Package (MAX7432A)
MAX7428/MAX7430/MAX7432A
Standard Definition Video Reconstruction
Filters and Buffers

+6dB
LEVEL SHIFT
6TH-ORDER
FILTEROUT
SERIAL INTERFACE
AND CONTROL
DATA
D/A
INA
INB
*OPTIONAL
SYNC
AUX INPUT
BIAS GENERATOR
GNDREXT
ENCODER
MAX7428
SYNCIO
VCC
75Ω
75ΩCIN
CIN
Functional Diagrams
Ordering Information

xx-xxxx; Rev 0; 2/06
Pin Configurations appear at end of data sheet.

Functional Diagrams continued at end of data sheet.
PARTTEMP
RANGE
PIN-
PACKAGE
TOP
MARK
MAX7428EKA-T
-40°C to +85°C8 SOT23-8AAIU
MAX7430EUB
-40°C to +85°C10 µMAX—
MAX7432AEUD
-40°C to +85°C14 TSSOP—
MSPB is a trademark of Maxim Integrated Products, Inc.
µMAX is a registered trademark of Maxim Integrated Products, Inc.
MAX7428/MAX7430/MAX7432A
Standard Definition Video Reconstruction
Filters and Buffers
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VCC= +5V ±10%, RREXT= 300kΩ±1%, CIN= 0.1µF, CREXT= (1nF to 1µF) ±1%, CLOAD= 0 to 20pF; BOOST0_, BOOST1_ = 0, 0; = TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.) (Note 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND...........................................................................+6V
All Other Pins to GND.................................-0.3V to (VCC + 0.3V)
Maximum Current Into Any Pin.........................................±50mA
Continuous Power Dissipation (TA= +70°C)
8-Pin SOT23 (derate 9.71mW/°C above +70°C)..........777mW
10-Pin µMAX (derate 6.94mW/°C above +70°C)......555.5mW
14-Pin TSSOP (derate 9.1mW/°C above +70°C).........727mW
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

f = 100kHz to 4.2MHz relative to 100kHz-0.5+0.5Passband Responsef = 100kHz to 5MHz relative to 100kHz-1.0+1.0dB
Stopband AttenuationAsbf > 27MHz48dB
HF Boost Relative Step Size, 4
Levelsf = 4.2MHz to 5MHz0.20.40.6dB
Differential GaindG5-step modulated staircase0.2%
Differential Phasedθ5-step modulated staircase0.2degrees
Harmonic DistortionTHDf = 100kHz to 5MHz0.10.5%
Signal-to-Noise RatioSNRPeak signal (2Vp-p) to RMS noise,
f = 100Hz to 50MHz72dB
Group Delay DeviationΔtgDeviation from 100kHz to 3.58 (4.43)MHz20ns
Line-Time DistortionHdist18µs, 100 IRE bar0.3%
Field-Time DistortionVdist130 lines, 18µs, 100 IRE bar0.5%
Clamp Settling Timetclampto ±1% (Note 1)100Lines
CLEVEL = 00.81.3Output DC Clamp LevelCLEVEL = 11.351.85V
Low-Frequency GainAVGain at 100kHz1.91.9752.05V/V
Group Delay Matchingtg(MATCH)Low frequency channel-to-channel matching
f = 100kHz2ns
Low-Frequency Gain MatchingAV(MATCH)C hannel - to- channel g ai n m atchi ng , f = 100kH z5%
Channel-to-Channel CrosstalkXTALKChannel-to-channel crosstalk, f = 100kHz
to 5.5MHz-60dB
Output Short-Circuit CurrentISCOUT_ shorted to ground or VCC50mA
Input Leakage CurrentIIN10µA
YINp-pCLEVEL = 01.4Input Dynamic SwingCINp-pCLEVEL = 10.9Vp-p
VCC Supply RangeVCC4.55.5V
MAX7428/MAX7430/MAX7432A
Standard Definition Video Reconstruction
Filters and Buffers
ELECTRICAL CHARACTERISTICS (continued)

(VCC= +5V ±10%, RREXT= 300kΩ±1%, CIN= 0.1µF, CREXT= (1nF to 1µF) ±1%, CLOAD= 0 to 20pF; BOOST0_, BOOST1_ = 0, 0;= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.) (Note 2)
MSPB INTERFACE TIMING SPECIFICATIONS

(VCC= +5V ±10%, RREXT= 300kΩ±1%, CREXT= (1nF to 1µF) ±1%, CLOAD= 0 to 20pF, TA= TMINto TMAX, unless otherwise noted.
Typical values are at TA= +25°C.) (Figures 4 through 9)
Note 1:
One horizontal line = 63.5µs.
Note 2:
MAX7428 devices are 100% production tested at TA= +25°C and are guaranteed by design from TA= TMINto TMAX.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
MSPB TIMING

Logic-Zero/Prompt Pulse Widtht0, tP158µs
Logic-One Pulse Widtht1243036µs
Transaction Pulse WidthtT80100120µs
Separation Between PulsestWAIT0.5µs
Bus Release Time by Host After
Prompt PulsetRELEASE1µs
Bus Reclaim Time by Host After
Prompt PulsetRECLAIM13µs
Read Back Data Valid Window
After the Prompt PulsetREAD2.34.7µs
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

MAX74282432
MAX74304562Supply CurrentICCNo load
MAX7432A6886
Power-Supply Rejection RatioPSRRVIN = 100mVp-p, f = 0 to 5.5MHz40dB
IN_A/IN_B CrosstalkVIN = 100mVp-p, f = 100kHz to 5.5MHz-60dB
LOGIC CHARACTERISTICS

Logic Input High VoltageVIH2V
Logic Input Low VoltageVIL0.8V
Logic Input CurrentIIH/IILVIL = 0 (source), VIH = VCC (sink)10µA
Logic Output High VoltageVOHI(SOURCE) = 500µAVCC -
0.5V
Logic Output Low VoltageVOLI(SINK) = 500µA0.4V
MAX7428/MAX7430/MAX7432A
Standard Definition Video Reconstruction
Filters and Buffers
Typical Operating Characteristics

(VCC= +5V, RREXT= 300kΩ; BOOST0_, BOOST1_ = 0, 0; VIN_= 1Vp-p, TA= +25°C, unless otherwise noted.)
AMPLITUDE vs. FREQUENCY
MAX7428/30/32 toc01
FREQUENCY (MHz)
AMPLITUDE (dB)
PASSBAND AMPLITUDE vs. FREQUENCY
MAX7428/30/32 toc02
FREQUENCY (MHz)
AMPLITUDE (dB)
-10D
A: BOOST1, BOOST0 = 1, 1
B: BOOST1, BOOST0 = 1, 0
C: BOOST1, BOOST0 = 0, 1
D: BOOST1, BOOST0 = 0, 0
PHASE RESPONSE vs. FREQUENCY
MAX7428/30/32 toc03
FREQUENCY (MHz)
PHASE (DEGREES)
GROUP DELAY vs. FREQUENCY
MAX7428/30/32 toc04
FREQUENCY (MHz)
GROUP DELAY (ns)
200ns/div
2T RESPONSE (1IRE = 7.14mV)

INA_
200mV/div
OUT_
200mV/div
MAX7428/30/32 toc05
400ns/div
MODULATED 12.5T RESPONSE
(1IRE = 7.14mV)

INA_
200mV/div
OUT_
200mV/div
MAX7428/30/32 toc06
SUPPLY CURRENT vs. TEMPERATURE
MAX7428/30/32 toc07
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
NO LOAD
DIFFERENTIAL GAIN (%)-0.01-0.04-0.08-0.10-0.06
1st.2nd.3rd.4th.5th.6th.
DIFFERENTIAL GAIN

MAX7428/30/32 toc08
MAX7428/30/32 toc09
1st.2nd.3rd.4th.5th.6th.0.040.060.060.040.02
DIFFERENTIAL PHASE (DEGREES)
DIFFERENTIAL PHASE
MAX7428/MAX7430/MAX7432A
Standard Definition Video Reconstruction
Filters and Buffers

OUTPUT IMPEDANCE vs. FREQUENCY
MAX7428/30/32 toc10
FREQUENCY (MHz)
IMPEDANCE
200ns/div
OUTPUT TRANSIENT DUE TO
INPUT MUX SWITCHING

OUT_
500mV/div
MAX7428/30/32 toc11
PASSBAND CHANNEL-TO-CHANNEL
CROSSTALK vs. FREQUENCY
MAX7428/30/32 toc12
FREQUENCY (MHz)
CROSSTALK (dB)-85
BOOST = CODE 00
Typical Operating Characteristics (continued)

(VCC= +5V, RREXT= 300kΩ; BOOST0_, BOOST1_ = 0, 0; VIN= 1Vp-p, TA= +25°C, unless otherwise noted.)
Pin Description
PIN
MAX7432AMAX7430MAX7428NAMEFUNCTION
1—IN1AVideo Input 1A. Master channel, sync signal required. Use a 0.1µF
series input capacitor for proper operation.2—IN2AVideo Input 2A. Slave channel, clamping controlled by master channel
sync. Use a 0.1µF series input capacitor for proper operation.——IN3AVideo Input 3A. Slave channel, clamping controlled by master channel
sync. Use a 0.1µF series input capacitor for proper operation.
4, 1084GNDGround4—IN1BVideo Input 1B. Master channel, sync signal required. Use a 0.1µF
series input capacitor for proper operation.5—IN2BVideo Input 2B. Slave channel, clamping controlled by master channel
sync. Use a 0.1µF series input capacitor for proper operation.——IN3BVideo Input 3B. Slave channel, clamping controlled by master channel
sync. Use a 0.1µF series input capacitor for proper operation.66DATASerial Data Interface——OUT3Buffer Output 37—OUT2Buffer Output 237REXT
External Resistor. Connect a 300kΩ resistor from REXT to GND for
internal biasing. Connect a 1nF to 1µF capacitor from REXT to GND for
chip-address programming (see Table 3).
D/A
D/A
0.1μF
0.1μF
INA
INB
GND
ENCODER
75Ω
75Ω
75Ω**220μF
75Ω
300kΩ
SERIAL I/O
SYNC PULSE
IN OR OUT
OUT
VCC
REXT
DATA
SYNCIO
**220μF
*1MΩ
*1MΩ
MAX7428
Z0 = 75Ω
Z0 = 75Ω
10kΩ
***
C1 = 1nF TO 1μF (SEE TABLE 3)
*NEEDED ONLY IN FILTER BYPASS MODE
**OPTIONAL CAPACITOR
***ONLY ONE PULLUP RESISTOR NEEDED PER BUS
Figure 1. MAX7428 Typical Application Circuit
MAX7428/MAX7430/MAX7432A
Detailed Description

The MAX7428/MAX7430/MAX7432A filter and buffer the
outputs of DAC encoder chipsets that process digital
video information in applications such as set-top boxes,
hard-disk recorders, DVD players, recorders, and digi-
tal VCRs. These devices also filter and “clean-up” ana-
log video signals. Each channel in the MAX7428/
MAX7430/MAX7432A includes an input mux to select
the input channel, a 6th-order Sallen-Key filter with four
adjustable high-frequency boost levels, an output
buffer with a 6dB gain, a sync detector and clamp, and
an external resistor to set internal bias levels. Output
disable adds additional multiplexing in a wired-OR con-
figuration. Filter bypass, in conjunction with the two
inputs, can be used to provide filtered and unfiltered
video signal processing. Maxim’s Single Pin Bus
(MSPB) interface controls all of the above features. An
external capacitor is used to assign each device a
unique address that allows control of up to 16 devices
on the same bus. Typical application circuits for the
MAX7428/MAX7430/MAX7432A are shown in Figures 1,
2, and 3.
Input Considerations

Use a 0.1µF ceramic capacitor to AC-couple the input
to the MAX7428/MAX7430/MAX7432A. This input
capacitor stores a DC level to level-shift the input signal
to an optimal point between VCCand GND. The ABSEL
bit on the Control Register sets which channel (IN_A or
IN_B) is selected (Control Register section). The IN_A
and IN_B inputs have a typical input resistance of
50kΩ.
Standard Definition Video Reconstruction
Filters and Buffers
Pin Description (continued)
PIN
MAX7432AMAX7430MAX7428
NAMEFUNCTION
9—OUT1Buffer Output 1102VCC+5V Supply Voltage—1INAVideo Input A. Use a 0.1µF series input capacitor for proper operation.—3INBVideo Input B. Use a 0.1µF series input capacitor for proper operation.5SYNCIOSync Pulse Input or Output—8OUTBuffer Output
MAX7428/MAX7430/MAX7432A
Standard Definition Video Reconstruction
Filters and Buffers

0.1μF
*1MΩ
D/A
0.1μF
*1MΩ
0.1μF
*1MΩ
D/A
0.1μF
*1MΩ
75Ω
Z0 = 75Ω
Z0 = 75Ω
75Ω
Z0 = 75Ω
Z0 = 75Ω
200μF**
200μF**
75Ω
75Ω
75Ω
75Ω
200μF**
200μF**
75Ω
75Ω
SERIAL I/O
300kΩ
+5V
MAX7430
IN1A
IN1B
IN2A
IN2B
OUT1
OUT2
DATA
REXT
GND
VCC
ENCODER
ENCODER
+5V
10kΩ
***
C1 = 1nF TO 1μF (SEE TABLE 3)
*NEEDED ONLY IN FILTER BYPASS MODE
**OPTIONAL OUTPUT CAPACITOR
***ONLY ONE PULLUP RESISTOR NEEDED PER BUS
AUX IN
AUX IN
Figure 2. MAX7430 Typical Application Circuit
MAX7428/MAX7430/MAX7432A
Standard Definition Video Reconstruction
Filters and Buffers

0.1μF
*1MΩ
D/A
0.1μF
*1MΩ
0.1μF
*1MΩ
D/A
0.1μF
*1MΩ
75Ω
75Ω
220μF**
220μF**
75Ω
75Ω
75Ω
75Ω
220μF**
220μF**
75Ω
75Ω
SERIAL I/O
300kΩC1
+5V
MAX7432
IN1A
IN1B
IN2A
IN2B
0.1μF
*1MΩ
D/A
0.1μF
*1MΩ
IN3A
IN3B
OUT1
OUT2
75Ω
75Ω
Z0 = 75Ω
Z0 = 75Ω
Z0 = 75Ω
Z0 = 75Ω
Z0 = 75Ω
Z0 = 75Ω
220μF**
220μF**
75Ω
75Ω
OUT3
DATA
REXTGND
VCC
ENCODER
ENCODER
ENCODER
C1 = 1nF TO 1μF (SEE TABLE 3)
*NEEDED ONLY IN FILTER BYPASS MODE
**OPTIONAL OUTPUT CAPACITOR
***ONLY ONE PULLUP RESISTOR NEEDED PER BUS
AUX IN
AUX IN
AUX IN
+5V***
Figure 3. MAX7432A Typical Application Circuit
MAX7428/MAX7430/MAX7432A
Standard Definition Video Reconstruction
Filters and Buffers
Filter
Filter Response

The reconstruction filter consists of a 6th-order
Butterworth filter in three second-order stages. The
Butterworth filter features a maximally flat passband for
NTSC and PAL bandwidths. The stopband offers typical-
ly 50dB of attenuation at sampling frequencies of 25MHz
and above (see Typical Operating Characteristics).
The corner frequency is not critical since the response
of the filter meets both the stopband and passband
specifications. The MAX7428/MAX7430/MAX7432A
incorporate an autotrimming feature that reduces the
corner frequency variation digitally. It is possible,
although not likely, that a discrete shift in the corner fre-
quency may occur due to an external environmental
change. The autotrimming operates continuously so
that the corner frequency remains centered over the full
operating temperature range.
High-Frequency Boost

The high-frequency boost compensates for signal degra-
dation and roll-off in the signal path prior to the MAX7428/
MAX7430/MAX7432A. High-frequency boost is program-
mable in four steps to increase image sharpness.
Output Buffer

The output buffer is able to drive two 150Ωvideo loads
with a 2Vp-p signal. The +6dB gain of the output buffer
is independent of the filter bypass or input selection.
The output buffer drives the 75Ωbackmatch resistors
and series capacitor (typically 220µF). The MAX7428/
MAX7430/MAX7432A are able to drive the video load
directly without using the 220µF capacitor. This feature
is common in SCARTapplications. The OUTDISABLE bit
of the control register disables the output (mute) (see
Control Register section).
Filter Bypass

The MAX7428/MAX7430/MAX7432A offer selectable fil-ter bypassing that allows either of the video inputs to
be filtered or unfiltered. The 1MΩoptional input resis-tors are needed only in filter bypass mode to provide a
discharge path for the input coupling capacitors.
Serial Interface

Maxim’s Single Pin Bus (MSPB) interface uses DATA to
transfer data to and from the microprocessor (µP) and
the MAX7428/MAX7430/MAX7432A. This negative logic
protocol uses three different pulse widths to represent
a logic “1”, logic “0”, and control commands. MSPB
allows up to 16 devices to be connected on the same
bus by assigning a unique 4-bit identification address
to each device. The µP can communicate to each
device individually or by sending a “broadcast” mes-
sage to all the devices. The unique address for each
device is set by means of the time constant set by the
external capacitor connected in parallel with the exter-
nal 300kΩresistor (see Initializing the MAX7428/
MAX7430/MAX7432Asection).
MAX7428 Control Register

Table 1 defines the structure of the MAX7428 8-bit con-
trol register programmed by MSPB. This register con-
trols the selection of INA or INB, SYNCIO functionality,
filter bypassing, clamp-level selection, high-frequency
boost control, and output disable. See Maxim’s Single
Pin Bus Interface (MSPB) section for detailed program-
ming instructions.
SYNCIO:
SYNCIO Select bit. A logic 0 sets the SYNCIO
pin to function as an output while a logic 1 sets SYNCIO
to function as an input.
ABSEL:
Channel Select bit. A logic 0 selects the input
at INB to be processed while a logic 1 selects the input
at INA to be processed.
BYPASS:
Filter Bypass Select bit. A logic 1 selects the
filter while a logic 0 bypasses the filter.
Table 1. MAX7428 Control Register
(MSB)FIRST BIT
(LSB)

NAMESYNCIOABSELBYPASSCLEVELBOOST1BOOST0OUTDISABLE—
DEFAULT01100000
BOOST1BOOST0
RELATIVE HIGH
FREQUENCY
BOOST

00010.3db to 0.5db00.6db to 1.0db10.9db to 1.5db
Table 2. Boost Level Programming
MAX7428/MAX7430/MAX7432A
Standard Definition Video Reconstruction
Filters and Buffers
CLEVEL:
Clamp Level bit. A logic 0 selects a clamp
level of 1V while a logic 0 selects a clamp level of 1.5V
at the output.
[BOOST1, BOOST0]:
High-Frequency Boost Control bits.
The adjust bits select the amount of high-frequency boost
for the filter. Table 2 defines four levels of adjustment.
OUTDISABLE:
Output Disable bit. A logic 0 selects
normal operation while a logic 1 places the output in a
high-impedance state.
MAX7430 Control Register

Table 3 defines the structure of the MAX7430 16-bit con-
trol register programmed by MSPB. This register controls
the selection of IN_A or IN_B, selection of filter 1 or 2, filter
bypassing, clamp-level selection, high-frequency boost
control, and output disable. See Maxim’s Single Pin Bus
Interface (MSPB)section for detailed programming
instructions.
ABSEL_:
Channel Select bit. A logic zero selects the
input at IN_B to be processed while a logic 1 selects
the input at IN_A to be processed.
BYPASS_:
Filter Bypass Select bit. A logic 1 selects
the channel filter while a logic 0 bypasses the channel
filter.
CLEVEL_:
Clamp Level bit. A logic 0 selects a channel
clamp level of 1V while a logic 0 selects a channel
clamp level of 1.5V at the output.
[BOOST1_, BOOST0_]:
High-Frequency Boost Control
bits. The adjust bits select the amount of high-frequency
boost for the channel filter. Table 4 defines four levels of
adjustment.
OUTDISABLE_:
Output Disable bit. A logic 0 selects
normal channel output operation while a logic 1 puts
the channel output in a high-impedance state.
MAX7432A Control Register

Table 5 defines the structure of the MAX7432A 24-bit
control register programmed by MSPB. This register
controls the selection of IN_A or IN_B, selection of filter
1, 2, or 3, filter bypassing, clamp-level selection, high-
frequency boost control, and output disable. See
Maxim’s Single-Pin Bus Interface (MSPB)section for
detailed programming instructions.
ABSEL_:
Channel Select bit. A logic zero selects the
input at IN_B to be processed while a logic 1 selects
the input at IN_A to be processed.
BYPASS_:
Filter Bypass Select bit. A logic 1 selects
the channel filter while a logic 0 bypasses the channel
filter.
CLEVEL_:
Clamp Level bit. A logic 0 selects a channel
clamp level of 1V while a logic 0 selects a channel
clamp level of 1.5V at the output.
[BOOST1_, BOOST0_]:
High-Frequency Boost Control
bits. The adjust bits select the amount of high-frequency
boost for the channel filter. Table 6 defines four levels of
adjustment.
OUTDISABLE_:
Output Disable Bit. A logic 0 selects
normal channel output operation while a logic 1 puts
the channel output in high-impedance state.
(MSB)

NAME—ABSEL2BYPASS2CLEVEL2BOOST1(2)BOOST0(2)OUT
DISABLE2—
DEFAULT01100000
NAME—ABSEL1BYPASS1CLEVEL1BOOST1(1)BOOST0(1)OUT
DISABLE1—
DEFAULT01100000
FIRST BIT
(LSB)
Table 3. MAX7430 Control Register
BOOST1_BOOST0_RELATIVE HIGH
FREQUENCY BOOST
010.3dB to 0.5dB00.6dB to 1.0dB10.9dB to 1.5dB
Table 4. Boost Level Programming
MAX7428/MAX7430/MAX7432A
Standard Definition Video Reconstruction
Filters and Buffers
Applications Information
Maxim’s Single Pin Bus (MSPB)
Serial Interface

The MSPB interface uses three pulses of different
widths to represent commands and data bits. Figure 4
shows the set of pulses that the single pin interface
uses to communicate with the device. A combination of
the one pulse (t1), zero pulse (t0), transaction pulse (tT),
and prompt pulse (tP), writes to, reads back from, and
sends broadcast data to the devices on the bus.
Note:
The zero pulse and prompt pulse are the same.
Initialization pulses are significantly longer and are
used only on power-up or software reset.
Initializing the
MAX7428/MAX7430/MAX7432A

Initialization is performed only after power-up or software
reset. It assigns a unique address to each device on the
bus. The time constant of the capacitor connected to
REXTin parallel with the 300kΩresistor determines the
order in which the devices are initialized (address
assigned). The device with the largest time constant is
initialized first and so on, in descending order. Table 7
shows the “Initialize Wait” and “Initialize Time” pulse
widths needed for a specific capacitor value and toler-
ance. Program each device on the bus with this com-
mand sequence starting with the device with the biggest
capacitor. To reinitialize a device, cycle the power or use
a software reset. The following is the command
sequence and timing diagram (Figure 5) for initialization
as shown below. Chip ID is entered LSB first.
Note:
If there is only one device on the bus, no initial-
ization is needed. Communicate to the device using the
broadcast command described on page 13.
(MSB)

NAME—ABSEL3BYPASS3CLEVEL3BOOST1(3)BOOST0(3)OUT
DISABLE3—
DEFAULT01100000
NAME—ABSEL2BYPASS2CLEVEL2BOOST1(2)BOOST0(2)OUT
DISABLE2—
DEFAULT01100000
NAME—ABSEL1BYPASS1CLEVEL1BOOST1(1)BOOST0(1)OUT
DISABLE1—
DEFAULT01100000
FIRST BIT
(LSB)
Table 5. MAX7432A Control Register
BOOST1_BOOST0_RELATIVE HIGH
FREQUENCY BOOST
010.3dB to 0.5dB00.6dB to 1.0dB10.9dB to 1.5dB
Table 6. Boost Level Programming

ZERO/PROMPT
PULSEtP = t0 = 5μs
t1 = 30μs
ONE PULSE
TRANSACTION
PULSE
tT = 100μstT
Figure 4. MSPB Interface Pulses
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED