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MAX7319AEE+MAXIMN/a121avaiI²C Port Expander with Eight Inputs and Maskable Transition Detection
MAX7319AEE+ |MAX7319AEEMAXN/a7680avaiI²C Port Expander with Eight Inputs and Maskable Transition Detection


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MAX7319AEE+
I²C Port Expander with Eight Inputs and Maskable Transition Detection
Pin Configurations, Typical Application Circuit, and
Functional Diagram appear at end of data sheet.
●Cell Phones●SAN/NAS●Servers●Notebooks●Satellite Radio
General Description

The MAX7319 2-wire serial-interfaced peripheral
fea-tures eight input ports with selectable internal pullups,
overvoltage protection to +6V, and transition detection
with interrupt output.
All input ports are continuously monitored for state
changes (transition detection). Transitions are latched,
allowing detection of transient changes. Any combination
of inputs can be selected using the interrupt mask to assert
the INT output. When the MAX7319 is subsequently
accessed through the serial interface, any pending
interrupt is cleared.
The +5.5V tolerant RST input clears the serial
interface, terminating any I2C communication to or from
the MAX7319.
The MAX7319 uses two address inputs with four-level
logic to allow 16 I2C slave addresses. The slave address also enables or disables internal 40kΩ pullups in groups
of four ports.
The MAX7319 supports hot insertion. All eight input ports,
the serial interface SDA, SCL, AD0, AD2, INT, and RST
remain high impedance in power-down (V+ = 0) with up
to +6V asserted on them.
The MAX7319 is one device in a family of pin-compatible
port expanders with a choice of input ports, open-drain
I/O ports, and push-pull output ports (see Table 1).
The MAX7319 is available in 16-pin QSOP and 16-pin
TQFN packages, and is specified over the automotive
temperature range (-40°C to +125°C).
Applications
Features
● 400kHz, +5.5V-Tolerant I2C Serial Interface● +1.71V to +5.5V Operating Voltage● Eight Input Ports with Maskable, Latching Transition
Detection● Input Ports are Overvoltage Protected to +6V ● Transient Changes are Latched, Allowing Detection
Between Read Operations● INT Output Alerts Change on Any Selection of Inputs● AD0 and AD2 Inputs Select from 16 Slave Addresses● Low 0.6µA (typ) Standby Current● -40°C to +125°C Operating Temperature Range
*Second source to PCF8574.
**Second source to PCF8574A.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
PARTINPUTSINTERRUPT MASKOPEN-DRAIN OUTPUTSPUSH-PULL OUTPUTS

MAX73198Yes——
MAX7320———8
MAX7321Up to 8—Up to 8—
MAX73224Yes—4
MAX7323Up to 4—Up to 44
MAX7328*Up to 8—Up to 8—
MAX7329**——
PARTTEMP RANGEPIN-
PACKAGE
TOP
MARK

MAX7319AEE+-40° TO +125°C16 QSOP—
MAX7319ATE+-40° TO +125°C16 TQFN-EP*ADA
MAX7319I2C Port Expander with Eight Inputs
and Maskable Transition Detection
Selector Guide
Ordering Information
EVALUATION KIT AVAILABLE
(All voltages referenced to GND.)
Supply Voltage V+ ...................................................-0.3V to +6V
SCL, SDA, AD0, AD2, RST, INT, I0–I7 ...................-0.3V to +6V
SDA Input Current ............................................................. 10mA
INT Input Current................................................................10mA
Total V+ Current .................................................................50mA
Total GND Current ...........................................................100mA
Continuous Power Dissipation (TA = +70°C)
16-Pin QSOP (derate 8.3mW/°C over +70°C) ............667mW
16-Pin TQFN (derate 15.6mW/°C over +70°C) ........1250mW
Operating Temperature Range .........................-40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
(V+ = +1.71V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA = +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Operating Supply VoltageV+1.715.50V
Power-On Reset VoltageVPOR1.6V
Standby Current (Interface Idle)ISTBSCL and SDA and other digital inputs at V+0.61.5µA
Supply Current
(Interface Running)I+fSCL = 400kHz; other digital inputs at V+2355µA
Input High Voltage
SDA, SCL, AD0, AD2, RST, I0–I7VIHV+ < 1.8V0.8 x V+VV+ ≥ 1.8V0.7 x V+
Input Low Voltage
SDA, SCL, AD0, AD2, RST, I0–I7VIL
V+ < 1.8V0.2 x V+V+ ≥ 1.8V0.3 x V+
Input Leakage Current
SDA, SCL, AD0, AD2, RST, I0–I7IIH, IILSDA, SCL, AD0, AD2, RST, I0–I7 at V+ or
GND-0.2+0.2µA
Input Capacitance
SDA, SCL, AD0, AD2, RST, I0–I710pF
Output Low Voltage
SDAVOLSDAISINK = 6mA250mV
Output Low Voltage
INTVOLINTISINK = 5mA100250mV
Port Input Pullup ResistorRPU254055kΩ
MAX7319I2C Port Expander with Eight Inputs
and Maskable Transition Detection
Electrical Characteristics

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Absolute Maximum Ratings
(V+ = +1.71V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA = +25°C.) (Note 1)
(V+ = +1.71V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA = +25°C.) (Note 1)
Note 1:
All parameters are tested at TA = +25°C. Specifications over temperature are guaranteed by design.
Note 2:
A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) to bridge
the undefined region of SCL’s falling edge.
Note 3:
Guaranteed by design.
Note 4: Cb = total capacitance of one bus line in pF. tR and tF measured between 0.3 x V+ and 0.7 x V+, ISINK ≤ 6mA.
Note 5:
Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Serial-Clock FrequencyfSCL400kHz
Bus Free Time Between a STOP
and a START ConditiontBUF1.3µs
Hold Time (Repeated) START
ConditiontHD, STA0.6µs
Repeated START Condition
Setup TimetSU, STA0.6µs
STOP Condition Setup TimetSU, STO0.6µs
Data Hold TimetHD, DAT(Note 2)0.9µs
Data Setup TimetSU, DAT100ns
SCL Clock Low PeriodtLOW1.3µs
SCL Clock High PeriodtHIGH0.7µs
Rise Time of Both SDA and SCL
Signals, ReceivingtR(Notes 3, 4)20 +
0.1Cb300ns
Fall Time of Both SDA and SCL
Signals, ReceivingtF(Notes 3, 4)20 +
0.1Cb300ns
Fall Time of SDA, TransmittingtF,TX(Notes 3, 4)20 +
0.1Cb250ns
Pulse Width of Spike SuppressedtSP(Note 5)50ns
Capacitive Load for Each Bus LineCb(Note 3)400pF
RST Pulse WidthtW500ns
RST Rising to START Condition
Setup TimetRST1µs
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Port Input Setup TimetPSUCL ≤ 100pF0µs
Port Input Hold TimetPHCL ≤ 100pF4µs
INT Input Data Valid TimetIVCL ≤ 100pF4µs
INT Reset Delay Time from STOPtIPCL ≤ 100pF4µs
INT Reset Delay Time from
AcknowledgetIRCL ≤ 100pF4µs
MAX7319I2C Port Expander with Eight Inputs
and Maskable Transition Detection
Timing Characteristics
Port and Interrupt INT Timing Characteristics
(TA = +25°C, unless otherwise noted.)
PINNAMEFUNCTIONQSOPTQFN

1, 315, 1AD0, AD2Address Inputs. Select device slave address with AD0 and AD2. Connect AD0 and AD2
to either GND, V+, SCL, or SDA to give four logic combinations (see Table 3).16RSTReset Input, Active Low. Drive RST low to clear the 2-wire interface.
4–7, 9–122–5, 7–10I0–I7Input Ports. I0 to I7 are CMOS logic inputs protected to +6V.6GNDGround11INTInterrupt Output, Active Low. INT is an open-drain output rated at +6V.12SCLI2C-Compatible Serial Clock Input13SDAI2C-Compatible Serial Data I/O14V+Positive Supply Voltage. Bypass V+ to GND with a ceramic capacitor of at least 0.047µF.EPEPExposed Pad. Connect exposed pad to GND.
SUPPLY CURRENT vs. TEMPERATURE
MAX7319 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (
V+ = +3.3V
V+ = +5.0V
V+ = +1.71V
V+ = +2.5V
fSCL = 400kHz
STANDBY CURRENT vs. TEMPERATURE
MAX7319 toc01
TEMPERATURE (°C)
STANDBY CURRENT (
V+ = +3.3V
V+ = +2.5V
V+ = +5.0V
V+ = +1.71V
fSCL = 0kHz2.0
MAX7319I2C Port Expander with Eight Inputs
and Maskable Transition Detection
Pin Description
Typical Operating Characteristics
Detailed Description
MAX7319–MAX7329 Family Comparison

The MAX7319–MAX7323 family consists of five
pin-compatible, eight-port expanders. Each version is
optimized for different applications. The MAX7328 and
MAX7329 are second sources to the PCF8574 and
PCF8574A.
The MAX7324–MAX7327 family consists of four
pin-compatible, 16-port expanders that integrate the
functions of the MAX7320 and one of either the MAX7319,
MAX7321, MAX7322, or MAX7323.
Functional Overview

The MAX7319 is a general-purpose port expander,
operating from a +1.71V to +5.5V supply that provides
eight CMOS input ports that are overvoltage protected to
+6V independent of supply voltage.
The MAX7319 is set to one of 16 I2C slave addresses
(0x60 to 0x6F) using the address-select inputs AD2 and
AD0, and is accessed over an I2C serial interface. The
RST input clears the serial interface in case of a hung
bus, terminating any serial transaction to or from the
MAX7319.
The input ports offer latching transition detection
functionality. All input ports are continuously monitored
Table 1. MAX7319–MAX7329 Family Comparison
PART
I2C
SLAVE
ADDRESS
INPUTS
INPUT
INTERRUPT
MASK
OPEN-
DRAIN
OUTPUTS
PUSH-
PULL
OUTPUTS
APPLICATION
8-PORT EXPANDERS

MAX7319110xxxx8Yes——
Input-only versions:
Eight input ports with programmable latching
transition detection interrupt and selectable pullups.
Offers maximum versatility for automatic input
monitoring. An interrupt mask selects which inputs
cause an interrupt on transitions, and transition flags
identify which inputs have changed (even
momentarily) since the ports were last read.
MAX7320101xxxx———8
Output-only versions:
Eight push-pull outputs with selectable power-up
default levels
Push-pull outputs offer faster rise time than open-
drain outputs, and require no pullup resistors.
MAX7321110xxxxUp to 8—Up to 8—
I/O versions:
Eight open-drain I/O ports with latching transition
detection interrupt and selectable pullups.
Open-drain outputs can level shift the logic-high
State to a higher or lower voltage than V+ using
external pullup resistors. Any port can be used as an
input by setting the open-drain output to logic-high.
Transition flags identify which inputs have changed
(even momentarily) since the ports were last read.
MAX7322110xxxx4Yes—4
Four input-only, four output-only versions:
Four input ports with programmable latching
transition detection interrupt and selectable pullups.
Four push-pull outputs with selectable power-up
default levels.
MAX7319I2C Port Expander with Eight Inputs
and Maskable Transition Detection
for changes. An input change sets one of eight flag bits
that identify changed input(s). All flags are cleared
upon a subsequent read or write transaction to the
MAX7319.
A latching interrupt output, INT, is programmed to flag
input data changes on input ports through an interrupt
mask register. By default, data changes on any input
port force INT to a logic-low. The interrupt output, INT,
and all transition flags are cleared when the MAX7319
is next accessed through the serial interface.
Internal pullup resistors to V+ are selected by the
address-select inputs, AD0 and AD2. Pullups are enabled
on the input ports in groups of four (see Table 3).
Initial Power-Up

On power-up, the transition detection logic is reset, and
INT is released to a high-impedance state. The interrupt
mask register is set to 0xFF, enabling the interrupt output
for transitions on all eight input ports. The transition flags
are cleared to indicate no data changes.
RST Input

The RST input voids any I2C transaction involving the
MAX7319, forcing the MAX7319 into the I2C STOP
condition. A reset does not affect the interrupt output (INT)
or change the contents of the interrupt mask register.
RST is overvoltage tolerant to +6V.
Standby Mode

When the serial interface is idle, the MAX7319
automatically enters standby mode, drawing minimal
supply current.
Slave Address and Input Pullup Selection

Address inputs AD0 and AD2 determine the MAX7319
slave address and select which inputs have pullup
resistors. Pullups are enabled on the input ports in
groups of four (see Table 3). The MAX7319, MAX7321,
MAX7322, and MAX7323 use a different range of slave
addresses (110xxxx) than the MAX7320 (101xxxx).
The MAX7319 slave address is determined on each I2C
transmission, regardless of whether the transmission is
actually addressing the MAX7319. The MAX7319
distinguishes whether address inputs AD2 and AD0 are
connected to SDA or SCL instead of fixed logic levels
V+ or GND during this transmission. This means that the
MAX7319 slave address can be configured dynamically
in the application without cycling the device supply.
On initial power-up, the MAX7319 cannot decode the
address inputs AD2 and AD0 fully until the first I2C
transmission. AD0 and AD2 initially appear to be con-
nected to V+ or GND. This is important because the
address selection determines which inputs have
pullups applied. However, at power-up, the I2C SDA
and SCL bus interface lines are high impedance at the
pins of every device (master or slave) connected to the
Table 1. MAX7319–MAX7329 Family Comparison (continued)
PART
I2C
SLAVE
ADDRESS
INPUTS
INPUT
INTERRUPT
MASK
OPEN-
DRAIN
OUTPUTS
PUSH-
PULL
OUTPUTS
APPLICATION

MAX7323110xxxxUp to 4—Up to 44
Four I/O, four output-only versions:
Four open-drain I/O ports with latching transition
detection interrupt and selectable pullups.
Four push-pull outputs with selectable power-up
default levels.
MAX7328
MAX7329
0100xxx
0111xxxUp to 8—Up to 8—
PCF8574-, PCF8574A-compatible versions:
Eight open-drain I/O ports with nonlatching transition
detection interrupt and pullups on all ports.
All ports power up as inputs (or logic-high outputs).
Any port can be used as an input by setting the
open-drain output to logic-high.
16-PORT EXPANDERS

MAX7324101xxxx
And
110xxxxYes—8Software equivalent to a MAX7320 plus a MAX7321.
MAX7325Up to 8—Up to 88Software equivalent to a MAX7320 plus a MAX7319.
MAX73264Yes—12Software equivalent to a MAX7320 plus a MAX7322.
MAX7327Up to 4—Up to 412Software equivalent to a MAX7320 plus a MAX7323.
MAX7319I2C Port Expander with Eight Inputs
and Maskable Transition Detection
of the I2C specification. Therefore, address inputs AD2
and AD0 that are connected to SDA or SCL normally
appear at power-up to be connected to V+. The pullup
selection logic uses AD0 to select whether pullups are
enabled for ports I3–I0, and uses AD2 to select whether
pullups are enabled for ports I7–I4. The rule is that a
logic-high SDA or SCL connection selects the pullups,
while a logic-low deselects the pullups (Table 3). The
pullup configuration is correct on power-up for a standard
I2C configuration, where SDA and SCL are pulled up to
V+ by the external I2C pullup resistors.
There are circumstances where the assumption that
SDA = SCL = V+ on power-up is not true, for
example, in true hot-swap applications, in which there is
legitimate bus activity during power-up. Also, if SDA and
SCL are terminated with pullup resistors to a different
supply voltage than the MAX7319’s supply voltage, and
if that pullup supply rises later than the MAX7319’s
supply, then SDA or SCL may appear at power-up to be
connected to GND. In such applications, use the four
address combinations that are selected by connecting
address inputs AD2 and AD0 to V+ or GND (shown in
bold in Table 3). These selections are guaranteed to be
behavior. If one of the other 12 address combinations is
used, be aware that an unexpected combination of
pullups might be asserted until the first I2C
transmission (to any device, not necessarily the MAX7319)
is put on the bus.
Port Inputs

Port inputs switch at CMOS logic levels as determined by
the expander’s supply voltage, and are overvoltage toler-
ant to +6V, independent of the expander’s supply voltage.
Port-Input Transition Detection

All eight input ports are monitored for changes since
the expander was last accessed through the serial
interface. The state of the input ports is stored in an
internal “snapshot” register for transition monitoring.
The snapshot is continuously compared with the actual
input conditions, and if a change is detected for any
port input, an internal transition flag is set for that port.
The eight port inputs are sampled (internally latched
into the snapshot register) and the old transition flags
cleared during the I2C acknowledge of every MAX7319
read and write access. The previous port transition
flags are read through the serial interface as the sec-
Table 2. Read and Write Access to Eight-Port Expander Family
PARTI2C SLAVE
ADDRESSINPUTSINTERRUPT
MASK
OPEN-
RAIN
OUTPUTS
PUSH-
PULL
OUTPUTS
I2C DATA WRITEI2C DATA READ

MAX7319110xxxx8Yes——mask>


MAX7320101xxxx———8outputs>
MAX7321110xxxxUp to 8—Up to 8—outputs>


MAX7322110xxxx4Yes—4
I5–I2 interrupt
mask, O1, O0
outputs>
Port inputs>
<0, 0, I5–I2 transition flags,
0, 0>
MAX7323110xxxxUp to 4—Up to 44
Port inputs>
<0, 0, P5–P2 transition flags,
0, 0>
MAX73280100xxxUp to 8—Up to 8—outputs>
MAX73290111xxxUp to 8—Up to 8—outputs>
MAX7319I2C Port Expander with Eight Inputs
and Maskable Transition Detection
A long read sequence (more than 2 bytes) can be used
to poll the expander continuously without the overhead
of resending the slave address. If more than 2 bytes are
read from the expander, the expander repeatedly returns
the input port data followed by the transition flags. The
inputs are repeatedly resampled and the transition flags
repeatedly reset for each pair of bytes read. All changes
that occur during a long read sequence are detected and
reported.
The MAX7319 includes an 8-bit interrupt mask register
that selects which inputs generate an interrupt upon
change. Each input’s transition flag is set when its input
changes, independent of the interrupt mask register
settings. The interrupt mask register allows the processor
to be interrupted for critical events, while the inputs and
the transition flags can be polled periodically to detect
less critical events.
The INT logic ensures that unnecessary interrupts are
not asserted, yet data transitions are detected and
reported regardless of when the transition occurs. The
INT output is not reasserted during a read sequence to
avoid recursive reentry into an interrupt service routine. If
transition occurs during read sequence, the INT assertion
is delayed until the STOP condition, however, INT is not
reasserted upon a STOP condition if the changed input
data is read before the STOP occurs.
Transition-Detection Masks

The transition-detection logic incorporates a transition
flag and an interrupt mask bit for each input port. The
eight change flags can be read through the serial
interface, and the 8-bit interrupt mask is set through the
serial interface.
Each port’s transition flag is set when that port’s input
changes, and the transition flag remains set even if the
input returns to its original state. The port’s interrupt
mask determines whether a transition on that input port
generates an interrupt. Enable interrupts for high-priority
inputs using the interrupt mask. The interrupt allows the
system to respond quickly to changes on these inputs.
Poll the MAX7319 periodically to monitor less-important
inputs. The transition flags indicate whether a permanent
or transient change has occurred on any input since the
MAX7319 was last accessed.
Serial Interface
Serial Addressing

The MAX7319 operates as a slave that sends and
receives data through an I2C interface. The interface uses
a serial data line (SDA) and a serial clock line (SCL) to
achieve bidirectional communication between master(s)
and slave(s). The master initiates all data transfers to
and from the MAX7319 and generates the SCL clock that
Table 3. MAX7319 Address Map
PIN CONNECTIONDEVICE ADDRESS40kΩ INPUT PULLUP ENABLED
AD2AD0A6A5A4A3A2A1A0I7I6I5I4I3I2I1I0

SCLGND1100000YYYY————
SCLV+1100001YYYYYYYY
SCLSCL1100010YYYYYYYY
SCLSDA1100011YYYYYYYY
SDAGND1100100YYYY————
SDAV+1100101YYYYYYYY
SDASCL1100110YYYYYYYY
SDASDA1100111YYYYYYYY
GNDGND1101000————————
GNDV+1101001————YYYY

GNDSCL1101010————YYYY
GNDSDA1101011————YYYYGND1101100YYYY————V+1101101YYYYYYYYSCL1101110YYYYYYYYSDA1101111YYYYYYYY
MAX7319I2C Port Expander with Eight Inputs
and Maskable Transition Detection
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