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MAX7312AAG+N/AN/a2500avai2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection
MAX7312AAG+ |MAX7312AAGMAXIMN/a22avai2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection
MAX7312AAG+TMAXN/a701avai2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection
MAX7312ATG+T |MAX7312ATGTMAXIMN/a3573avai2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection
MAX7312AUG+ |MAX7312AUGMAXN/a44avai2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection


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MAX7312AUG+ ,2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion ProtectionELECTRICAL CHARACTERISTICS (continued)+ +(V = 2V to 5.5V, T = -40°C to +125°C, unless otherwise not ..
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MAX7312AAG+-MAX7312AAG+T-MAX7312ATG+T-MAX7312AUG+
2-Wire-Interfaced 16-Bit I/O Port Expander with Interrupt and Hot-Insertion Protection
General Description
The MAX7312 2-wire-interfaced expander provides 16-bit
parallel input/output (I/O) port expansion in SMBus™ and
I2C applications. The MAX7312 consists of input port
registers, output port registers, polarity inversion regis-
ters, configuration registers, a bus timeout register, and
an I2C-compatible serial interface logic, compatible with
SMBus. The system master can invert the MAX7312 input
data by writing to the active-high polarity inversion regis-
ter. The system master can enable or disable bus timeout
by writing to the bus timeout register.
Any of the 16 I/O ports can be configured as an input or
an output. A power-on reset (POR) initializes the 16 I/Os
as inputs. Three address select pins configure the part
to one of 64 slave ID addresses.
The MAX7312 supports hot insertion. All port pins, the
INToutput, SDA, SCL, and the slave address inputs
AD0-2 remain high impedance in power-down (Vt= 0V)
up to 6V.
The MAX7312 is available in 24-pin SO, SSOP, TSSOP,
and thin QFN packages and is specified over the -40°C
to +125°C automotive temperature range.
For applications requiring I/Os with integrated 100kΩ
pullup resistors, refer to the MAX7311 data sheet.
Applications

Servers/Blades
RAID Systems
Medical Equipment
Instrumentation and Test Measurement
Networking
Features
400kbps I2C-Compatible Serial Interface2V to 5.5V Operation5V Overvoltage Tolerant I/OsSupports Hot Insertion16 I/O Pins that Default to Inputs on Power-UpOpen-Drain Interrupt Output (INT)Bus Timeout for Lock-Up-Free OperationNoise Filter on SCL/SDA Inputs64 User-Selectable Slave ID AddressesLow Standby Current (2.9µA typ)Polarity Inversion4mm ✕4mm, 0.8mm Thin QFN Package-40°C to +125°C Operation
MAX7312
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection
Ordering Information

19-3057; Rev 3; 4/05
SMBus is a trademark of Intel Corp.
EVALUATION KIT
AVAILABLE
PARTTEMP RANGEPIN-PACKAGEPKG
CODE

MAX7312AWG-40°C to +125°C24 Wide SO—
MAX7312AAG-40°C to +125°C24 SSOP—
MAX7312ATG-40°C to +125°C24 Thin QFN
(4mm x 4mm)T2444-4
MAX7312AUG-40°C to +125°C24 TSSOP—
TOP VIEW
SDA
SCL
AD0I/O0
AD2
AD1
I/O15
I/O14
I/O13
I/O12I/O4
I/O3
I/O2
I/O1
I/O11
I/O10
I/O9
I/O8GND
I/O7
I/O6
I/O5
TSSOP/SSOP/SO

MAX7312
INT
THIN QFN

MAX7312ATG34561716151413
SCL
SDA
INT
AD2
I/O0I/O1I/O2I/O3I/O4I/O5
AD0I/O15
I/O13
I/O12I/O11
AD1
I/O10
I/O8
I/O9
GND
I/O6
I/O7
I/O14
Pin Configurations
MAX7312
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
+= 2V to 5.5V, TA= -40°C to +125°C, unless otherwise noted. Typical values are at V+= 3.3V, TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.to GND................................................................-0.3V to +6V
I/O0–I/O15 as Inputs....................................(GND - 0.3V) to +6V
SCL, SDA, AD0, AD1, AD2, INT...................(GND - 0.3V) to +6V
Maximum V+Current......................................................+250mA
Maximum GND Current...................................................-250mA
DC Input Current on I/O0–I/O15.......................................±20mA
DC Output Current on I/O0–I/O15....................................±80mA
Continuous Power Dissipation (TA= +70°C)
24-Pin Wide SO (derate 11.8mW/°C above +70°C)....941mW
24-Pin SSOP (derate 8.0mW/°C above +70°C)...........640mW
24-Pin TSSOP (derate 12.2mW/°C above +70°C).......975mW
24-Pin Thin QFN (derate 20.8mW/°C above +70°C).1668mW
Operating Temperature Range.........................-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYM B O L CONDITIONSMINTYPMAXUNITS

Supply VoltageV+25.5V+ = 2V2335+ = 3.3V4360Supply CurrentI+All I/Os unloaded,
fSCL = 400kHz+ = 5.5V80120+ = 2V2.311+ = 3.3V2.912Standby CurrentISTBYAll I/Os unloaded,
fSCL = 0+ = 5.5V3.815.5
Power-On Reset VoltageVPOR1.41.7V
SCL, SDA

Input Voltage LowVIL0.3 x V+V
Input Voltage HighVIH0.7 x V+V
Low-Level Output VoltageVOLISINK = 6mA0.4V
Leakage CurrentIL-1+1µA
Input Capacitance10pF
I/O_

Input Voltage LowVIL0.8V
Input Voltage HighVIH1.8V
Input Leakage CurrentTA = -40°C to +85°C-1+1µA+ = 2V, VOL = 0.5V8.517+ = 3.3V, VOL = 0.5V1732Low-Level Output CurrentISINK+ = 5V, VOL = 0.5V43+ = 3.3V, VOH = 2.4V2941High Output CurrentISOURCEV+ = 5V, VOH = 4.5V31mA
AD0, AD1, AD2

Input Voltage LowVIL0.3 x V+V
Input Voltage HighVIH0.7 x V+V
MAX7312
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection
Note 1:
All parameters are 100% production tested at TA= +25°C. Specifications over temperature are guaranteed by design.
Note 2:
Minimum SCL clock frequency is limited by the MAX7312 bus timeout feature, which resets the serial bus interface if either
SDA or SCL is held low for a minimum of 25ms. Disable bus timeout feature for DC operation.
Note 3:
A master device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VILof the SCL
signal) in order to bridge the undefined region SCL’s falling edge.
Note 4:
CB= total capacitance of one bus line in pF.
Note 5:
The maximum tFfor the SDA and SCL bus lines is specified at 300ns. The maximum fall time for the SDA output stage tFis
specified at 250ns. This allows series protection resistors to be connected between the SDA and SCL pins and the
SDA/SCL bus lines without exceeding the maximum specified tF.
Note 6:
Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
DC ELECTRICAL CHARACTERISTICS (continued)

(V+= 2V to 5.5V, TA= -40°C to +125°C, unless otherwise noted. Typical values are at V+= 3.3V, TA= +25°C.) (Note 1)
PARAMETERSYM B O L CONDITIONSMINTYPMAXUNITS

Leakage Current-1+1µA
Input Capacitance4pF
INT
Low-Level Output CurrentIOLVOL = 0.4V6mA
AC ELECTRICAL CHARACTERISTICS

(V+= 2V to 5.5V, TA= -40°C to +125°C, unless otherwise noted.) (Note 1)
PARAMETERSYM B O L CONDITIONSMINTYPMAXUNITS

SCL Clock FrequencyfSCL(Note 2)400kHz
Bus TimeouttTIMEOUT2961ms
Bus Free Time Between STOP
and START ConditionstBUFFigure 21.3µs
Hold Time (Repeated) START
ConditiontHD,STAFigure 20.6µs
Repeated START Condition
Setup TimetSU,STAFigure 20.6µs
STOP Condition Setup TimetSU,STOFigure 20.6µs
Data Hold TimetHD,DATFigure 2 (Note 3)0.9µs
Data Setup TimetSU,DATFigure 2100ns
SCL Low PeriodtLOWFigure 21.3µs
SCL High PeriodtHIGHFigure 20.7µs
V+ < 3.3V500SDA Fall TimetFFigure 2 (Notes 4, 5)V+ ≥ 3.3V250ns
Pulse Width of Spike SuppressedtSP(Note 6)50ns
PORT TIMING

Output Data ValidtPVFigure 73µs
Input Data Setup Time27µs
Input Data Hold Time0µs
INTERRUPT TIMING

Interrupt ValidtIVFigure 930.5µs
Interrupt ResettIRFigure 92µs
MAX7312
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection
Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. TEMPERATURE

MAX7312 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (
fSCL = 400kHz
ALL I/Os UNLOADED+ = 3.3V+ = 5V+ = 2V
STANDBY SUPPLY CURRENT
vs. TEMPERATURE

MAX7312 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (
SCL = V+
ALL I/Os UNLOADED+ = 3.3V+ = 5V+ = 2V
SUPPLY CURRENT
vs. SUPPLY VOLTAGE

MAX7312 toc03
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (
fSCL = 400kHz
ALL I/Os UNLOADED
I/O SINK CURRENT
vs. OUTPUT LOW VOLTAGE

MAX7312 toc04
VOL (V)
ISINK
(mA)
V+ = 2V
TA = +125°C
TA = +25°C
TA = -40°C
I/O SINK CURRENT
vs. OUTPUT LOW VOLTAGE

MAX7312 toc05
VOL (V)
ISINK
(mA)
V+ = 3.3V
TA = +125°C
TA = -40°C
TA = +25°C
I/O SINK CURRENT
vs. OUTPUT LOW VOLTAGE

MAX7312 toc06
VOL (V)
ISINK
(mA)
00.5+ = 5V
TA = +125°C
TA = -40°C
TA = +25°C
I/O OUTPUT LOW VOLTAGE
vs. TEMPERATURE

MAX7312 toc07
TEMPERATURE (°C)
(mV)
-50125+ = 5V, ISINK = 10mA
V+ = 2V, ISINK = 10mA
V+ = 2V, ISINK = 1mAV+ = 5V, ISINK = 1mA
I/O SOURCE CURRENT
vs. OUTPUT HIGH VOLTAGE

MAX7312 toc08
V+ - VOH (V)
ISOURCE
(mA)
V+ = 2V
TA = +125°C
TA = +25°C
TA = -40°C
I/O SOURCE CURRENT
vs. OUTPUT HIGH VOLTAGE

MAX7312 toc09
V+ - VOH (V)
ISOURCE
(mA)
V+ = 3.3V
TA = +125°C
TA = +25°C
TA = -40°C
MAX7312
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection
Pin Description
Typical Operating Characteristics (continued)

(TA = +25°C, unless otherwise noted.)
I/O SOURCE CURRENT
vs. OUTPUT HIGH VOLTAGE

MAX7312 toc10+ - VOH (V)
ISOURCE
(mA)
0.60.50.30.40.20.1+ = 5V
TA = +125°C
TA = +25°C
TA = -40°C
I/O HIGH VOLTAGE vs. TEMPERATURE

MAX7312 toc11
TEMPERATURE (°C)
- V
(V)
V+ = 5V, ISOURCE = 10mA+ = 2V, ISOURCE = 10mA
PIN
TSSOP/
SSOP/SO
THIN
QFN
NAMEFUNCTION

122INTInterrupt Output (Open Drain)23AD1Address Input 124AD2Address Input 2
4–111–8I/O0–I/O7Input/Output Port 19GNDSupply Ground
13–2010–17I/O8–I/O15Input/Output Port 218AD0Address Input 019SCLSerial Clock Line20SDASerial Data Line21V+Supply Voltage. Bypass with a 0.047µF capacitor to GND.PADExposed
padExposed Pad on Package Underside. Connect to GND.
MAX7312
Detailed Description

The MAX7312 general-purpose input/output (GPIO)
peripheral provides up to 16 I/O ports, controlled
through an I2C-compatible serial interface. The
MAX7312 consists of input port registers, output port
registers, polarity inversion registers, configuration reg-
isters, and a bus-timeout register. Upon power-on, all
I/O lines are set as inputs. Three slave ID address select
pins, AD0, AD1, and AD2, choose one of 64 slave ID
addresses, including the eight addresses supported by
the Phillips PCA9555. Table 1 is the register address
table. Tables 2–6 show detailed register information.
Serial Interface
Serial Addressing

The MAX7312 operates as a slave that sends and
receives data through a 2-wire interface. The interface
uses a serial data line (SDA) and a serial clock line
(SCL) to achieve bidirectional communication between
master(s) and slave(s). A master, typically a microcon-
troller, initiates all data transfers to and from the
MAX7312, and generates the SCL clock that synchro-
nizes the data transfer (Figure 2).
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection

I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
INPUT/OUTPUT
PORT 1
SMBus
CONTROL
8 BIT
READ PULSE
WRITE PULSE
I/O8
I/O9
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
INPUT/OUTPUT
PORT 2
8 BIT
READ PULSE
WRITE PULSE
INTPOWER-ON
RESET
INPUT
FILTER+
SDA
SCL
AD2
AD1
AD0
GND
MAX7312
Figure 1. MAX7312 Block Diagram
SCL
SDA
START CONDITIONSTOP CONDITIONREPEATED START CONDITIONSTART CONDITION
tSU, DAT
tHD, DATtLOW
tHD, STA
tHIGHtF
tSU, STA
tHD, STA
tSU, STO
tBUF
Figure 2. 2-Wire Serial Interface Timing Diagram
Each transmission consists of a START condition sent by
a master, followed by the MAX7312 7-bit slave address
plus R/Wbit, a register address byte, 1 or more data
bytes, and finally a STOP condition (Figure 3).
START and STOP Conditions

Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure 3).
Bit Transfer

One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 4).
Acknowledge

The acknowledge bit is a clocked 9th bit, which the
recipient uses as a handshake receipt of each byte of
data (Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse, such that the SDA line is sta-
ble low during the high period of the clock pulse. When
the master is transmitting to the MAX7312, the
MAX7312
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection

SDA
SCLS
START
CONDITION
STOP
CONDITION
Figure 3. START and STOP Conditions
SDA
SCL
DATA LINE STABLE; DATA VALIDCHANGE OF DATA ALLOWED
Figure 4. Bit Transfer
SCL
SDA
BY TRANSMITTER
CLOCK PULSE FOR ACKNOWLEDGMENTSTART CONDITION
SDA
BY RECEIVER89
Figure 5. Acknowledge
MAX7312
MAX7312 generates the acknowledge bit since the
MAX7312 is the recipient. When the MAX7312 is trans-
mitting to the master, the master generates the
acknowledge bit.
Slave Address

The MAX7312 has a 7-bit-long slave address (Figure 6).
The 8th bit following the 7-bit slave address is the R/W
bit. Set this bit low for a write command and high for a
read command.
Slave address pins AD2, AD1, and AD0 choose 1 of 64
slave ID addresses (Table 7).
Data Bus Transaction

The command byte is the first byte to follow the 8-bit
device slave address during a write transmission
(Table 1, Figure 7). The command byte is used to deter-
mine which of the following registers are written or read.
Writing to Port Registers

Transmit data to the MAX7312 by sending the device
slave address and setting the LSB to a logic zero. The
command byte is sent after the address and deter-
mines which registers receive the data following the
command byte (Figure 7).
2-Wire-Interfaced 16-Bit I/O Port Expander
with Interrupt and Hot-Insertion Protection

SDA
SDAA5A4A3A2A1A0
MSBLSB
ACKR/W
PROGRAMMABLE
Figure 6. Slave Address
COMMAND BYTE
ADDRESS (HEX)FUNCTIONPROTOCOLPOWER-UP
DEFAULT

0x00Input port 1Read byteXXXX XXXX
0x01Input port 2Read byteXXXX XXXX
0x02Output port 1Read/write byte1111 1111
0x03Output port 2Read/write byte1111 1111
0x04Port 1 polarity inversionRead/write byte0000 0000
0x05Port 2 polarity inversionRead/write byte0000 0000
0x06Port 1 configurationRead/write byte1111 1111
0x07Port 2 configurationRead/write byte1111 1111
0x08Timeout registerRead/write byte0000 0001
0xFFFactory reserved. (Do not write to this register.)——
Table 1. Command Byte Register
3456789SCL
SDASA000000176543210A76543210A0ASLAVE ADDRESS
COMMAND BYTEPORT 1 DATAPORT 2 DATA
R/WACKNOWLEDGE
FROM SLAVE
ACKNOWLEDGE
FROM SLAVESTART
CONDITION
ACKNOWLEDGE
FROM SLAVE
ACKNOWLEDGE
FROM SLAVE
tPV
tPV
WRITE TO PORT
DATA OUT PORT 1
READ FROM PORT 2
Figure 7. Writes to Output Registers Through Write Byte Protocol
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