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MAX7301AAX-T |MAX7301AAXTMAIXMN/a2500avai4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander
MAX7301AAI+ |MAX7301AAIMAXN/a40avai4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander
MAX7301AAI+T |MAX7301AAITMAXIMN/a1207avai4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander
MAX7301AAX+ |MAX7301AAXMAXIMN/a130avai4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander
MAX7301AAX+ |MAX7301AAXMAXN/a8avai4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander
MAX7301AAX+T |MAX7301AAXTMAXN/a10avai4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander
MAX7301ATL+N/AN/a2500avai4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander
MAX7301ATL+T |MAX7301ATLTMAXIMN/a4002avai4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander


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MAX7301AAI+-MAX7301AAI+T-MAX7301AAX+-MAX7301AAX+T-MAX7301AAX-T-MAX7301ATL+-MAX7301ATL+T
4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander
Pin Configurations appear at end of data sheet.
General Description

The MAX7301 compact, serial-interfaced I/O expander
(or general-purpose I/O (GPIO) peripheral) provides
microprocessors with up to 28 ports. Each port is individu-
ally user configurable to either a logic input or logic output.
Each port can be configured either as a push-pull logic
output capable of sinking 10mA and sourcing 4.5mA, or
a Schmitt logic input with optional internal pullup. Seven
ports feature configurable transition detection logic, which
generates an interrupt upon change of port logic level.
The MAX7301 is controlled through an SPI-compatible
4-wire serial interface.
The MAX7301AAX and MAX7301ATL have 28 ports and
are available in 36-pin SSOP and 40-pin TQFN packages,
respectively. The MAX7301AAI has 20 ports and is avail-
able in a 28-pin SSOP package.
For a 2-wire I2C-interfaced version, refer to the MAX7300
data sheet.
For a pin-compatible port expander with additional
24mA constant-current LED drive capability, refer to the
MAX6957 data sheet.
Applications
●White Goods●Gaming Machines●Industrial Controllers●System Monitoring
Beneits and Features
●Industry-Standard 4-Wire Interface Simplifies
Expansion of I/O Ports to Up to 28 I/Os Independent
of Microprocessor ArchitectureHigh-Speed, 26MHz, SPI-/QSPI™-/MICROWIRE®-
Compatible Serial Interface 2.25V to 5.5V Operation20 or 28 I/O Ports Conigurable as Push-Pull Logic
Output, Schmitt Logic Input or Schmitt Logic Input
with Internal Pullup Logic Transition Detection for Seven I/O Ports ●Low Power Consumption Reduces Power-Supply
Requirements11μA (max) Shutdown Current
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
QSPI is a trademark of Motorola, Inc.
MICROWIRE is a registered trademark of National
Semiconductor Corp.
PARTTEMP RANGEPIN-
PACKAGE

MAX7301AAI+-40°C to +125°C28 SSOP
MAX7301AAX+-40°C to +125°C36 SSOP
MAX7301ATL+-40°C to +125°C40 TQFN-EP*
P10
P12
P13
P11
P15
P14
P17
P18
P16
P20
P19
P22
P23
P21
GND
GND
SCLK
DIN
DOUT
P30
P29
P31
P27
P28
P25
P24
P26
MAX7301
SSOP

CHIP SELECT
DATA IN
CLOCK IN
DATA OUT
I/O 4
I/O 5
I/O 6
I/O 7
I/O 8
I/O 9
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
I/O 16
I/O 17
I/O 18
I/O 19
I/O 20
I/O 21
I/O 22
I/O 23
I/O 24
I/O 25
I/O 26
I/O 27
I/O 28
I/O 29
I/O 30
I/O 31
47nFISET
39kΩ
MAX73014-Wire-Interfaced, 2.5V to 5.5V,
20-Port and 28-Port I/O Expander
Typical Operating Circuit
Ordering Information
(Voltage with respect to GND.)
V+ ............................................................................-0.3V to +6V
All Other Pins ..............................................-0.3V to (V+ + 0.3V)
P4–P31 Current ...............................................................±30mA
GND Current ....................................................................800mA
Continuous Power Dissipation (TA = +70°C)28-Pin SSOP (derate 9.5mW/°C above +70°C) ..........762mW36-Pin SSOP (derate 11.8mW/°C above +70°C) ........941mW40-Pin TQFN (derate 26.3mW/°C above +70°C) ...2963.0mW
Operating Temperature Range
(TMIN, TMAX) ................................................-40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
(Typical Operating Circuit, V+ = 2.5V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Operating Supply VoltageV+2.55.5V
Shutdown Supply CurrentISHDNAll digital inputs at V+
or GND
TA = +25°C5.58TA = -40°C to +85°C10
TA = TMIN to TMAX11
Operating Supply Current
(Output High)IGPOH
All ports programmed
as outputs high, no
load, all other inputs at
V+ or GND
TA = +25°C180230TA = -40°C to +85°C250
TA = TMIN to TMAX270
Operating Supply Current
(Output Low)IGPOL
All ports programmed
as outputs low, no
load, all other inputs at
V+ or GND
TA = +25°C170210TA = -40°C to +85°C230
TA = TMIN to TMAX240
Operating Supply Current
(Input)IGPI
All ports programmed
as inputs without pul-
lup, ports, and all other
inputs at V+ or GND
TA = +25°C110135TA = -40°C to +85°C140
TA = TMIN to TMAX145
INPUTS AND OUTPUTS

Logic High Input Voltage
Port InputsVIH0.7 ×V
Logic Low Input Voltage
Port InputsVIL0.3 ×V
Input Leakage CurrentIIH, IILGPIO inputs without pullup,
VPORT = V+ to GND-100±1+100nA
GPIO Input Internal Pullup to V+IPUV+ = 2.5V121930µAV+ = 5.5V80120180
Hysteresis Voltage GPIO InputsDVI0.3V
Output High VoltageVOH
GPIO outputs, ISOURCE = 2mA,
TA = -40°C to +85°C
V+ -
0.7VGPIO outputs, ISOURCE = 1mA,
V+ -
MAX73014-Wire-Interfaced, 2.5V to 5.5V,
20-Port and 28-Port I/O Expander
Electrical Characteristics

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Absolute Maximum Ratings
Note 1: All parameters tested at TA = +25°C. Specifications over temperature are guaranteed by design.
Note 2:
Guaranteed by design.
(V+ = 2.5V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1)
(Typical Operating Circuit, V+ = 2.5V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

CLK Clock PeriodtCP38.4ns
CLK Pulse-Width HightCH19ns
CLK Pulse-Width LowtCL19ns
CS Fall to SCLK Rise Setup TimetCSS9.5ns
CLK Rise to CS Rise Hold TimetCSH0ns
DIN Setup TimetDS9.5ns
DIN Hold TimetDH0ns
Output Data Propagation DelaytDOCLOAD = 25pF21ns
Minimum CS Pulse HightCSW19ns
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Port Sink CurrentIOLVPORT = 0.6V21018mA
Output Short-Circuit CurrentIOLSCPort configured output low, shorted to V+2.751120.00mA
Input High-Voltage SCLK, DIN,VIH
V+ ≤ 3.3V1.6
V+ > 3.3V2
Input Low-Voltage SCLK, DIN,VIL0.6V
Input Leakage Current SCLK,
DIN, CSIIH, IIL-50+50nA
Output High-Voltage DOUTVOHISOURCE = 1.6mAV+ -
0.5V
Output Low-Voltage DOUTVOLISINK = 1.6mA0.4V
MAX73014-Wire-Interfaced, 2.5V to 5.5V,
20-Port and 28-Port I/O Expander
Timing Characteristics (Figure 3)
Electrical Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
GPO SHORT-CIRCUIT CURRENT
vs. TEMPERATURE

MAX7301 toc07
PORT CURRENT (mA)
GPO = 0, PORT
SHORTED TO V+
GPO = 1, PORT
SHORTED TO GND
GPI PULLUP CURRENT
vs. TEMPERATURE

MAX7301 toc06
PULLUP CURRENT (A)
V+ = 5.5V
V+ = 3.3V
V+ = 2.5V
GPO SOURCE CURRENT vs. TEMPERATURE
(OUTPUT = 1)

MAX7301 toc05
TEMPERATURE (°C)
PORT SOURCE CURRENT (mA)
VPORT = 1.4
V+ = 5.5V
V+ = 3.3V
V+ = 2.5V
GPO SINK CURRENT vs. TEMPERATURE
(OUTPUT = 0)

MAX7301 toc04
TEMPERATURE (°C)
PORT SINK CURRENT (mA)
V+ = 2.5V TO 5.5V, VPORT = 0.6V
OPERATING SUPPLY CURRENT
vs. V+ (OUTPUTS UNLOADED)

MAX7301 toc03
V+ (V)
SUPPLY CURRRENT (mA)
ALL PORTS OUTPUT (1)
ALL PORTS OUTPUT (0)
ALL PORTS INPUT
(PULLUPS DISABLED)
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE

MAX7301 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (A)
V+ = 5.5V
V+ = 3.3V
V+ = 2.5V
OPERATING SUPPLY CURRENT
vs. TEMPERATURE

MAX7301 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
V+ = 2.5V TO 5.5V
NO LOAD
ALL PORTS
OUTPUT (1)
ALL PORTS
OUTPUT (0)
ALL PORTS INPUT HIGH
MAX73014-Wire-Interfaced, 2.5V to 5.5V,
20-Port and 28-Port I/O Expander
Typical Operating Characteristics
Detailed Description
The MAX7301 GPIO peripheral provides up to 28 I/O
ports, P4 to P31, controlled through an SPI-compatible
serial interface. The ports can be configured to any
combination of logic inputs and logic outputs, and
default to logic inputs on power-up.
Figure 1 is the MAX7301 functional diagram. Any I/O
port can be configured as a push-pull output (sinking
10mA, sourcing 4.5mA), or a Schmitt-trigger logic
input. Each input has an individually selectable internal
pullup resistor. Additionally, transition detection allows
seven ports (P24 through P30) to be monitored in any
maskable combination for changes in their logic status.
A detected transition is flagged through an interrupt pin
(port P31).
The port configuration registers set the 28 ports, P4
to P31, individually as GPIO. A pair of bits in registers
0x09 through 0x0F sets each port’s configuration
(Tables 1 and 2).
The 36-pin MAX7301AAX and 40-pin MAX7301ATL
have 28 ports, P4 to P31. The 28-pin MAX7301AAI is
offered in 20 ports, P12 to P31. The eight unused ports
should be configured as outputs on power-up by writ-
ing 0x55 to registers 0x09 and 0x0A. If this is not done,
the eight unused ports remain as floating inputs and
quiescent supply current rises, although there is no dam-
Register Control of I/O Ports Across Multiple Drivers

The MAX7301 offers 20 or 28 I/O ports, depending on
package choice.
Two addressing methods are available. Any single
port (bit) can be written (set/cleared) at once; or, any
sequence of eight ports can be written (set/cleared) in
any combination at once. There are no boundaries; it is
equally acceptable to write P0 through P7, P1 through P8,
or P31 through P38 (P32 through P38 are nonexistent,
so the instructions to these bits are ignored).
Shutdown

When the MAX7301 is in shutdown mode, all ports are
forced to inputs (which can be read), and the pullup
current sources are turned off. Data in the port and
control registers remain unaltered so port configuration
and output levels are restored when the MAX7301 is
taken out of shutdown. The display driver can still be
programmed while in shutdown mode. For minimum
supply current in shutdown mode, logic inputs should
be at GND or V+ potential. Shutdown mode is exited by
setting the S bit in the configuration register (Table 6).
PIN
NAMEFUNCTION36 SSOP28 SSOPTQFN
136ISETBias Current Setting. Connect ISET to GND through a resistor (RISET) value of
39kW to 120kW.
2, 32, 337, 38, 39GNDGround440DOUT4-Wire Interface Serial Data Output Port5–24—P12–P31I/O Ports. P12 to P31 can be configured as push-pull outputs, CMOS logic
inputs, or CMOS logic inputs with weak pullup resistor.
5–32—
1–10,
12–19,
P4–P31I/O Ports. P4 to P31 can be configured as push-pull outputs, CMOS logic inputs,
or CMOS logic inputs with weak pullup resistor.—11, 20, 31N.C.No Connection. Not internally connected.2532SCLK4-Wire Interface Serial Clock Input Port2633DIN4-Wire Interface Serial Data Input Port2734CS4-Wire Interface Chip-Select Input, Active-Low2835V+Positive Supply Voltage. Bypass V+ to GND with a minimum 0.047µF capacitor.——EPExposed Pad on Package Underside. Connect to GND.
MAX73014-Wire-Interfaced, 2.5V to 5.5V,
20-Port and 28-Port I/O Expander
Pin Description
Serial Interface
The MAX7301 communicates through an SPI-compati-
ble 4-wire serial interface. The interface has three
inputs, Clock (SCLK), Chip Select (CS), and Data In
(DIN), and one output, Data Out (DOUT). CS must be
low to clock data into or out of the device, and DIN
must be stable when sampled on the rising edge of
SCLK. DOUT provides a copy of the bit that was input
15.5 clocks earlier, or upon a query it outputs internal
register data, and is stable on the rising edge of SCLK. Note that the SPI protocol expects DOUT to be high impedance when the MAX7301 is not being accessed; DOUT on the MAX7301 is never high impedance. Refer to Application Note 1879: Using Maxim SPI-
compatible Display Drivers with other SPI Peripherals for ways to convert DOUT to tri-state, if required.

SCLK and DIN may be used to transmit data to other
peripherals, so the MAX7301 ignores all activity on
SCLK and DIN except between the fall and subsequent
rise of CS.
Control and Operation Using the 4-Wire Interface

Controlling the MAX7301 requires sending a 16-bit
address (Table 3), and the second byte, D7 through D0,
is the data byte (Table 4 through Table 8).Connecting Multiple MAX7301s to the 4-Wire Bus
Multiple MAX7301s may be daisy-chained by connect-
ing the DOUT of one device to the DIN of the next, and
driving SCLK and CS lines in parallel (Figure 3). Data at
DIN propagates through the internal shift registers and
appears at DOUT 15.5 clock cycles later, clocked out on
the falling edge of SCLK. When sending commands to
multiple MAX7301s, all devices are accessed at the same
time. An access requires (16 × n) clock cycles, where n is
the number of MAX7301s connected together. To update
just one device in a daisy-chain, the user can send the
No-Op command (0x00) to the others.
Writing Device Registers

The MAX7301 contains a 16-bit shift register into which
DIN data are clocked on the rising edge of SCLK, when
CS is low. When CS is high, transitions on SCLK have
no effect. When CS goes high, the 16 bits in the Shift
register are parallel loaded into a 16-bit latch. The
16 bits in the latch are then decoded and executed.
Table 2. Port Configuration Matrix
Table 1. Port Configuration Map
MODEFUNCTION
PORT
REGISTER
(0x20–0x5F)
(0xA0–0xDF)
PIN BEHAVIORADDRESS
CODE (HEX)
PORT
CONFIGURATION
BIT PAIR
UPPERLOWER

DO NOT USE THIS SETTING0x09 to 0x0F00
OutputGPIO OutputRegister bit = 0Active-low logic output0x09 to 0x0F01
Register bit = 1Active-high logic output
InputGPIO Input
Without PullupRegister bit =
input logic level
Schmitt logic input0x09 to 0x0F10
InputGPIO Input with PullupSchmitt logic input with pullup0x09 to 0x0F11
REGISTERADDRESS CODE (HEX)
REGISTER DATAD6D5D4D3D2D1D0

Port Configuration for P7, P6, P5, P40x09P7P6P5P4
Port Configuration for P11, P10, P9, P80x0AP11P10P9P8
Port Configuration for P15, P14, P13, P120x0BP15P14P13P12
Port Configuration for P19, P18, P17, P160x0CP19P18P17P16
Port Configuration for P23, P22, P21, P200x0DP23P22P21P20
Port Configuration for P27, P26, P25, P240x0EP27P26P25P24
Port Configuration for P31, P30, P29, P280x0FP31P30P29P28
MAX73014-Wire-Interfaced, 2.5V to 5.5V,
20-Port and 28-Port I/O Expander
The MAX7301 is written to using the following
sequence:
1) Take SCLK low.
2) Take CS low. This enables the internal 16-bit shift
register.
3) Clock 16 bits of data into DIN—D15 first, D0 last—
observing the setup and hold times (bit D15 is low,
indicating a write command).
4) Take CS high (either while SCLK is still high after
clocking in the last data bit, or after taking SCLK
low).
5) Take SCLK low (if not already low).
Figure 4 shows a write operation when 16 bits are
transmitted.
It is acceptable to clock more than 16 bits into the
MAX7301 between taking CS low and taking CS high
again. In this case, only the last 16 bits clocked into the
MAX7301 are retained.
Reading Device Registers

Any register data within the MAX7301 may be read by
sending a logic high to bit D15. The sequence is:
1) Take SCLK low.
2) Take CS low (this enables the internal 16-bit Shift
register).
3) Clock 16 bits of data into DIN—D15 first to D0 last.
D15 is high, indicating a read command and bits
D14 through D8 containing the address of the reg-
ister to be read. Bits D7–D0 contain dummy data,
which is discarded.
4) Take CS high (either while SCLK is still high after
clocking in the last data bit, or after taking SCLK low),
positions D7 through D0 in the Shift register are now
loaded with the register data addressed by bits D1
through D8.
5) Take SCLK low (if not already low).
6) Issue another read or write command (which can
be a No-Op), and examine the bit stream at DOUT;
the second 8 bits are the contents of the register
addressed by bits D1 through D8 in step 3.
Figure 1. MAX7301 Functional DiagramD1D2D3D4D5D6D7D8D9D10D11D12D13D14D15D1D2D3D4D5D6D7D8D9D10D11D12D13D14D15
R/WDATA
PORT REGISTERS
GPIO
CONFIGURATION
P4 TO P31
GPIO DATAR/W
CONFIGURATION
REGISTERSPORT CHANGE
DETECTOR
MASK REGISTER
COMMAND
REGISTER DECODE
DATA BYTECOMMAND BYTE
DIN
SCLK
DOUT
MAX73014-Wire-Interfaced, 2.5V to 5.5V,
20-Port and 28-Port I/O Expander
Initial Power-Up
On initial power-up, all control registers are reset, and the
MAX7301 enters shutdown mode (Table 4).
Transition (Port Data Change) Detection

Port transition detection allows any combination of the
seven ports P24–P30 to be continuously monitored
for changes in their logic status (Figure 5). A detected
change is flagged on port P31, which is used as an
active-high interrupt output (INT). Note that the MAX7301
does not identify which specific port(s) caused the inter-
rupt, but provides an alert that one or more port levels
have changed.
The mask register contains 7 mask bits that select
which of the seven ports, P24–P30 are to be monitored
(Table 8). Set the appropriate mask bit to enable that
port for transition detect. Clear the mask bit if transi-
tions on that port are to be ignored. Transition detection
works regardless of whether the port being monitored is
set to input or output, but generally it is not particularly
useful to enable transition detection for outputs.
Port P31 must be configured as an output in order to
work as the interrupt output INT when transition detec-
tion is used. Port P31 is set as output by writing bit
D7 = 0 and bit D6 = 1 to the port configuration register
(Table 1).
To use transition detection, first set up the mask regis-
ter and configure port P31 as an output, as described
above. Then enable transition detection by setting the
the configuration register is written with the M bit set,
the MAX7301 updates an internal 7-bit snapshot register,
which holds the comparison copy of the logic states of
ports P24 through P30. The update action occurs regard-
less of the previous state of the M bit, so that it is not nec-
essary to clear the M bit and then set it again to update
the snapshot register.
When the configuration register is written with the M bit
set, transition detection is enabled and remains
enabled until either the configuration register is written
with the M bit clear, or a transition is detected. The INT
output port P31 goes low, if it was not already low.
Once transition detection is enabled, the MAX7301
continuously compares the snapshot register against
the changing states of P24 through P31. If a change on
any of the monitored ports is detected, even for a short
time (like a pulse), INT output port P31 is latched high.
The INT output is not cleared if more changes occur or
if the data pattern returns to its original snapshot con-
dition. The only way to clear INT is to access (read or
write) the transition detection mask register (Table 8).
Transition detection is a one-shot event. When INT has
been cleared after responding to a transition event,
transition detection is automatically disabled, even
though the M bit in the configuration register remains
set (unless cleared by the user). Reenable transition
detection by writing the configuration register with the
M bit set, to take a new snapshot of the seven ports
P24 to P30.
Figure 2. 4-Wire Interface
tCSHtCL
tCSStCHtCSH
SCLK
DIN
DOUT
tDS
tDH
tDO
MAX73014-Wire-Interfaced, 2.5V to 5.5V,
20-Port and 28-Port I/O Expander
External Component RISET
The MAX7301 uses an external resistor, RISET, to set
internal biasing. Use a resistor value of 39kW.
Applications Information
Low-Voltage Operation

The MAX7301 operates down to 2V supply voltage
(although the sourcing and sinking currents are not
guaranteed), providing that the MAX7301 is powered
up initially to at least 2.5V to trigger the device’s internal
reset, and also that the serial interface is constrained to
10Mbps.
SPI Routing Considerations

The MAX7301’s SPI interface is guaranteed to operate
at 26Mbps on a 2.5V supply, and on a 5V supply typi-
cally operates at 50Mbps. This means that transmission
line issues should be considered when the interface
connections are longer than 100mm, particularly with
higher supply voltages. Ringing manifests itself as com-
munication issues, often intermittent, typically due to
double clocking due to ringing at the SCLK input. Fit
a 1kW to 10kW parallel termination resistor to either
ringing for moderately long interface runs. Use line-
impedance matching terminations when making connec-
tions between boards.
PCB Layout Considerations

For the TQFN version, connect the underside exposed
pad to GND. Ensure that all the MAX7301 GND con-
nections are used. A ground plane is not necessary, but
may be useful to reduce supply impedance if the
MAX7301 outputs are to be heavily loaded. Keep the
track length from the ISET pin to the RISET resistor as
short as possible, and take the GND end of the resistor
either to the ground plane or directly to the ground pins.
Power-Supply Considerations

The MAX7301 operates with power-supply voltages of
2.5V to 5.5V. Bypass the power supply to GND with a
0.047µF capacitor as close to the device as possible.
Add a 1µF capacitor if the MAX7301 is far away from
the board’s input bulk decoupling capacitor.
Chip Information

PROCESS: CMOS
Figure 4. Transmission of a 16-Bit Write to the MAX7301
Figure 3. Daisy-Chain Arrangement for Controlling Multiple MAX7301s
D15
= 0D14D13D12D11D10D9D8D7D6D5D4D3D2D1D0
D15 = 0
SCLK
DIN
DOUT
MICROCONTROLLER

SERIAL-DATA OUTPUT
SERIAL CS OUTPUT
SERIA-CLOCK OUTPUT
SERIAL-DATA INPUT
DIN
SCLK
DOUTDIN
SCLK
DOUTDIN
SCLK
DOUT
MAX7301MAX7301MAX7301
MAX73014-Wire-Interfaced, 2.5V to 5.5V,
20-Port and 28-Port I/O Expander
ic,good price


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