MAX7036GTP+-MAX7036GTP+T Fast Delivery |IC PHOENIX CO.,LIMITED

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MAX7036GTP+-MAX7036GTP+T
300MHz to 450MHz ASK Receiver with Internal IF Filter
General Description
The MAX7036 low-cost receiver is designed to receive
amplitude-shift-keyed (ASK) and on-off-keyed (OOK)
data in the 300MHz to 450MHz frequency range. The
receiver has an RF input signal range of -109dBm to
0dBm.
The MAX7036 requires few external components and
has a power-down pin to put it in a low-current sleep
mode, making it ideal for cost- and power-sensitive
applications. The low-noise amplifier (LNA), phase-
locked loop (PLL), mixer, IF filter, received-signal-
strength indicator (RSSI), and baseband sections are
all on-chip. The MAX7036 uses a very-low intermediate
frequency (VLIF) architecture. The MAX7036 integrates
the IF filter on-chip and therefore eliminates an external
ceramic filter, reducing the bill-of-materials cost. The
device also contains an on-chip automatic gain control
(AGC) that reduces the LNA gain by 30dB when the
input signal power is large. The MAX7036 operates
from either a 5V or a 3.3V power supply and draws
5.5mA (typ) of current.
The MAX7036 is available in a 20-pin thin QFN pack-
age with an exposed pad and is specified over the
AEC-Q100 Level 2 (-40°C to +105°C) temperature
range.
Applications
Low-Cost RKE
Garage Door Openers
Remote Controls
Home Automation
Sensor Networks
Security Systems
FeaturesASK/OOK Modulation< 250µs Enable Turn-On TimeOn-Chip PLL, VCO, Mixer, IF, BasebandLow IF (200kHz Nominal)5.5mA DC Current1µA Standby Current3.3V/5V OperationSmall 20-Pin Thin QFN Package with an Exposed
Pad
MAX7036
300MHz to 450MHz ASK Receiver
with Internal IF Filter
MAX7036
THIN QFN
5mm x 5mm
TOP VIEWEP+
XTAL2
AVDD
LNAIN
ENABLE
OPPDVDDIFC3DFFB
PDOUT141211
VDD
DATAOUT
IFC2
MIXIN1
MIXIN2
LNAOUT
XTAL1
DCOC
DSN10IFC1DSP
Pin Configuration
Ordering Information
19-4386; Rev 1; 8/10
EVALUATION KIT
AVAILABLEPART TEMP RANGE PIN-PACKAGEMAX7036GTP/V+ -40°C to +105°C 20 Thin QFN-EP*
/Vdenotes an automotive qualified part.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
MAX7036
300MHz to 450MHz ASK Receiver
with Internal IF Filter
ABSOLUTE MAXIMUM RATINGS
3.3V DC ELECTRICAL CHARACTERISTICS
(Typical Application Circuit, 50Ωsystem impedance, VAVDD= VDVDD= VDD= 3.0V to 3.6V, fRF= 300MHz to 450MHz, TA= -40°C to
+105°C, unless otherwise noted. Typical values are at VAVDD= VDVDD= VDD= 3.3V, TA= +25°C, unless otherwise noted.) (100%
tested at TA= +105°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND...........................................................-0.3V to +6.0V
AVDD to GND........................................................-0.3V to +4.0V
DVDD to GND........................................................-0.3V to +4.0V
ENABLE to GND.........................................-0.3V to (VDD+ 0.3V)
LNAIN to GND.......................................................-0.3V to +1.2V
All Other Pins to GND.............................-0.3V to (VDVDD+ 0.3V)
Continuous Power Dissipation (TA= +70°C)
20-Pin TQFN (derate 20.8mW/°C above +70°C)....1666.7mW
Junction-to-Case Thermal Resistance (θJC) (Note 1)
20-Pin TQFN...................................................................2°C/W
Junction-to-Ambient Thermal Resistance (θJA) (Note 1)
20-Pin TQFN.................................................................48°C/W
Operating Temperature Range.........................-40°C to +105°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
Soldering Temperature (reflow).......................................+260°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Supply VoltageVDDVAVDD = VDVDD = VDD3.03.33.6V
fRF = 315MHz5.36.7
fRF = 433MHz5.87.3mA
Supply CurrentIINTA < +105°C
Deep-sleep mode,
VENABLE = 0V12.7μA
DIGITAL INPUT (ENABLE)
Input High VoltageVIHVAVDD = VDVDD = VDDVDD -
0.4V
Input Low VoltageVILVAVDD = VDVDD = VDD0.4V
Input CurrentIENABLE0 ≤ VENABLE ≤ VDD20μA
DIGITAL OUTPUT (DATAOUT)
Output Low VoltageVOLISINK = 100μA0.4V
Output High VoltageVOHISOURCE = 100μAVDD -
0.4V
Note 1:Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a single-
layer board. For detailed information on package thermal considerations, go to /thermal-tutorial.
MAX7036
300MHz to 450MHz ASK Receiver
with Internal IF Filter
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Supply VoltageVDD4.55.05.5V
fRF = 315MHz5.46.8
fRF = 433MHz5.97.4mA
Supply CurrentIINTA < +105°C
Deep-sleep mode,
VENABLE = 0V13.4μA
DIGITAL INPUT (ENABLE)
Input High VoltageVIHVAVDD = VDVDDVDD -
0.4V
Input Low VoltageVILVAVDD = VDVDD0.4V
Input CurrentIENABLE0 ≤ VENABLE ≤ VDD20μA
DIGITAL OUTPUT (DATAOUT)
Output Low VoltageVOLISINK = 100μA0.4V
Output High VoltageVOHISOURCE = 100μAVDD -
0.4V
5.0V DC ELECTRICAL CHARACTERISTICS
(Typical Application Circuit, 50Ωsystem impedance, VDD= 4.5V to 5.5V, fRF= 300MHz to 450MHz, TA= -40°C to +105°C, unless
otherwise noted. Typical values are at VDD= 5.0V, TA= +25°C, unless otherwise noted.) (100% tested at TA= +105°C.)
AC ELECTRICAL CHARACTERISTICS
(Typical Application Circuit, 50Ωsystem impedance, VAVDD= VDVDD= VDD= 3.0V to 3.6V, fRF= 300MHz to 450MHz, TA= -40°C to
+105°C, unless otherwise noted. Typical values are at VAVDD= VDVDD= VDD= 3.3V, TA= +25°C, fRF= 315MHz, unless otherwise
noted.) (100% tested at TA= +105°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Receiver Input Frequency RangefRF300450MHz
Maximum Receiver Input LevelPRFIN0dBm
fRF = 315MHz-109Sensitivity (Note 2)fRF = 433MHz-107dBm
Enable power on
(VDD > 3.0V)250μs
Power-On TimetON
Time for valid RSSI
output, does not
include baseband
filter settlingVDD power on1ms
AGC Hysteresis5dB
AGC Low Gain-to-High Gain
Switching Time13ms
MAX7036
300MHz to 450MHz ASK Receiver
with Internal IF Filter
AC ELECTRICAL CHARACTERISTICS (continued)
(Typical Application Circuit, 50Ωsystem impedance, VAVDD= VDVDD= VDD= 3.0V to 3.6V, fRF= 300MHz to 450MHz, TA= -40°C to
+105°C, unless otherwise noted. Typical values are at VAVDD= VDVDD= VDD= 3.3V, TA= +25°C, fRF= 315MHz, unless otherwise
noted.) (100% tested at TA= +105°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
LNA/MIXER
fRF = 315MHz0.4 -
j5.6
LNA Input ImpedanceZINLNANormalized to 50Ω
fRF = 433MHz0.4 -
j4.0
LO Signal Feedthrough to
Antenna-75dBm
Voltage Gain ReductionLow-gain mode, AGC enabled29dB
High-gain LNA mode55LNA/Mixer Voltage GainLow-gain LNA mode26dB
3dB Cutoff FrequencyBWIFSet by capacitors on IFC1 and IFC2 (see
the Typical Application Circuit)400kHz
RSSI Linearity±0.5dB
RSSI Dynamic RangeIncludes AGC80dB
PRFIN < -120dBm1.34RSSI LevelPRFIN > 0dBm, AGC enabled2.35V
Intermediate FrequencyfIF200kHz
Maximum Data-Filter BandwidthBWDF50kHz
Maximum Data-Slicer BandwidthBWDS100kHz
Maximum Peak Detector
Bandwidth50kHz
Manchester coded33Maximum Data RateNonreturn to zero (NRZ)66kbps
Crystal FrequencyfXTAL9.3614.06MHz
Crystal Load CapacitanceCLOAD10pF
Note 2: BER = 2 x 10-3, Manchester coded, data rate = 4kbps. IF bandwidth = 400kHz.
MAX7036
300MHz to 450MHz ASK Receiver
with Internal IF Filter
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(3.3V OPERATION)
MAX7036 toc01
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
TA = -40°C
TA = +25°C
TA = +85°CTA = +105°C
VAVDD = VDVDD = VDD
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(5.0V OPERATION)
MAX7036 toc02
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
5.0V APPLICATION CIRCUIT
TA = +105°C
TA = -40°C
TA = +85°C
TA = +25°
SUPPLY CURRENT vs. RF FREQUENCY
MAX7036 toc03
RF FREQUENCY (MHz)
SUPPLY CURRENT (mA)
TA = +105°C
TA = -40°C
TA = +85°C
TA = +25°
PRF = -80dBm
BIT ERROR RATE vs. PEAK RF
INPUT POWER
MAX7036 toc04
PEAK RF INPUT POWER (dBm)
BIT ERROR RATE (%)
fRF = 315MHz
fRF = 433MHz
SENSITIVITY vs. TEMPERATURE
MAX7036 toc05
TEMPERATURE (°C)
SENSITIVITY (dBm)851053510-15
fRF = 433MHzfRF = 315MHz
BER = 0.2%
DATA RATE = 4kbps
MANCHESTER
RSSI vs. INPUT POWER
MAX7036 toc06
INPUT POWER (dBm)
RSSI (V)
fRF = 433MHz
fIF = 200kHz
LNA/MIXER VOLTAGE GAIN
vs. IF FREQUENCY
MAX7036 toc07
IF FREQUENCY (kHz)
LNA/MIXER VOLTAGE GAIN (dB)
fRF = 433.92MHz
PRF = -71dBm
S11 SMITH CHART PLOT OF RFIN
(315MHz CIRCUIT)
MAX7036 toc08
S11 = 7.9729Ω - j0.6085Ω
at fRF = 315MHz
S11 SMITH CHART PLOT OF RFIN
(433MHz CIRCUIT)
MAX7036 toc09
S11 = 6.5175Ω - j5.5849Ω
at fRF = 433MHz
Typical Operating Characteristics
(Typical Application Circuit, VAVDD= VDD= VDVDD= 3.3V, fRF= 315MHz, TA= +25°C, unless otherwise noted.)
MAX7036
300MHz to 450MHz ASK Receiver
with Internal IF Filter
Pin Description
Typical Operating Characteristics (continued)
(Typical Application Circuit, VAVDD= VDD= VDVDD= 3.3V, fRF= 315MHz, TA= +25°C, unless otherwise noted.)
PINNAMEFUNCTIONENABLEEnable Input. Internally pulled down to ground. Set VENABLE = VDD for normal operation.XTAL2Crystal Input 2. Connect an external crystal from XTAL2 to XTAL1. Bypass to GND if XTAL1 is driven
from an AC-coupled external reference (see the Crystal Oscillator section).XTAL1Crystal Input 1. Connect an external crystal from XTAL2 to XTAL1. Can also be driven with an AC-
coupled external reference oscillator (see the Crystal Oscillator section).AVDD
Positive Analog Supply Voltage. Connect to DVDD. Bypass to GND with a 0.1μF capacitor as close as
possible to the device (see the Typical Application Circuit). For 5.0V operation, AVDD is internally
connected to an on-chip 3.2V LDO regulator. For 3.3V operation, connect AVDD to VDD.LNAINLow-Noise Amplifier Input. Must be AC-coupled (see the Low-Noise Amplifier section).LNAOUTLow-Noise Amplifier Output. Must be connected to AVDD through a parallel LC tank circuit. AC-
couple to MIXIN2 (see the Low-Noise Amplifier section).MIXIN22nd Differential Mixer Input. Connect to the LNAOUT side of the LC tank filter through a 100pF
capacitor (see the Typical Application Circuit).MIXIN11st Differential Mixer Input. Connect to the AVDD side of the LC tank filter through a 100pF capacitor
(see the Typical Application Circuit).IFC2IF Fi l ter C ap aci tor C onnecti on 2. Thi s i s for the S al l en- Key IF fi l ter . C onnect a cap aci tor fr om IFC 2 to GN D .
The val ue of the cap aci tor i s d eter m i ned b y the IF fi l ter b and w i d th ( see the Typical Application Circuit) .IFC1IF Fi l ter C ap aci tor C onnecti on 1. Thi s i s for the S al l en- Key IF fi l ter . C onnect a cap aci tor fr om IFC 1 to IFC 3.
The val ue of the cap aci tor i s d eter m i ned b y the IF fi l ter b and w i d th ( see the Typical Application Circuit) .IFC3IF Fi l ter C ap aci tor C onnecti on 3. Thi s i s for the S al l en- Key IF fi l ter . C onnect a cap aci tor fr om IFC 3 to IFC 1.
The val ue of the cap aci tor i s d eter m i ned b y the IF fi l ter b and w i d th ( see the Typical Application Circuit) .DVDDPositive Digital Supply Voltage Input. Connect to AVDD. Bypass to GND with a 0.01μF capacitor as
close as possible to the device (see the Typical Application Circuit).
REGULATOR VOLTAGE
vs. REGULATOR CURRENT
MAX7036 toc10
REGULATOR CURRENT (mA)
REGULATOR VOLTAGE (V)2515105
TA = -40°C
TA = +25°CTA = +85°C
TA = +105°C
VDD = 5V, +5V CIRCUIT
PHASE NOISE
vs. OFFSET FREQUENCY
MAX7036 toc11
OFFSET FREQUENCY (kHz)
PHASE NOISE (dBc/Hz)
10010,00011010000.1
fRF = 315MHz
PHASE NOISE
vs. OFFSET FREQUENCY
MAX7036 toc12
OFFSET FREQUENCY (kHz)
PHASE NOISE (dBc/Hz)
10010,00011010000.1
fRF = 433MHz
MAX7036
300MHz to 450MHz ASK Receiver
with Internal IF Filter
Functional Diagram
Pin Description (continued)
PINNAMEFUNCTIONDCOCDC Offset Capacitor Connection. This is for the RSSI amplifier. Connect a 1μF capacitor from this pin
to ground (see the Typical Application Circuit).OPPNoninverting Op-Amp Input. This is for the Sallen-Key data filter. Connect a capacitor from this pin to
GND. The value of the capacitor is determined by the data-filter bandwidth.DFFBData-Filter Feedback Input. Input for the feedback of the Sallen-Key data filter. Connect a capacitor
from this pin to DSP. The value of the capacitor is determined by the data-filter bandwidth.DSPPositive Data-Slicer Input. Connect a capacitor from this pin to DFFB. The value of the capacitor is
determined by the data-filter bandwidth.DSNNegative Data-Slicer InputPDOUTPeak-Detector OutputVDD
Power-Supply Voltage Input. For 5.0V operation, VDD is the input to an on-chip voltage regulator
whose 3.2V output drives AVDD. Bypass to ground with a 0.1μF capacitor as close as possible to the
device (see the Typical Application Circuit).DATAOUTDigital Baseband Data Output
—EPExposed Pad. Internally connected to ground. Connect to a large ground plane using multiple vias to
maximize thermal and electrical performance.
MAX7036
EP*
*EXPOSED PAD.
CONNECT TO GND.
3.2V
REGULATOR
PEAK
DETECTOR
REF
REF
AGC
DATAOUTDSNPDOUTDSPOPPDFFB
LNAOUT
MIXIN1
MIXIN2
XTAL1
XTAL2
ENABLE
VDD
AVDD
DVDD
LNAIN
IFC1IFC2IFC3DCOC
PLL710913111718161415

Partno	Mfg	Dc	Qty	Available	Descript
MAX7036GTP+ \|MAX7036GTP	MAXIM	N/a	5	avai	300MHz to 450MHz ASK Receiver with Internal IF Filter
MAX7036GTP+T	MAIXM	N/a	2500	avai	300MHz to 450MHz ASK Receiver with Internal IF Filter