MAX6958AAEE+T ,2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with KeyscanELECTRICAL CHARACTERISTICS(V+ = 3V to 5.5V, T = T to T , unless otherwise noted. Typical values are ..
MAX6959AAEE ,2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with KeyscanFeatures 400kbps 2-Wire Serial InterfaceThe MAX6958/MAX6959 compact multiplexed com-mon-cathode di ..
MAX6959AAEE+ ,2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with KeyscanFeatures♦ 400kbps 2-Wire Serial InterfaceThe MAX6958/MAX6959 compact multiplexed com-mon-cathode di ..
MAX695CPE ,Microprocessor Supervisory CircuitsFeatures
. Precision Voltage Monitor
4.65V in MAX690, MAX691, MAX694 and MAX695
4.40V in MAX69 ..
MAX695CWE ,Microprocessor supervisory circuit.19-02 18; He V 2; 4/95
MAX695CWE ,Microprocessor supervisory circuit.General Description
The MAX690 Family of supervisory circuits reduce the
complexity and number ..
MB401 , 40 Amp Single Phase Bridge Rectifier 50 to 1000 Volts
MB401 , 40 Amp Single Phase Bridge Rectifier 50 to 1000 Volts
MB401 , 40 Amp Single Phase Bridge Rectifier 50 to 1000 Volts
MB40166 ,AD/DA CONVERTERFUJITSU SEMICONDUCTORDS04-28500-5EDATA SHEETASSPAD/DA CONVERTERMB40166/MB401761-CHANNEL 6-BIT AD/DA ..
MB40176 ,AD/DA CONVERTERFUJITSU SEMICONDUCTORDS04-28500-5EDATA SHEETASSPAD/DA CONVERTERMB40166/MB401761-CHANNEL 6-BIT AD/DA ..
MB40176 ,AD/DA CONVERTERFUJITSU SEMICONDUCTORDS04-28500-5EDATA SHEETASSPAD/DA CONVERTERMB40166/MB401761-CHANNEL 6-BIT AD/DA ..
MAX6958AAEE+-MAX6958AAEE+T-MAX6959AAEE+
2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan
General DescriptionThe MAX6958/MAX6959 compact multiplexed com-
mon-cathode display drivers interface microprocessors
to seven-segment numeric LED digits, or discrete LEDs
through an SMBus™- and I2C-compatible 2-wire serial
interface. The 2-wire serial interface uses fixed
0.8V/2.1V logic thresholds for compatibility with 2.5V
and 3.3V systems when the display driver is powered
from a 5V supply.
The MAX6958/MAX6959 drive up to four 7-segment
digits, with decimal points, plus four discrete LEDs, or
four 7-segment digits and eight discrete LEDs if the
digits’ decimal points are not used, or up to 36 discrete
LEDs. The MAX6959 also includes two input ports, one
or both of which may be configured as a key-switch
reader, which automatically scans and debounces a
matrix of up to eight switches. Key-switch status is
obtained by polling internal status registers or by con-
figuring the MAX6959 interrupt output.
Other on-chip features include a hexadecimal font for
seven-segment displays, multiplex scan circuitry,
anode and cathode drivers, and static RAM that stores
each digit. The peak segment current for the display
digits is set internally to 23mA. Display intensity is
adjusted using a 64-step internal digital brightness con-
trol. The MAX6958/MAX6959 include a low-power shut-
down mode, a scan-limit register that allows the user to
display from one to four digits, and a test mode, which
forces all LEDs on. The LED drivers are slew-rate-limit-
ed to reduce EMI.
The MAX6958/MAX6959 are available in 16-pin PDIP
and QSOP packages and are fully specified over the
-40°C to +125°C automotive temperature range.
Applications
Features400kbps 2-Wire Serial Interface3V to 5.5V OperationDrive 4 Digits plus 4 or 8 Discrete LEDsDrive Common-Cathode LED Digits23mA Constant-Current LED Segment DriveHexadecimal Decode/No-Decode Digit Selection 64-Step Digital Brightness ControlSlew-Rate-Limited Segment Drivers Reduced EMIDebounces Up to Eight Switches with n-Key
Rollover (MAX6959 Only)IRQ Output When a Key Input Is Debounced
(MAX6959 Only)20µA Low-Power Shutdown (Data Retained)Automotive Temperature Range (-40°C to +125°C)Compact 16-Pin PDIP and QSOP PackagesMAX6958/MAX6959
2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
Ordering Information19-2634; Rev 1; 11/05
Ordering Information continued at end of data sheet.
PARTTEMP
RANGE
SLAVE
ADDRESS
PIN-
PACKAGE
PKG
CODE
MAX6958AAEE-40°C to
+125°C011100016 QS OP E 16- 1
MAX6958AAPE-40°C to
+125°C011100016 DIPP16-1
DIG0–DIG3
SEG0–SEG8SDA
SCL
IRQ/SEG9
INPUT1
SDA
SCL
IRQ
INPUT2GND888
Key0
DIG0/SEG0
Key1DIG1/SEG1
Key2
DIG2/SEG2
Key3
DIG3/SEG3
Key4DIG4/SEG4
Key5
DIG5/SEG5
Key6DIG6/SEG6
Key7
DIG7/SEG7
MAX6959
Typical Operating CircuitSMBus is a trademark of Intel Corp.
Set-Top Boxes
Panel Meters
White Goods
Audio/Video Equipment
Vending Machines
Industrial Controls
Pin Configuration, Functional Diagram, and Typical
Application Circuit appear at end of data sheet.
MAX6958/MAX6959
2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS(V+ = 3V to 5.5V, TA= TMINto TMAX, unless otherwise noted. Typical values are at V+ = 5V, TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(Voltage with respect to GND.)
V+, SCL, SDA.......................................................-0.3V to +6V
All Other Pins............................................-0.3V to (V+ + 0.3V)
Current
DIG0/SEG0–DIG3/SEG3 Sink Current..........................275mA
DIG0/SEG0–SEG9 Source Current.................................30mA
SCL, SDA, INPUT1, INPUT2...........................................20mA
Continuous Power Dissipation (TA= +70°C)
16-Pin QSOP (derate at 8.34mW/°C above +70°C).....667mW
16-Pin DIP (derate at 10.5mW/°C above +70°C).........842mW
Operating Temperature Range
MAX695_ (TMIN to TMAX)...............................-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSOperating Supply VoltageV+35.5V
TA = +25°C2050Shutdown Supply CurrentISHDNShutdown mode, all
digital inputs at V+TA = TMIN to +85°C125µA
TA = +25°C5.96.7
Operating Supply CurrentI+
Intensity set to full,
no display load
connected, INPUT1
and INPUT2 open
circuit
TA = TMIN to TMAX7.5mA
Display Scan RatefSCAN4 digits scannedTA = TMIN to TMAX5107801050Hz
Keyscan Debounce TimetDEBOUNCETA = TMIN to TMAX30.34163ms
TA = +25°C-19-23-29VLED = 2.4V,
V+ = 4.5V to 5.5VTA = TMIN to TMAX-18-30
TA = +25°C-16-29.5Segment Drive Source CurrentISEG
VLED = 2V,
V+ = 3V to 5.5VTA = TMIN to TMAX-15.5-30.5
Segment Current Slew Rate ∆ISEG/∆t11mA/µs
Segment Drive Current Matching ∆ISEG4%
LOGIC INPUTS AND OUTPUTSInput Leakage Current SCL
and SDAIIH, IIL-1+1µA
Logic High Input Voltage SCL,
SDAVIH2.1V
Logic Low Input Voltage SCL,
SDAVIL0.8V
Input Leakage Current INPUT1,
INPUT2IINH, IINLINPUT_ = V+-1+1µA
Logic High Input Voltage INPUT1,
INPUT2VINH0.7 ✕V
Logic Low Input Voltage INPUT1,
INPUT2VINL0.3 ✕V
MAX6958/MAX6959
2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
Note 1:All parameters tested at TA=+25°C. Specifications over temperature are guaranteed by design.
Note 2:Guaranteed by design.
Note 3:A master device must provide a hold time of at least 300ns for the SDA signal (referred to VILof the SCL signal) in order to
bridge the undefined region of SCL’s falling edge.
Note 4:CB= total capacitance of one bus line in pF. tRand tFmeasured between 0.3V+ and 0.7V+.
Note 5:ISINK≤6mA. CB= total capacitance of one bus line in pF. tRand tFmeasured between 0.3V+ and 0.7V+.
Note 6:Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
DC ELECTRICAL CHARACTERISTICS (continued)(V+ = 3V to 5.5V, TA= TMINto TMAX, unless otherwise noted. Typical values are at V+ = 5V, TA= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSPullup to V+ INPUT1, INPUT2IPULLUP26.5µA
ISINK = 6mA, TA = -40°C to +85°C0.4IRQ/SEG9, SDA Output Low
VoltageVOLBKISINK = 4mA, TA = TMIN to TMAX0.4V
SDA Output Low VoltageVOL(SDA)ISINK = 6mA0.4V
TIMING CHARACTERISTICS(V+ = 3V to 5.5V, TA= TMINto TMAX, Figure 1, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSSerial Clock FrequencyfSCL400kHz
Bus Free Time Between a STOP
and a START ConditiontBUF1.3µs
Hold Time (Repeated) START
ConditiontHD, STA0.6µs
Repeated START Setup TimetSU, STA0.6µs
STOP Condition Setup TimetSU, STO0.6µs
Data Hold TimetHD, DAT(Note 3)0.9µs
Data Setup TimetSU, DAT100ns
SCL Clock Low PeriodtLOW1.3µs
SCL Clock High PeriodtHIGH0.6µs
Rise Time of Both SDA and SCL
Signals, ReceivingtR(Notes 2, 4)20 +
0.1CB300ns
Fall Time of Both SDA and SCL
Signals, ReceivingtF(Notes 2, 4)20 +
0.1CB300ns
Fall Time of SDA TransmittingtF(Notes 2, 5)20 +
0.1CB250ns
Pulse Width of Spike SuppressedtSP(Note 6)50ns
Capacitive Load for Each Bus
LineCB400pF
MAX6958/MAX6959
2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
Typical Operating Characteristics(V+ = 5V, LED forward voltage = 2.4V, TA= +25°C, unless otherwise noted.)
SCAN RATE (fSCAN)
vs. TEMPERATUREMAX6958/59 toc01
TEMPERATURE (°C)
SCAN RATE (Hz)
5.5V
4.5V
KEYSCAN DEBOUNCE TIME (tDEBOUNCE)
vs. TEMPERATUREMAX6958/59 toc02
TEMPERATURE (°C)
KEYSCAN DEBOUNCE TIME (ms)
4.5V
5.5V
SCAN RATE (fSCAN)
vs. SUPPLY VOLTAGEMAX6958/59 toc03
SUPPLY VOLTAGE (V)
SCAN RATE (Hz)
KEYSCAN DEBOUNCE TIME (tDEBOUNCE)
vs. SUPPLY VOLTAGE
MAX6958/59 toc04
SUPPLY VOLTAGE (V)
KEYSCAN DEBOUNCE TIME (ms)
SEGMENT SOURCE CURRENT
vs. SUPPLY VOLTAGE
MAX6958/59 toc05
SUPPLY VOLTAGE (V)
SEGMENT SOURCE CURRENT (mA)
VLED = 2.4V
SEGMENT SOURCE CURRENT
vs. SUPPLY VOLTAGEMAX6958/59 toc06
SUPPLY VOLTAGE (V)
SEGMENT SOURCE CURRENT (mA)
VLED = 2V
WAVEFORM AT DIG0/SEG0,
FULL INTENSITYMAX6958/59 toc07
VDIG0/
SEG0
1V/div
200μs/div
INPUT PULLUP CURRENT
vs. TEMPERATUREMAX6958/59 toc08
TEMPERATURE (°C)
INPUT PULLUP CURRENT (
5.5V
4.5V
Detailed DescriptionThe MAX6958/MAX6959 serially interfaced display dri-
vers drive up to: four 7-segment digits plus four dis-
crete LEDs if the decimal points are used, or four
7-segment digits plus eight discrete LEDs if the deci-
mal points are not used, or 36 discrete LEDs. Table 1
lists the display connection scheme.
The MAX6958/MAX6959 include the hexadecimal font
map for seven-segment displays. The seven-segment
LED digits can be controlled directly or programmed to
use the hexadecimal font. Direct segment control
allows the MAX6958/MAX6959 to drive bar graphs and
discrete LED indicators.
The MAX6958/MAX6959 use a multiplexing scheme that
minimizes the connections between the driver and LED
display. The MAX6958/MAX6959 can drive monocolor
and bicolor single-digit type displays, and monocolor
dual-digit displays. Dual-digit displays internally
wire together the equivalent segments for each digit,
requiring only eight segment pins instead of 16. The
MAX6958/MAX6959 can also drive multidigit LED dis-
plays that have the segments individually pinned for
each digit.
To connect four single-digit displays to the MAX6958/
MAX6959, connect cathode outputs DIG0/SEG0–
DIG3/SEG3 to the cathodes of the four display digits as
shown in Table 1 (CC0–CC3). Drive eight additional
LEDs with SEG0 to SEG7. Four of the eight LEDs can
be the decimal point (DP) segments of the four dis-
plays, and the other four can be discrete LED indica-
tors.
To connect two dual-digit displays to the MAX6958/
MAX6959, connect cathode outputs DIG0/SEG0 and
DIG1/SEG1 to the cathodes of the first dual digit.
Connect DIG2/SEG2 and DIG3/SEG3 to the cathodes
of the second dual digit. SEG0 to SEG3 can only drive
discrete LEDs, not digit DP segments. SEG4 to SEG7
can drive the DP segments if required. Bicolor single-
digit displays are connected and treated as dual-digit
displays, each digit being one of the two colors.
MAX6958/MAX6959
2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
Pin Description
PIN
MAX6958MAX6959NAMEFUNCTIONSDASerial Data I/OSCLSerial Clock InputSEG9Segment Output. Segment driver sourcing current to a display anode.IRQ/SEG9Interrupt or Segment Output. May be segment driver sourcing current to a display
anode, or open-drain interrupt output, or open-drain logic output.
4–7, 11–154–7, 11–15DIGX, SEGX
Digit and Segment Drivers. Digit X outputs sink current from the display common
cathode when acting as digit drivers. Segment X drivers source current to the display
anodes. Segment/digit drivers are high impedance when turned off.GNDGround
9, 10—N.C.No Connect. Connect to V+ or leave open.INPUT1General-Purpose Input Port 1 with Internal Pullup. May be configured as general-
purpose logic input or keyscan input. Connect to V+ or leave open if unused.
—10INPUT2General-Purpose Input Port 2 with Internal Pullup. May be configured as general-
purpose logic input or keyscan input. Connect to V+ or leave open if unused.16V+Positive Supply Voltage
DIG0/SEG0DIG1/SEG1DIG2/SEG2DIG3/SEG3SEG 4SEG 5SEG 6SEG 7SEG 8SEG 9/IRQ
LED Digit 0CC0SEG 0SEG gSEG fSEG eSEG dSEG cSEG bSEG aSEG 4
LED Digit 1SEG 1
CC1SEG gSEG fSEG eSEG dSEG cSEG bSEG aSEG 5
LED Digit 2SEG gSEG f
CC2SEG 2SEG eSEG dSEG cSEG bSEG aSEG 6
LED Digit 3SEG gSEG fSEG 3
CC3SEG eSEG dSEG cSEG bSEG aSEG 7
Table 1. Standard Driver Connection to LED Displays
MAX6958/MAX6959
Differences Between MAX6958
and MAX6959The MAX6958/MAX6959 have the same LED drive
capability, four common-cathode digits of nine seg-
ments per digit. The MAX6959 additionally contains two
logic input ports, INPUT1 and INPUT2. Each input port
can be individually configured as either a general-pur-
pose input port that is read through the serial interface,
or as a keyscan input. In keyscan mode, the input is
used to read and automatically debounce four key
switches. A maximum of eight key switches can be
read if both INPUT1 and INPUT2 are assigned to
keyscanning.
The MAX6958's SEG9 output is preconfigured as the
9th LED segment output. The IRQ/SEG9 output on the
MAX6959 can be configured as either an open-drain
logic output or the 9th segment output. This logic out-
put serves as either a general-purpose logic output, set
through the serial interface, or an interrupt (IRQ) output
that alerts a microcontroller of debounced key-switch
events. Key-switch status can also be obtained by
polling the internal status registers at any time.
Use the Option bit in the configuration register to detect
whether a MAX6958 or MAX6959 is present. The option
bit allows host software to establish whether a high-end
front panel (using the MAX6959 for keyscan support) or
a low-end panel (using a MAX6958 and no key switch-
es) is fitted to a product.
Serial Interface
Serial AddressingThe MAX6958/MAX6959 operate as a slave that sends
and receives data through a 2-wire interface. The inter-
face uses a serial data line (SDA) and a serial clock line
(SCL) to achieve bidirectional communication between
master(s) and slave(s). A master, typically a microcon-
troller, initiates all data transfers to and from the
MAX6958/MAX6959, and generates the SCL clock that
synchronizes the data transfer (Figure 1).
The MAX6958/MAX6959 SDA line operates as both an
input and an open-drain output. A pullup resistor, typi-
cally 4.7kΩ, is required on the SDA bus. The MAX6958/
MAX6959 SCL line operates only as an input. A pullup
resistor, typically 4.7kΩ, is required on the SCL bus if
there are multiple masters on the 2-wire interface, or if
the master in a single-master system has an open-drain
SCL output.
Each transmission consists of a START condition
(Figure 2) sent by a master, followed by the MAX6958/
MAX6959 7-bit slave address plus R/Wbit (Figure 3), 1
or more data bytes, and finally a STOP condition
(Figure 2).
Start and Stop ConditionsBoth SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning the SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure 2).
2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with KeyscantLOW
SDA
tLOW
tSU, DATtHD, DAT
SCL
START
CONDITION
STOP
CONDITION
START
CONDITION
REPEATED START
CONDITION
tHIGH
tHD, STA
tSU, STA
tHD, STAtSU, STO
tBUF
Figure 1. 2-Wire Serial Interface Timing Details
SDA
START
CONDITION
SCL
STOP
CONDITION
Figure 2. Start and Stop Conditions
Bit TransferOne data bit is transferred during each clock pulse.
The data on the SDA line must remain stable while SCL
is high (Figure 4).
AcknowledgeThe acknowledge bit is a clocked 9th bit that the recipi-
ent uses to handshake receipt of each byte of data
(Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse, such that the SDA line is sta-
ble low during the high period of the clock pulse. When
the master is transmitting to the MAX6958/MAX6959,
the MAX6958/MAX6959 generate the acknowledge bit
because the MAX6958/MAX6959 are the recipients.
When the MAX6958/MAX6959 are transmitting to the
master, the master generates the acknowledge bit
because the master is the recipient.
Slave AddressThe MAX6958/MAX6959 have a 7-bit-long slave
address (Figure 3). The eighth bit following the 7-bit
slave address is the R/Wbit. Set the R/Wbit low for a
write command and high for a read command.
The MAX6958/MAX6959 are available in one of two
possible slave addresses (see Table 2 and Ordering
Information). The first 6 bits (MSBs) of the MAX6958/
MAX6959 slave address are always 011100. Slave
address bit A0 is internally hardwired to either GND in
the MAX695_A_, or V+ in the MAX695_B_. A maximum
of two MAX6958/MAX6959 devices can share a bus.
Message Format for WritingA write to the MAX6958/MAX6959 comprises the trans-
mission of the MAX6958/MAX6959s’ slave address with
the R/Wbit set to zero, followed by at least 1 byte of
information. The first byte of information is the com-
mand byte, which determines the register that stores
the next byte written to the MAX6958/MAX6959. If a
STOP condition is detected after the command byte is
received, the MAX6958/MAX6959 take no further action
(Figure 6) beyond storing the command byte.
MAX6958/MAX6959
2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with KeyscanSDA
SCLA0
MSBLSB
R/WACK1100
Figure 3. Slave Address
SDA
DATA STABLE,
DATA VALID
CHANGE OF
DATA ALLOWED
SCL
Figure 4. Bit TransferSCL
START
CONDITION
SDA9
CLOCK PULSE FOR
ACKNOWLEDGMENT
ACKNOWLEDGE
NOT ACKNOWLEDGE
Figure 5. Acknowledge
MAX6958/MAX6959 DEVICE ADDRESSSLAVE ADDRESS
BIT A0A6A5A4A3A2A1A0MAX695_A_0111000
MAX695_B_0111001
Table 2. MAX6958/MAX6959 Address MapA0SLAVE ADDRESSCOMMAND BYTE
ACKNOWLEDGE FROM
MAX6958/MAX6959
R/WACKNOWLEDGE FROM
MAX6958/MAX6959
D15D14D13D12D11D10D9D8COMMAND BYTE IS STORED ON RECEIPT OF STOP CONDITION
Figure 6. Command Byte Received
MAX6958/MAX6959Bytes received after the command byte are data bytes.
The first data byte goes into the internal register of the
MAX6958/MAX6959 as selected by the command byte
(Figure 7).
The address pointer in the MAX6958/MAX6959 autoin-
crements after each data byte. If multiple data bytes
are transmitted before a STOP condition is detected,
these bytes are stored in subsequent MAX6958/
MAX6959 internal registers (Figure 8), unless the
address pointer has reached address 01111111. The
address pointer does not autoincrement once address
01111111 has been reached (Table 3).
Message Format for ReadingThe MAX6958/MAX6959 are read using the internally
stored command byte as an address pointer the same
way the stored command byte is used as an address
pointer for a write. The pointer autoincrements after
each data byte read using the same rules as for a write
(Table 3). A read is initiated by first configuring the
MAX6958/MAX6959s’ command byte with a write com-
mand (Figure 6). The master can now read n consecu-
tive bytes from the MAX6958/MAX6959. The master
acknowledges receipt of each read byte during the
acknowledge clock pulse. The master must acknowl-
edge all consecutive bytes received except the last
byte. The final read byte must be followed by a not
acknowledge from the master and then a stop condi-
tion (Figure 9). The first data byte is read from the reg-
ister addressed by the initialized command byte
(Figure 8). Reset the address pointer when performing
read-after-write verification because the stored byte
address is autoincremented after the write. The
address pointer does not autoincrement if it points to
register 01111111 (Table 3).
Table 4 is the register address map.
2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan0SLAVE ADDRESSCOMMAND BYTEDATA BYTE
ACKNOWLEDGE FROM
MAX6958/MAX6959
R/W1 BYTE
AUTOINCREMENT MEMORY WORD ADDRESS
ACKNOWLEDGE FROM MAX6958/MAX6959ACKNOWLEDGE FROM MAX6958/MAX6959
D15D14D13D12D11D10D9D8D1D0D3D2D5D4D7D6HOW CONTROL BYTE AND DATA BYTE MAP INTO
MAX6958/MAX6959s' REGISTERSAAP
Figure 7. Command and Single Data Byte Received0SLAVE ADDRESSCOMMAND BYTEDATA BYTE
ACKNOWLEDGE FROM
MAX6958/MAX6959
R/Wn BYTES
AUTOINCREMENT MEMORY WORD ADDRESS
ACKNOWLEDGE FROM MAX6958/MAX6959ACKNOWLEDGE FROM MAX6958/MAX6959
D15D14D13D12D11D10D9D8D1D0D3D2D5D4D7D6HOW CONTROL BYTE AND DATA BYTE MAP INTO
MAX6958/MAX6959s' REGISTERSAAP
Figure 8. n Data Bytes ReceivedSLAVE ADDRESSFIRST DATA BYTEDATA BYTE
ACKNOWLEDGE FROM MAX6958/MAX6959
R/Wn BYTES
AUTOINCREMENT MEMORY WORD ADDRESS
ACKNOWLEDGE FROM THE MASTERNOT ACKNOWLEDGE FROM MASTER
D15D14D13D12D11D10D9D8D1D0D3D2D5D4D7D6HOW THE MAX6958/MAX6959 SENDS DATA
TO THE MASTERAAP
AUTOINCREMENT MEMORY WORD ADDRESS
Figure 9. Reading n Data Bytes from the MAX6958/MAX6959
Operation with Multiple MastersIf the MAX6958/MAX6959 are operated on a 2-wire
interface with multiple masters, a master reading the
MAX6958/MAX6959 should use a repeated start
between the write, which sets the MAX6958/MAX6959s’
address pointer, and the read(s) that takes the data
from the location(s) set by the address pointer. It is
possible for master 2 to take over the bus after master
1 has set up the MAX6958/MAX6959s’ address pointer
but before master 1 has read the data. If master 2 sub-
sequently changes the MAX6958/MAX6959s’ address
pointer, then master 1's delayed read may be from an
unexpected location.
Command Address AutoincrementingAddress autoincrementing allows the MAX6958/
MAX6959 to be configured with the shortest number of
transmissions by minimizing the number of times the
command byte needs to be sent. The address pointer
stored in the MAX6958/MAX6959 increments after each
data byte is written or read, unless the address equals
01111111 (Table 3).
Digit Type RegistersThe MAX6958/MAX6959 store display data in five regis-
ters. The four digit registers each control the seven
numeric segments of a seven-segment digit, but not
the DP segments. The segments register controls eight
individual LEDs, which can be any mix of discrete LEDs
and any or all of the DP segments of the four 7-seg-
ment digits (Table 5) (Figure 10).
MAX6958/MAX6959
2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
COMMAND BYTE
ADDRESS RANGEAUTOINCREMENT BEHAVIOR00000000 to
Command byte address autoincrements
after byte read or written
01111111Command byte address remains at
01111111 after byte written or read
Table 3. Command Address
Autoincrement Behavior
COMMAND ADDRESSREGISTER
D15D14D13D12D11D10D9D8
HEX
CODENo-op000000000x00
Decode mode000000010x01
Intensity000000100x02
Scan limit000000110x03
Configuration000001000x04
Factory reserved. Do not write to this register.000001010x05
GPIO (MAX6959 only)000001100x06
Display test000001110x07
Read key debounced (MAX6959 only)
A write to this register is ignored.000010000x08
Read key pressed (MAX6959 only)
A write to this register is ignored.000011000x0C
Digit 0001000000x20
Digit 1001000010x21
Digit 2001000100x22
Digit 3001000110x23
Segments001001000x24
Table 4. Register Address MapFigure 10. Segment Labeling for 7-Segment Display
MAX6958/MAX6959The digit registers and segments register use 1 bit to
set the state of one segment. Each bit is high to turn a
segment on, or low to turn it off (Table 6).
Decode-Mode RegisterThe decode-mode register sets hexadecimal code
(0–9, A–F) or no-decode operation for each digit. Each
bit in the register corresponds to one digit. Logic high
selects hexadecimal decoding while logic low bypass-
es the decoder. Digits can be set for decode or no
decode in any combination. Bit assignment and exam-
ples of the decode mode control register format are
shown in Table 7.
In hexadecimal code-decode mode, the decoder looks
only at the lower nibble of the data in the digit register
(D3–D0), disregarding bits D7–D4. Table 7 lists the hexa-
decimal code font. When no decode is selected, data
bits D7–D0 correspond to the segment lines of the
MAX6958/MAX6959. Table 8 shows the one-to-one pair-
ing of each data bit to the appropriate segment line.
Initial Power-UpOn initial power-up, all control registers are reset, the
display is blanked, and the MAX6958/MAX6959 enter
shutdown mode (Table 9). At power-up, the MAX6958/
MAX6959 are initially set to scan four digits, do not
decode data in the digit registers or scan key switches
(MAX6959 only), and the intensity register is set to a
low value (4/64 intensity).
2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
REGISTER DATADIGIT/SEGMENT REGISTERADDRESS
CODE (HEX)D7D6D5D4D3D2D1D0Digit 00x20XSEG aSEG bSEG cSEG dSEG eSEG fSEG g
Digit 10x21XSEG aSEG bSEG cSEG dSEG eSEG fSEG g
Digit 20x22XSEG aSEG bSEG cSEG dSEG eSEG fSEG g
Digit 30x23XSEG aSEG bSEG cSEG dSEG eSEG fSEG g
Segments0x24SEG 7SEG 6SEG 5SEG 4SEG 3SEG 2SEG 1SEG 0
Table 5. No-Decode Mode Data Bits and Corresponding Segment Lines
REGISTER BITSEGMENT BEHAVIORSegment offSegment on
Table 6. No-Decode Mode Data Bits and
Corresponding Segment Lines
REGISTER DATADECODE MODEADDRESS
CODE (HEX)D7D6D5D4D3D2D1D0
HEX
CODE
Bit assignment for each digit0x01XXXX
Digit 3Digit 2Digit 1Digit 0—
No decode for digits 3–00x01XXXX00000xX0
Hexadecimal decode for digit
0; no decode for digits 3–10x01XXXX00010xX1—————————
Hexadecimal decode for digits
2–0; no decode for digit 30x01XXXX01110xX7
Hexadecimal decode for digit
3; no decode for digits 2–00x01XXXX10000xX8—————————
Hexadecimal decode for digits
3–00x01XXXX11110xXF
Table 7. Decode-Mode Register Examples
