MAX6953EPL+ ,2-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 x 7 Matrix LED Display DriverApplicationsOrdering InformationMessage BoardsPART TEMP RANGE PIN-PACKAGEMedical EquipmentMAX6953EA ..
MAX6954AAX ,4-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key ScanFeaturesThe MAX6954 is a compact display driver that inter-
MAX6953EPL+
2-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 x 7 Matrix LED Display Driver
neral DescriptionThe MAX6953 is a compact cathode-row display driver
that interfaces microprocessors to 5 ✕7 dot-matrix LED
displays through an I2C™-compatible serial interface.
The MAX6953 drives up to four digits (140 LEDs).
Included on-chip are an ASCII 104-character font, mul-
tiplex scan circuitry, column and row drivers, and static
RAM that stores each digit, as well as font data for 24
user-definable characters. The segment current for the
LEDs is set by an internal digit-by-digit digital bright-
ness control.
The device includes a low-power shutdown mode, seg-
ment blinking (synchronized across multiple drivers, if
desired), and a test mode that forces all LEDs on. The
LED drivers are slew-rate limited to reduce EMI.
For an SPI™-compatible version, refer to the MAX6952
data sheet. An EV kit is available for the MAX6952.
ApplicationsMessage Boards
Medical Equipment
Industrial Displays
Audio/Video Equipment
Gaming Machines
ature400kbps 2-Wire Interface Compatible with I2C2.7V to 5.5V OperationDrives 4 Monocolor or 2 Bicolor Cathode-Row
5 ✕7 Matrix DisplaysBuilt-In ASCII 104-Character Font 24 User-Definable Characters AvailableAutomatic Blinking Control for Each Segment70μA Low-Power Shutdown (Data Retained)16-Step Digital Brightness ControlDisplay Blanked on Power-UpSlew-Rate-Limited Segment Drivers for Lower EMI36-Pin SSOP and 40-Pin DIP PackagesExtended Temperature Range as Standard-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 ✕
atrix LED Display Drive
Ordering InformationDIGIT 1
DIGIT 0
O14
O15
O16
O17
O18
O19
O20
O21
O22
O23
O10
O11
O12
O13
O14
O15
O16
O17
O18
DIGIT 3
O10
O11
O12
O13
O19
O20
O21
O22
O23
DIGIT 2
3.3V
100nF47μF
O10
O11
O12
O13
O14
O15
O16
O17
O18
O19
O20
O21
O22
O23
ISET
OSC
GND
GND
BLINK
GND
SDA
SCL
AD1
26pF
CSET
53.6kΩ
RSET
MAX6953
AD0
3.3V
4.7kΩ4.7kΩ4.7kΩ
Typical Application Circuit19-2312; Rev 3; 3/04
PARTTEMP RANGEPIN-PACKAGEMAX6953EAX-40°C to +85°C36 SSOP
MAX6953EPL-40°C to +85°C40 PDIP2C is a trademark of Philips Corp.
SPI is a trademark of Motorola, Inc.
Pin Configurations appear at end of data sheet.
-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 ✕7atrix LED Display DriverABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS(Typical operating circuit, V+ = 3.0V to 5.5V, TA= TMINto TMAX, unless otherwise noted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage (with Respect to GND) .............................................................................-0.3V to +6V
All Other Pins................................................-0.3V to (V+ + 0.3V)
O0–O13 Sink Current.......................................................500mA
O14–O23 Source Current..................................................50mA
Continuous Power Dissipation (TA= +70°C)
36-Pin SSOP (derate 11.8mW/°C above +70°C).....941.2mW
40-Pin PDIP (derate 16.7mW/°C above +70°C)........1333mW
Operating Temperature Range
MAX6953E......................................................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSOperating Supply VoltageV+2.75.5V
TA = TMIN to TMAX130
Shutdown Supply CurrentISHDN
Shutdown mode, all
digital inputs at V+
or GNDTA = +25°C70100
Operating Supply CurrentI+
All segments on, intensity set to full,
internal oscillator, no display load
connected, BLINK open circuit15mA
Master Clock Frequency
(OSC Internal Oscillator)fOSCOSC = RC oscillator, RSET = 53.6kΩ,
CSET = 26pF4MHz
Master Clock Frequency
(OSC External Clock)fOSCOSC overdriven externally18MHz
Dead Clock Protection
FrequencyfOSC90kHz
OSC Internal/External Detection
ThresholdVOSC1.7V
OSC High TimetCH50ns
OSC Low TimetCL50ns
Slow Segment Blink Period
(OSC Internal Oscillator)fSLOWBLINKOSC = RC oscillator, RSET = 53.6kΩ,
CSET = 26pF1s
Fast Segment Blink Period
(OSC Internal Oscillator)fFASTBLINKOSC = RC oscillator, RSET = 53.6kΩ,
CSET = 26pF0.5s
Fast or Slow Segment Blink
Duty Cycle (Note 2)49.550.5%
Column Drive Source CurrentICOLUMNVLED = 2.4V, V+ = 3.0V, TA = +25oC-32-58mA
-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 ✕atrix LED Display DriveDC ELECTRICAL CHARACTERISTICS (continued)(Typical operating circuit, V+ = 3.0V to 5.5V, TA= TMINto TMAX, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSSegment Current Slew RateΔISEG/ΔtTA = +25oC12.5mA/μs
Segment Drive Current
Matching (Within IC)
ΔISEGTA = +25°C4%
LOGIC INPUTSInput High Voltage
SDA, SCL, AD0, AD1VIH0.7 xV
Input Low Voltage
SDA, SCL, AD0, AD1VIL0.3 ✕V
Input Hysteresis
SDA, SCL, AD0, AD1VHYST0.05 ✕V
Input Leakage CurrentIIL, IIH-22μA
Input CapacitanceCI10pF
DIGITAL OUTPUTSDA Output Low VoltageVOLSDAISINK = 4mA0.4V
BLINK Output Low VoltageVOLBKISINK = 1.6mA0.4V
MAX6953 TIMING CHARACTERISTICS(V+ = 2.7V to 5.5V, TA= TMINto TMAX, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSSerial Clock FrequencyfSCL400kHz
Bus Free Time Between a STOP
and a START ConditiontBUF1.3μs
Hold Time (Repeated) START
ConditiontHD, STA0.6μs
Repeated START Condition
Setup TimetSU, STA0.6μs
STOP Condition Setup TimetSU, STO0.6μs
Data Hold TimetHD, DAT(Note 3)0.9μs
Data Setup TimetSU, DAT100ns
SCL Clock Low PeriodtLOW1.3μs
SCL Clock High PeriodtHIGH0.6μs
Rise Time of Both SDA and SCL
Signals, ReceivingtR(Notes 2, 4)20 +
0.1CB300ns
Fall Time of Both SDA and SCL
Signals, ReceivingtF(Notes 2, 4)20 +
0.1CB300ns
Typical Operating Characteristics(Typical application circuit, V+ = 3.3V, LED forward voltage = 2.4V, scan limit set to 4 digits, TA= +25°C, unless otherwise noted.)
-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 ✕7atrix LED Display Driver
MAX6953 TIMING CHARACTERISTICS (continued)(V+ = 2.7V to 5.5V, TA= TMINto TMAX, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSFall Time of SDA TransmittingtF(Notes 2, 5)20 +
0.1CB250ns
Pulse Width of Spike SuppressedtSP(Note 6)050ns
Capacitive Load for Each
Bus LineCB(Note 2)400pF
Note 1:All parameters tested at TA= +25°C. Specifications over temperature are guaranteed by design.
Note 2:Guaranteed by design.
Note 3:A master device must provide a hold time of at least 300ns for the SDA signal (referred to VILof the SCL signal) in order to
bridge the undefined region of SCL’s falling edge.
Note 4:CB= total capacitance of one bus line in pF. tRand tFmeasured between 0.3V+ and 0.7V+.
Note 5:ISINK≤6mA. CB= total capacitance of one bus line in pF. tRand tFmeasured between 0.3V+ and 0.7V+.
Note 6:Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
INTERNAL OSCILLATOR
FREQUENCY vs. TEMPERATURE
AX6953 toc01
TEMPERATURE (°C)
(M
V+ = 3.3V
V+ = 2.7V
V+ = 5V
INTERNAL OSCILLATOR FREQUENCY
vs. SUPPLY VOLTAGEAX6953 toc02
SUPPLY VOLTAGE (V)
(M
INTERNAL OSCILLATOR
WAVEFORM AT OSC (PIN 19 OR 21)
6953 toc03
TIMELINE (ns)
(V
-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 ✕atrix LED Display DriveDEAD CLOCK OSCILLATOR FREQUENCY
vs. SUPPLY VOLTAGE
X6953 toc04
SUPPLY VOLTAGE (V)
(k
OUTPUT SOURCE CURRENT
vs. SUPPLY VOLTAGE
AX6953 toc05
SUPPLY VOLTAGE (V)
WAVEFORMS AT O2 (PIN 3) AND O14
(PIN 28) V+ = 3.3V, 8/16 INTENSITYGROUND FOR
ANODE
(PIN 014)
6953 toc06
GROUND FOR
CATHODE
(PIN 03)200µs/div
Typical Operating Characteristics (continued)(Typical application circuit, V+ = 3.3V, LED forward voltage = 2.4V, scan limit set to 4 digits, TA= +25°C, unless otherwise noted.)
Pin Description
PIN
SSOPPDIPNAMEFUNCTION1, 2, 3, 6–14, 23, 241, 2, 3, 7–15, 26, 27O0 to O13LED Cathode Drivers. O0 to O13 outputs sink current from
the display’s cathode rows.
4, 5, 174, 5, 6, 19GNDGround17ISETSegment Current Setting. Connect ISET to GND through
series resistor RSET to set the peak current.18AD1
Address Input 1. Sets device slave address. Connect to
either GND, V+, SCL, SDA to give four logic combinations.
See Table 3.16, 25N.C.Not Connected20BLINKBlink Output. Output is open drain.21OSC
Multiplex Clock Input. To use internal oscillator, connect
capacitor CSET from OSC to GND. To use external clock,
drive OSC with a 1MHz to 8MHz CMOS clock.22AD0
Address Input 0. Sets device slave address. Connect to
either GND, V+, SCL, SDA to give four logic combinations.
See Table 3.23SDAI2C-Compatible Serial Data I/O24SCLI2C-Compatible Serial Clock Input
25–31, 34, 35, 3628–34, 38, 39, 40O14 to O23LED Anode Drivers. O14 to O23 outputs source current to
the display’s anode columns.
32, 3335, 36, 37V+Positive Supply Voltage. Bypass V+ to GND with a 47μF
bulk capacitor and a 0.1μF ceramic capacitor.
-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 ✕7atrix LED Display Driver DIGITO0–O6O7–O13O14–O18O19-–O23Digit 0 rows (cathodes) R1 to R7
Digit 1 rows (cathodes) R1 to R7—Digit 0 columns (anodes)
C1 to C5
Digit 1 columns
(anodes) C6 to C10—Digit 2 rows (cathodes) R1 to R7
Digit 3 rows (cathodes) R1 to R7
Digit 2 columns (anodes)
C1 to C5
Digit 3 columns
(anodes) C6 to C10
Table 1. Connection Scheme for Four Monocolor Digits
DIGITO0–O6O7–O13O14–023Digit 0 columns (anodes) C1 to C101Digit 0 rows (cathodes)
R1 to R14—- the 5 green anodes -- the 5 red anodes -
Digit 1 columns (anodes) C1 to C102—Digit 1 rows (cathodes)
R1 to R14- the 5 green columns -- the 5 red anodes -
Table 2. Connection Scheme for Two Bicolor Digitstailed DescriptionThe MAX6953 is a serially interfaced display driver that
can drive four digits of 5 ✕7 cathode-row dot-matrix dis-
plays. The MAX6953 can drive either four monocolor
digits (Table 1) or two bicolor digits (Table 2). The
MAX6953 includes a 128-character font map compris-
ing 104 predefined characters and 24 user-definable
characters. The predefined characters follow the Arial
font, with the addition of the following common symbols:
£, <, ¥, °, μ, ±, ↑, and ↓. The 24 user-definable charac-
ters are uploaded by the user into on-chip RAM through
the serial interface and are lost when the device is pow-
ered down. Figure 1 is the MAX6953 functional diagram.
Serial Interface
Serial AddressingThe MAX6953 operates as a slave that sends and
receives data through an I2C-compatible 2-wire inter-
face. The interface uses a serial data line (SDA) and a
serial clock line (SCL) to achieve bidirectional commu-
nication between master(s) and slave(s). A master (typ-
ically a microcontroller) initiates all data transfers to and
from the MAX6953, and generates the SCL clock that
synchronizes the data transfer (Figure 2).
The MAX6953 SDA line operates as both an input and
an open-drain output. A pullup resistor, typically 4.7kΩ,
is required on the SDA. The MAX6953 SCL line oper-
ates only as an input. A pullup resistor, typically 4.7kΩ,
is required on SCL if there are multiple masters on the
2-wire interface, or if the master in a single-master sys-
tem has an open-drain SCL output.
Each transmission consists of a START condition
(Figure 3) sent by a master, followed by the MAX6953
7-bit slave address plus R/Wbit (Figure 6), a register
address byte, 1 or more data bytes, and finally a STOP
condition (Figure 3).
Start and Stop ConditionsBoth SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning the SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure 3).
ISET
OSC
BLINK
SCL
SDA
AD0
AD1
SERIAL INTERFACE
RAM
BLINK
SPEED
SELECT
CONFIGURATION
REGISTERS
CHARACTER
GENERATOR
ROM
CHARACTER
GENERATOR
RAM
CURRENT
SOURCE
DIVIDER/
COUNTER
NETWORK
ROW
MULTIPLEXER
PWM
BRIGHTNESS
CONTROL
LED
DRIVERS
O0 TO O23
Figure 1. MAX6953 Functional Diagram
-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 ✕atrix LED Display DriveBit TransferOne data bit is transferred during each clock pulse.
The data on the SDA line must remain stable while SCL
is high (Figure 4).
AcknowledgeThe acknowledge bit is a clocked 9th bit that the recipi-
ent uses to handshake receipt of each byte of data
(Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse, such that the SDA line is sta-
ble low during the high period of the clock pulse. When
the master is transmitting to the MAX6953, the
MAX6953 generates the acknowledge bit because the
MAX6953 is the recipient. When the MAX6953 is trans-
mitting to the master, the master generates the
acknowledge bit because the master is the recipient.
Slave AddressThe MAX6953 has a 7-bit-long slave address (Figure
6). The eighth bit following the 7-bit slave address is
the R/Wbit. It is low for a write command, high for a
read command.
The first 3 bits (MSBs) of the MAX6953 slave address
are always 101. Slave address bits A3, A2, A1, and A0
are selected by the address input pins AD1 and AD0.
These two input pins may be connected to GND, V+,
SDA, or SCL. The MAX6953 has 16 possible slave
addresses (Table 3) and therefore a maximum of 16
MAX6953 devices may share the same interface.
Message Format for Writingwrite to the MAX6953 comprises the transmission of
the MAX6953's slave address with the R/Wbit set to
zero, followed by at least 1 byte of information. The first
byte of information is the command byte, which deter-
mines which register of the MAX6953 is to be written by
the next byte, if received. If a STOP condition is detect-
ed after the command byte is received, then the
MAX6953 takes no further action (Figure 7) beyond
storing the command byte.
Any bytes received after the command byte are data
bytes. The first data byte goes into the internal register of
the MAX6953 selected by the command byte (Figure 8).
If multiple data bytes are transmitted before a STOP
condition is detected, these bytes are generally stored
in subsequent MAX6953 internal registers because the
command byte address generally autoincrements
(Table 4) (Figure 9).
essage Format for Reading The MAX6953 is read using the MAX6953's internally
stored command byte as address pointer, the same
way the stored command byte is used as address
pointer for a write. The pointer generally autoincre-
ments after each data byte is read using the same rules
as for a write (Table 4). Thus, a read is initiated by first
configuring the MAX6953's command byte by perform-
ing a write (Figure 7). The master can now read n con-
secutive bytes from the MAX6953, with the first data
byte being read from the register addressed by the ini-
tialized command byte (Figure 9).When performing
STOP
CONDITION
START
CONDITION
tBUF
tSU, STOtHD, STA
REPEATED START
CONDITION
tSU, STA
tHD, DAT
tSU, DAT
tLOW
SDA
SCL
tHIGH
START
CONDITION
tHD, STAtF
Figure 2. 2-Wire Serial Interface Timing Details
-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 ✕7atrix LED Display DriverSDA
SCLSTARTMSB01A3A2A1A0R/W
LSB
ACK
Figure 6. Slave Address
SDA
SCL
START CONDITIONSTOP CONDITION
Figure 3. Start and Stop Conditions
DATA LINE STABLE,
DATA VALID
CHANGE OF DATA
ALLOWED
SDA
SCL
Figure 4. Bit Transfer
START CONDITIONSCL
SDA
BY TRANSMITTER
SDA
BY RECEIVER89
CLOCK PULSE FOR ACKNOWLEDGMENT
Figure 5. Acknowledge
-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 ✕atrix LED Display Driveread-after-write verification, reset the command byte's
address because the stored byte address generally is
autoincremented after the write (Table 4).
Operation with Multiple MastersIf the MAX6953 is operated on a 2-wire interface with
multiple masters, a master reading the MAX6953
should use a repeated start between the write, which
sets the MAX6953's address pointer, and the read(s)
that takes the data from the location(s). This is because
it is possible for master 2 to take over the bus after
master 1 has set up the MAX6953's address pointer but
before master 1 has read the data. If master 2 subse-
quently changes the MAX6953's address pointer, then
master 1's delayed read may be from an unexpected
location.
Command Address Autoincrementing Address autoincrementing allows the MAX6953 to be
configured with the shortest number of transmissions
by minimizing the number of times the command byte
needs to be sent. The command address or the font
pointer address stored in the MAX6953 generally incre-
ments after each data byte is written or read (Table 4).
Digit RegistersThe MAX6953 uses eight digit registers to store the char-
acters that the user wishes to display on the four 5 ✕7
LED digits. These digit registers are implemented with
two planes of 4 bytes, called P0 and P1. Each LED digit
is represented by 2 bytes of memory, 1 byte in plane P0
and the other in plane P1. The digit registers are mapped
so that a digit’s data can be updated in plane P0, or
plane P1, or both planes at the same time (Table 5).
If the blink function is disabled through the Blink Enable
Bit E (Table 10) in the configuration register, then the
digit register data in plane P0 is used to multiplex the
display. The digit register data in P1 is not used. If the
blink function is enabled, then the digit register data in
both plane P0 and plane P1 are alternately used to mul-
tiplex the display. Blinking is achieved by multiplexing
the LED display using data planes P0 and P1 on alter-
nate phases of the blink clock (Table 11).
The data in the digit registers does not control the digit
segments directly. Instead, the register data is used to
address a character generator, which stores the data of
a 128-character font (Table 15). The lower 7 bits of the
digit data (D6 to D0) select the character from the font.
The most-significant bit of the register data (D7) selects
whether the font data is used directly (D7 = 0) or
whether the font data is inverted (D7 = 1). The inversion
feature can be used to enhance the appearance of
bicolor displays by displaying, for example, a red char-
acter on a green background.
Display Blink ModeThe display blinking facility, when enabled, makes the
driver flip automatically between displaying the digit
register data in planes P0 and P1. If the digit register
data for any digit is different in the two planes, then thatAAP0SLAVE ADDRESSCOMMAND BYTE
ACKNOWLEDGE FROM MAX6953
R/WACKNOWLEDGE FROM MAX6953
D15D14D13D12D11D10D9D8COMMAND BYTE IS STORED ON RECEIPT OF STOP CONDITION
Figure 7. Command Byte ReceivedAAP0SLAVE ADDRESSCOMMAND BYTEDATA BYTE
ACKNOWLEDGE FROM MAX6953
R/W1 BYTE
AUTOINCREMENT MEMORY WORD ADDRESS
ACKNOWLEDGE FROM MAX6953ACKNOWLEDGE FROM MAX6953
D15D14D13D12D11D10D9D8D1D0D3D2D5D4D7D6HOW CONTROL BYTE AND DATA BYTE MAP INTO
MAX6953's REGISTERS
Figure 8. Command and Single Data Byte Received
-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 ✕7atrix LED Display DriverPIN DEVICE ADDRESS
AD1AD0A6A5A4A3A2A1A0GNDGND1010000
GNDV+1010001
GNDSDA1010010
GNDSCL1010011GND1010100V+1010101SDA1010110SCL1010111
SDAGND1011000
SDAV+1011001
SDASDA1011010
SDASCL1011011
SCLGND1011100
SCLV+1011101
SCLSDA1011110
SCLSCL1011111
Table 3. MAX6953 Address MapAAAP0SLAVE ADDRESSCOMMAND BYTEDATA BYTE
ACKNOWLEDGE FROM MAX6953
R/Wn BYTES
AUTOINCREMENT MEMORY WORD ADDRESS
ACKNOWLEDGE FROM MAX6953ACKNOWLEDGE FROM MAX6953
D15D14D13D12D11D10D9D8D1D0D3D2D5D4D7D6HOW COMMAND BYTE AND DATA BYTE MAP INTO
MAX6953'S REGISTERS
Figure 9. n Data Bytes Received
digit appears to flip between two characters. To make a
character appear to blink on or off, write the character
to one plane, and use the blank character (0x20) for the
other plane. Once blinking has been configured, it con-
tinues automatically without further intervention.
Blink SpeedThe blink speed is determined by frequency of the mul-
tiplex clock, OSC, and by setting the Blink Rate
Selection Bit B (Table 9) in the configuration register.
The Blink Rate Selection Bit B sets either fast or slow
blink speed for the whole display.
nitial Power-UpOn initial power-up, all control registers are reset, the
display is blanked, intensities are set to minimum, and
shutdown is enabled (Table 6).
Configuration RegisterThe configuration register is used to enter and exit shut-
down, select the blink rate, globally enable and disable
the blink function, globally clear the digit data, and
reset the blink timing (Table 7).
Shutdown Mode (S Data Bit D0) FormatThe S bit in the configuration register selects shutdown
or normal operation. The display driver can be pro-
grammed while in shutdown mode, and shutdown mode
is overridden when in the display test mode. For normal
operation, the S bit should be set to 1 (Table 8).
Blink Rate Selection (B Data Bit D2) FormatThe B bit in the configuration register selects the blink
rate. This is the speed that the segments alternate
between plane P0 and plane P1 refresh data. The blink
rate is determined by the frequency of the multiplex clock
OSC, in addition to the setting of the B bit (Table 9).
-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 ✕atrix LED Display DriveCOMMAND ADDRESSHEX
CODEREGISTER
D15D14D13D12D11D10D9D8—
No-OpX00000000x00
Intensity10X00000010x01
Intensity32X00000100x02
Scan LimitX00000110x03
ConfigurationX00001000x04
User-Defined FontsX00001010x05
Factory Reserved. Do not write to this.X00001100x06
Display TestX00001110x07
Digit 0 Plane P0X01000000x20
Digit 1 Plane P0X01000010x21
Digit 2 Plane P0X01000100x22
Digit 3 Plane P0X01000110x23
Digit 0 Plane P1X10000000x40
Digit 1 Plane P1X10000010x41
Digit 2 Plane P1X10000100x42
Digit 3 Plane P1X10000110x43
Write Digit 0 Planes P0 and P1 with Same Data
(Reads as 0x00)X11000000x60
Write Digit 1 Planes P0 and P1 with Same Data
(Reads as 0x00)X11000010x61
Write Digit 2 Planes P0 and P1 with Same Data
(Reads as 0x00)X11000100x62
Write Digit 3 Planes P0 and P1 with Same Data
(Reads as 0x00)X11000110x63
Table 5. Register Address Map
COMMAND BYTE
ADDRESS RANGEAUTOINCREMENT BEHAVIORx0000000 to x0000100Command byte address autoincrements after byte read or written.
x0000101Command byte address remains at x0000101 after byte read or written, but the font
address pointer autoincrements.
x0000110Factory reserved; do not write to this register.
x000111 to x1111110Command byte address autoincrements after byte read or written.
x1111111Command byte address remains at x1111111 after byte read or written.
Table 4. Command Address Autoincrement Rules
-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5 ✕7atrix LED Display DriverREGISTER DATAMODED7D6D5D4D3D2D1D0Slow blinking (segments are refreshed using plane P0 for 1s,
plane P1 for 1s, for OSC = 4MHz).PXRTE0XS
Fast blinking (segments are refreshed using plane P0 for 0.5s,
plane P1 for 0.5s, for OSC = 4MHz).PXRTE1XS
Table 9. Blink Rate Selection (B Data Bit D2) Format
REGISTER DATAD6D5D4D3D2D1D0Configuration RegisterPXRTEBXS
Table 7. Configuration Register Format
REGISTER DATAMODED7D6D5D4D3D2D1D0Shutdown ModePXRTEBX0
Normal OperationPXRTEBX1
Table 8. Shutdown Control (S Data Bit D0) Format
REGISTER DATAREGISTERPOWER-UP CONDITIONADDRESS
CODE (HEX)D6D5D4D3D2D1D0Intensity101/16 (min on)0x0100000000
Intensity321/16 (min on)0x0200000000
Scan LimitDisplay 4 digits: 0 1 2 30x03XXXXXXX1
Configuration
Shutdown enabled,
blink speed is slow,
blink disabled
0x040X0000X0
User-Defined Font
Address Pointer
Address 0x80; pointing to
the first user-defined font
location
0x0510000000
Display TestNormal operation0x07XXXXXXX0
Digit 0 Plane P0Blank digit (0x20)0x2000100000
Digit 1 Plane P0Blank digit (0x20)0x2100100000
Digit 2 Plane P0Blank digit (0x20)0x2200100000
Digit 3 Plane P0Blank digit (0x20)0x2300100000
Digit 0 Plane P1Blank digit (0x20)0x4000100000
Digit 1 Plane P1Blank digit (0x20)0x4100100000
Digit 2 Plane P1Blank digit (0x20)0x4200100000
Digit 3 Plane P1Blank digit (0x20)0x4300100000
Table 6. Initial Power-Up Register Status
