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MAX6902ETA-T
SPI-Compatible RTC in a TDFN
General DescriptionThe MAX6902 SPI™-compatible real-time clock con-
tains a real-time clock/calendar and 31 x 8 bits of static
random-access memory (SRAM). The real-time
clock/calendar provides seconds, minutes, hours, day,
date, month, year, and century information. A time/date
programmable polled ALARM is included in the
MAX6902. The end-of-the-month date is automatically
adjusted for months with fewer than 31 days, including
corrections for leap year up to the year 2100. The clock
operates in either the 24hr or 12hr format with an
AM/PM indicator. The MAX6902 operates with a supply
voltage of +2V to +5.5V, is available in the ultra-small
8-pin TDFN package, and works over the -40°C to
+85°C industrial temperature range.
ApplicationsPoint-of-Sale Equipment
Intelligent Instruments
Fax Machines
Battery-Powered Products
Portable Instruments
FeaturesReal-Time Clock Counts Seconds, Minutes, Hours,
Day of Week, Date of Month, Month, Year, and CenturyLeap-Year Compensation Valid up to Year 2100+2V to +5.5V Wide Operating Voltage RangeSPI Interface: 4MHz at 5V; 1MHz at 2V31 x 8-Bit SRAM for Scratchpad Data StorageUses Standard 32.768kHz, 12.5pF Watch CrystalLow Timekeeping Current (400nA at 2V)Single-Byte or Multiple-Byte (Burst Mode) Data
Transfer for Read or Write of Clock Registers or
SRAMUltra-Small 8-Pin 3mm x 3mm x 0.8mm TDFN
Package Programmable Time/Date Polled ALARM FunctionNo External Crystal Bias Resistors or Capacitors
Required
MAX6902
SPI-Compatible RTC in a TDFN
Pin Configuration
Ordering Information
Typical Operating Circuit19-2134; Rev 1; 7/03
I2C is a trademark of Philips Corp. Purchase of I2C components of Maxim Integrated Products, Inc., or one of its sublicensed
Associated Companies, conveys a license under the Philips I2C Patent rights to use these components in an I2C system provided that
the system conforms to the I2C Standard Specification as defined by Philips.
SPI is a trademark of Motorola, Inc.
Related Real-Time Clock Products
MAX6902
SPI-Compatible RTC in a TDFN
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND..............................................................-0.3V to +6V
All Other Pins to GND ................................-0.3V to (VCC+ 0.3V)
Current into Any Pin..........................................................±20mA
Rate of Rise, VCC............................................................100V/µs
Continuous Power Dissipation (TA= +70°C)
8-Pin TDFN (derate 24.4mW/°C above +70°C)..........1951.0mW
Junction Temperature .....................................................+150°C
Storage Temperature Range…………………… -65°C to +150°C
ESD Protection (all pins, Human Body Model)..................2000V
Lead Temperature (soldering, 10s).................................+300°C
MAX6902
SPI-Compatible RTC in a TDFN
AC ELECTRICAL CHARACTERISTICS(VCC= +2.0V to +5.5V, TA= -40°C to +85°C. Typical values are at VCC= +3.3V, TA= +25°C, unless otherwise noted.) (Figure 5,
Note 1:All parameters are 100% tested at TA= +25°C. Limits over temperature are guaranteed by design and characterization and
not production tested.
Note 2:ICCis specified with DOUT open, CS= DIN = GND, SCLK = 4MHz at VCC= +5V; SCLK = 1MHz at VCC= +2.0V.
Note 3:Timekeeping current is specified with CS= VCC, SCLK = DIN = GND, DOUT = 100kΩto GND.
Note 4:All values referred to VIHmin and VILmax levels.
MAX6902
Detailed DescriptionThe MAX6902 is a real-time clock/calendar with an SPI-
compatible interface and 31 x 8 bits of SRAM. It pro-
vides seconds, minutes, hours, day of the week, date of
the month, month, and year information, held in seven 8-
bit timekeeping registers (Functional Diagram). An on-
chip 32.768kHz oscillator circuit requires only a single
external crystal to operate. Table 1 specifies the para-
meters for the external crystal, and Figure 1 shows a
functional schematic of the oscillator circuit. The
MAX6902’s register addresses and definitions are
described in Figure 2 and in Table 2. Time and calendar
data are stored in the registers in binary-coded decimal
(BCD) format. A polled alarm function is included for
scheduled timing of user-defined times or intervals.
Table 1. Acceptable Quartz Crystal
SPI-Compatible RTC in a TDFN TIMEKEEPING CURRENT
vs. SUPPLY VOLTAGE
MAX6902 toc01
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
MAX6902
SPI-Compatible RTC in a TDFN
MAX6902
SPI-Compatible RTC in a TDFN
MAX6902
SPI-Compatible RTC in a TDFN
MAX6902
SPI-Compatible RTC in a TDFN
MAX6902
SPI-Compatible RTC in a TDFN
Command and Control
Address/Command ByteEach data transfer into or out of the MAX6902 is initiated
by an Address/Command byte. The Address/Command
byte specifies which registers are to be accessed, and
if the access is a read or a write. Figure 2 shows the
Address/Command bytes and their associated regis-
ters, and Table 2 lists the hex codes for all read and
write operations. The Address/Command bytes are
input MSB (bit 7) first. Bit 7 specifies a write (logic 0) or
read (logic 1). Bit 6 specifies register data (logic 0) or
RAM data (logic 1). Bits 5–1 specify the designated reg-
ister to be written or read. The LSB (bit 0) must be logic
1. If the LSB is a zero, writes to the MAX6902 are dis-
abled.
Clock Burst ModeSending the Clock Burst Address/Command (3Fh for
Write and BFh for Read), specifies burst-mode opera-
tion. In this mode, multiple bytes are read or written
after a single Address/Command. The first seven
clock/calendar registers (Seconds, Minutes, Hours,
Date, Month, Day, and Year) and the Control register
are consecutively read or written, starting with the MSB
of the Seconds register. When writing to the clock reg-
isters in burst mode, all seven clock/calendar registers
and the Control register must be written in order for the
data to be transferred. See Example: Setting the Clock
with a Burst Write.
RAM Burst ModeSending the RAM Burst Address/Command (F7h for
Write, FFh for Read) specifies burst-mode operation. In
this mode, the 31 RAM locations can be consecutively
read or written, starting at 41h for Writes, and C1h for
Reads. A Burst Read outputs all 31 bytes of RAM.
When writing to RAM in burst mode, it is not necessary
to write all 31 bytes for the data to transfer; each com-
plete byte written is transferred to RAM. When reading
from RAM, data are output until all 31 bytes have been
read, or until CSis driven high.
Setting the Clock
Writing to the Timekeeping RegistersThe time and date are set by writing to the timekeeping
registers (Seconds, Minutes, Hours, Date, Month, Day,
Year, and Century). During a write operation, an input
buffer accepts the new time data while the timekeeping
registers continue to increment normally, based on the
crystal counter. The buffer also keeps the timekeeping
registers from changing as the result of an incomplete
write operation, and collision-detection circuitry
ensures that a Time Write does not occur coincident
with a Seconds register increment. The updated time
data are loaded into the timekeeping registers after the
rising edge of CS, at the end of the SPI write operation.
An incomplete write operation aborts the update proce-
dure, and the contents of the input buffer are discard-
ed. The timekeeping registers reflect the new time
beginning with the first Seconds register increment
after the rising edge of CS.
Although both Single Writes and Burst Writes are possi-
ble, the best way to write to the timekeeping registers is
with a Burst Write. With a Burst Write, the main time-
keeping registers (Seconds, Minutes, Hours, Date,
Month, Day, Year) and the Control register are written
sequentially following the Address/Command byte.
They must be written as a group of eight registers, with
8 bits each, for proper execution of the Burst Write
function. All seven timekeeping registers are simultane-
ously loaded into the clock counters by the rising edge
of CS, at the end of the SPI write operation. For a nor-
mal burst data transfer, the worst-case error that can
occur between the actual time and the written time
update is 1s.
If single write operations are used to enter data into the
timekeeping registers, error checking is required. If not
writing to the Seconds register, begin by reading the
Seconds register and save it as initial-seconds. Then
write to the required timekeeping registers, and finally
read the Seconds register again (final-seconds). Check
to see that final-seconds is equal to initial-seconds. If
not, repeat the write process. If writing to the Seconds
register, update the Seconds register first, and then
read it back and store its value (initial-seconds).
Update the remaining timekeeping registers and then
read the Seconds register again (final-seconds). Check
to see that final-seconds is equal to initial-seconds. If
not, repeat the write process.
Note:After writing to any time or date register, no read
or write operations are allowed for 45µs.
AM/PM and 12Hr/24Hr ModeBit 7 of the Hours register selects 12hr or 24hr mode.
When high, 12hr mode is selected. In 12hr mode, bit 5 is
the AM/PM bit, logic high for PM. In 24hr mode, bit 5 is
the second 10hr bit, logic high for hours 20 through 23.
Write-Protect BitBit 7 of the Control register is the Write-Protect bit.
When high, the Write-Protect bit prevents write opera-
tions to all registers except itself. After initial settings
are written to the timekeeping registers, set the Write-
Protect bit to logic 1 to prevent erroneous data from
entering the registers during power glitches or inter-
rupted serial transfers. The lower 7 bits (bits 0–6) are
