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MAX6421US26-T |MAX6421US26TMAXN/a2483avai2.691 V, Low-power, SC70/SOT mP reset circuit with capacitor-adjustable reset timeout delay
MAX6421US29-T |MAX6421US29TMAXN/a1251avai2.998 V, Low-power, SC70/SOT mP reset circuit with capacitor-adjustable reset timeout delay
MAX6423XS16-T |MAX6423XS16TMAXIMN/a2321avai1.614 V, Low-power, SC70/SOT mP reset circuit with capacitor-adjustable reset timeout delay
MAX6423XS22-T |MAX6423XS22TMAXIMN/a19783avai2.243 V, Low-power, SC70/SOT mP reset circuit with capacitor-adjustable reset timeout delay
MAX6424UK29-T |MAX6424UK29TMAXN/a110avai2.998 V, Low-power, SC70/SOT mP reset circuit with capacitor-adjustable reset timeout delay


MAX6423XS22-T ,2.243 V, Low-power, SC70/SOT mP reset circuit with capacitor-adjustable reset timeout delayFeaturesThe MAX6340/MAX6421–MAX6426 low-power micro- Monitor System Voltages from 1.6V to 5Vproces ..
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MAX6424UK21-T ,Low-Power, SC70/SOT µP Reset Circuits with Capacitor-Adjustable Reset Timeout DelayFeaturesThe MAX6340/MAX6421–MAX6426 low-power micropro- ● Monitor System Voltages from 1.6V to 5Vce ..
MAX6424UK29+T ,Low-Power, SC70/SOT µP Reset Circuits with Capacitor-Adjustable Reset Timeout DelayGeneral Description Beneits and
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MAX6421US26-T-MAX6421US29-T-MAX6423XS16-T-MAX6423XS22-T-MAX6424UK29-T
1.614 V, Low-power, SC70/SOT mP reset circuit with capacitor-adjustable reset timeout delay
General Description
The MAX6340/MAX6421–MAX6426 low-power micro-
processor supervisor circuits monitor system voltages
from 1.6V to 5V. These devices perform a single function:
they assert a reset signal whenever the VCCsupply volt-
age falls below its reset threshold. The reset output
remains asserted for the reset timeout period after VCC
rises above the reset threshold. The reset timeout is exter-
nally set by a capacitor to provide more flexibility.
The MAX6421/MAX6424 have an active-low, push-
pull reset output. The MAX6422 has an active-high,
push-pull reset output and the MAX6340/MAX6423/
MAX6425/MAX6426 have an active-low, open-drain
reset output. The MAX6421/MAX6422/MAX6423 are
offered in 4-pin SC70 or SOT143 packages. The
MAX6340/MAX6424/MAX6425/MAX6426 are available
in 5-pin SOT23-5 packages.
Applications

Portable Equipment
Battery-Powered Computers/Controllers
Automotive
Medical Equipment
Intelligent Instruments
Embedded Controllers
Critical µP Monitoring
Set-Top Boxes
Computers
Features
Monitor System Voltages from 1.6V to 5VCapacitor-Adjustable Reset Timeout PeriodLow Quiescent Current (1.6µA typ)Three RESET Output Options
Push-Pull RESET
Push-Pull RESET
Open-Drain RESET
Guaranteed Reset Valid to VCC= 1VImmune to Short VCCTransientsSmall 4-Pin SC70, 4-Pin SOT143, and 5-Pin SOT23
Packages
MAX6340 Pin Compatible with LP3470MAX6424/MAX6425 Pin Compatible with
NCP300–NCP303, MC33464/MC33465,
S807/S808/S809, and RN5VD
MAX6426 Pin Compatible with PST92XX
MAX6340/MAX6421–MAX6426
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
Ordering Information
Pin Configurations

19-2440; Rev 2; 10/02
Typical Operating Circuit appears at end of data sheet.
Selector Guide appears at end of data sheet.
Note: The MAX6340/MAX6421–MAX6426 are available with fac-

tory-trimmed reset thresholds from 1.575V to 5.0V in approxi-
mately 0.1V increments. Insert the desired nominal reset
threshold suffix (from Table 1) into the blanks. There are 50 stan-
dard versions with a required order increment of 2500 pieces.
Sample stock is generally held on standard versions only (see
Standard Versions Table). Required order increment is 10,000
pieces for nonstandard versions. Contact factory for availability.
All devices are available in tape-and-reel only.
MAX6340/MAX6421–MAX6426
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
All Voltages Referenced to GND
VCC........................................................................-0.3V to +6.0V
SRT, RESET, RESET (push-pull).................-0.3V to (VCC+ 0.3V)
RESET(open drain)...............................................-0.3V to +6.0V
Input Current (all pins)......................................................±20mA
Output Current (RESET, RESET)......................................±20mA
Continuous Power Dissipation (TA= +70°C)
4-Pin SC70 (derate 3.1mW/°C above +70°C)..............245mW
4-Pin SOT143 (derate 4mW/°C above +70°C).............320mW
5-Pin SOT23 (derate 7.1mW/°C above +70°C)............571mW
Operating Temperature Range.........................-40°C to +125°C
Storage Temperature Range.............................-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s).................................+300°C
MAX6340/MAX6421–MAX6426
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay

SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX6421/26 toc01
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (
10,000
RESET TIMEOUT PERIOD vs. CSRT
MAX6421/26 toc02
CSRT (nF)
RESET TIMEOUT PERIOD (ms)
RESET TIMEOUT PERIOD
vs. TEMPERATURE
MAX6421/26 toc03
TEMPERATURE (°C)
RESET TIMEOUT PERIOD (ms)
RESET TIMEOUT PERIOD
vs. TEMPERATURE

MAX6421/26 toc04
RESET TIMEOUT PERIOD (
TEMPERATURE (°C)
MAXIMUM TRANSIENT DURATION
vs. RESET THRESHOLD OVERDRIVE
MAX6421/26 toc05
RESET THRESHOLD OVERDRIVE (mV)
TRANSIENT DURATION (
VCC TO RESET DELAY
vs. TEMPERATURE (VCC FALLING)

MAX6421/26 toc06
TO RESET DELAY (
TEMPERATURE (°C)
POWER-UP/POWER-DOWN
CHARACTERISTIC

MAX6421/26 toc07
1V/div
1V/div
400µs/div
NORMALIZED RESET THRESHOLD
vs. TEMPERATURE
MAX6421/26 toc08
TEMPERATURE (°C)
NORMALIZED RESET THRESHOLD
Typical Operating Characteristics

(VCC= 5V, CSRT= 1500pF, TA = +25°C, unless otherwise noted.)
MAX6340/MAX6421–MAX6426
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
Detailed Description
Reset Output

The reset output is typically connected to the reset input
of a µP. A µP’s reset input starts or restarts the µP in a
known state. The MAX6340/MAX6421–MAX6426 µP
supervisory circuits provide the reset logic to prevent
code-execution errors during power-up, power-down,
and brownout conditions (see Typical Operating
Characteristics).
RESETchanges from high to low whenever VCCdrops
below the threshold voltage. Once VCCexceeds the
threshold voltage, RESETremains low for the capacitor-
adjustable reset timeout period.
The MAX6422 active-high RESET output is the inverse
logic of the active-low RESEToutput. All device outputs
are guaranteed valid for VCC> 1V.
The MAX6340/MAX6423/MAX6425/MAX6426 are open-
drain RESEToutputs. Connect an external pullup resis-
tor to any supply from 0 to 5.5V. Select a resistor value
large enough to register a logic low when RESETis
asserted and small enough to register a logic high
while supplying all input current and leakage paths
connected to the RESETline. A 10kΩto 100kΩpullup
is sufficient in most applications.
Selecting a Reset Capacitor

The reset timeout period is adjustable to accommodate
a variety of µP applications. Adjust the reset timeout
period (tRP) by connecting a capacitor (CSRT) between
SRT and ground. Calculate the reset timeout capacitor
as follows:
Figure 1. MAX6340/MAX6423/MAX6425/MAX6426 Open-Drain
RESETOutput Allows Use with Multiple Supplies
MAX6340/MAX6421–MAX6426
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay

CSRT= (tRP- 275µs) / (2.73 ✕106)
where tRPis in seconds and CSRTis in farads.
The reset delay time is set by a current/capacitor-con-
trolled ramp compared to an internal 0.65V reference.
An internal 240nA ramp current source charges the
external capacitor. The charge to the capacitor is
cleared when a reset condition is detected. Once the
reset condition is removed, the voltage on the capacitor
ramps according to the formula: dV/dt = I/C. The CSRT
capacitor must ramp to 0.65V to deassert the reset.
CSRTmust be a low-leakage (<10nA) type capacitor;
ceramic is recommended.
Operating as a Voltage Detector

The MAX6340/MAX6421–MAX6426 can be operated in a
voltage detector mode by floating the SRT pin. The reset
delay times for VCCrising above or falling below the
threshold are not significantly different. The reset output is
deasserted smoothly without false pulses.
Applications Information
Interfacing to Other Voltages for Logic
Compatibility

The open-drain outputs of the MAX6340/MAX6423/
MAX6425/MAX6426 can be used to interface to µPs with
other logic levels. As shown in Figure 1, the open-drain
output can be connected to voltages from 0 to 5.5V. This
allows for easy logic compatibility to various µPs.
Wired-OR Reset

To allow auxiliary circuitry to hold the system in reset,
an external open-drain logic signal can be connected
to the open-drain RESETof the MAX6340/MAX6423/
MAX6425/MAX6426, as shown in Figure 2. This config-
uration can reset the µP, but does not provide the reset
timeout when the external logic signal is released.
Negative-Going VCCTransients

In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, these supervisors
are relatively immune to short-duration negative-going
transients (glitches). The graph Maximum Transient
Duration vs. Reset Threshold Overdrive in the Typical
Operating Characteristicsshows this relationship.
The area below the curve of the graph is the region in
which these devices typically do not generate a reset
pulse. This graph was generated using a negative-
going pulse applied to VCC, starting above the actual
reset threshold (VTH) and ending below it by the magni-
tude indicated (reset-threshold overdrive). As the mag-
nitude of the transient decreases (farther below the
reset threshold), the maximum allowable pulse width
decreases. Typically, a VCCtransient that goes 100mV
below the reset threshold and lasts 50µs or less does
not cause a reset pulse to be issued.
Ensuring a Valid RESET or RESET
Down to VCC= 0

When VCCfalls below 1V, RESET/RESET current-sink-
ing (sourcing) capabilities decline drastically. In the
case of the MAX6421/MAX6424, high-impedance
CMOS-logic inputs connected to RESETcan drift to
undetermined voltages. This presents no problems in
most applications, since most µPs and other circuitry
do not operate with VCCbelow 1V.
In those applications where RESETmust be valid down
to zero, adding a pulldown resistor between RESET
and ground sinks any stray leakage currents, holdingRESETlow (Figure 3). The value of the pulldown resis-
tor is not critical; 100kΩis large enough not to load
RESETand small enough to pull RESETto ground. For
applications using the MAX6422, a 100kΩpullup resis-
Figure 2. Wired-OR Reset Circuit
MAX6340/MAX6421–MAX6426
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay

tor between RESET and VCCholds RESET high when
VCCfalls below 1V (Figure 4). Open-drain RESETver-
sions are not recommended for applications requiring
valid logic for VCCdown to zero.
Layout Consideration

SRT is a precise current source. When developing the
layout for the application, be careful to minimize board
capacitance and leakage currents around this pin.
Traces connected to SRT should be kept as short as
possible. Traces carrying high-speed digital signals
and traces with large voltage potentials should be rout-
ed as far from SRT as possible. Leakage current and
stray capacitance (e.g., a scope probe) at this pin
could cause errors in the reset timeout period. When
evaluating these parts, use clean prototype boards to
ensure accurate reset periods.
Figure 3. Ensuring RESETValid to VCC= 0
Figure 4. Ensuring RESET Valid to VCC= 0
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