MAX5982AETE+ ,IEEE 802.3af/at-Compliant, Powered Device Interface Controllers with Integrated 70W High-Power MOSFETFeaturesS Sleep Mode and Ultra-Low-Power Sleep The MAX5982A/MAX5982B/MAX5982C provide a com-(MAX598 ..
MAX5982BETE+ ,IEEE 802.3af/at-Compliant, Powered Device Interface Controllers with Integrated 70W High-Power MOSFETApplicationsThe devices detect the presence of a wall adapter power IEEE 802.3af/at Powered Devices ..
MAX5984AETI+ ,Single-Port, 40W, IEEE 802.3af/at PSE Controller with Integrated MOSFETApplications)PoE Repeaters PSE OUTPUTSwitches/RoutersAGNDIndustrial Automation EquipmentV-54V EEOUT ..
MAX6001EUR ,Low-Cost, Low-Power, Low-Dropout, SOT23-3 Voltage ReferencesMAX6001–MAX600513-1395; Rev 1; 4/99Low -Cost, Low -Pow er, Low -Dropout, SOT23-3 Voltage References
MAX6001EUR+T ,Low-Cost, Low-Power, Low-Dropout, SOT23-3 Voltage ReferencesApplicationsOrdering InformationPortable/Battery-Powered EquipmentNotebook ComputersPIN- SOTPART TE ..
MAX6001EUR+T ,Low-Cost, Low-Power, Low-Dropout, SOT23-3 Voltage ReferencesFeaturesThe MAX6001–MAX6005 family of SOT23, low-cost♦ 1% max Initial Accuracyseries voltage refere ..
MAZ8200-H ,Silicon planar typeFeatures•Extremely low noise voltage caused from the diode (2.4V to 39V,1/3 to 1/10 of our conventi ..
MAZ8200-L ,Silicon planar typeelectrical characteristicsZ Zwithin part numbersReverse current I V ··············· Specified value ..
MAZ8200-M ,Silicon planar typeElectrical Characteristics T = 25°CaParameter Symbol Conditions Min Typ Max UnitForward voltage V ..
MAZ8220-H ,Silicon planar typeZener DiodesMAZ8000 SeriesSilicon planar typeUnit : mmFor stabilization of power supplyKA
MAZ8220-L ,Silicon planar typeAbsolute Maximum Ratings T = 25°CaMarking SymbolParameter Symbol Rating UnitRefer to the list of t ..
MAZ8220-M ,Silicon planar typeElectrical Characteristics T = 25°CaParameter Symbol Conditions Min Typ Max UnitForward voltage V ..
MAX5982AETE+-MAX5982BETE+
IEEE 802.3af/at-Compliant, Powered Device Interface Controllers with Integrated 70W High-Power MOSFET
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated 70W High-Power MOSFET
MAX5982A/MAX5982B/MAX5982C
General Description
The MAX5982A/MAX5982B/MAX5982C provide a com-
plete interface for a powered device (PD) to comply with
the IEEE® 802.3af/at standard in a power-over-Ethernet
(PoE) system. The MAX5982A/MAX5982B/MAX5982C
provide the PD with a detection signature, classifica-
tion signature, and an integrated isolation power switch
with inrush current control. During the inrush period,
the MAX5982A/MAX5982B/MAX5982C limit the current
to less than 182mA before switching to the higher cur-
rent limit (1700mA to 2100mA) when the isolation power
MOSFET is fully enhanced. The devices feature an input
UVLO with wide hysteresis and long deglitch time to
compensate for twisted-pair cable resistive drop and to
assure glitch-free transition during power-on/-off condi-
tions. The MAX5982A/MAX5982B/MAX5982C can with-
stand up to 100V at the input.
The MAX5982A/MAX5982B/MAX5982C support a
2-Event classification method as specified in the IEEE
802.3at standard and provide a signal to indicate when
probed by a Type 2 power sourcing equipment (PSE).
The devices detect the presence of a wall adapter power
source connection and allow a smooth switchover from
the PoE power source to the wall power adapter.
The MAX5982A/MAX5982B/MAX5982C also provide a
power-good (PG) signal, two-step current limit and fold-
back, overtemperature protection, and di/dt limit. A sleep
mode feature in the MAX5982A/MAX5982B provides low
power consumption while supporting Maintain Power
Signature (MPS). An ultra-low-power sleep mode feature
in the MAX5982A/MAX5982B further reduces power
consumption while still supporting MPS. The MAX5982A/
MAX5982B also feature an LED driver that is automati-
cally activated during sleep mode.
The MAX5982A/MAX5982B/MAX5982C are available in
a 16-pin, 5mm x 5mm, TQFN power package. These
devices are rated over the -40NC to +85NC extended
temperature range.
Features
S Sleep Mode and Ultra-Low-Power Sleep
(MAX5982A/MAX5982B)
S IEEE 802.3af/at Compliant
S 2-Event Classification or an External Wall Adapter
Indicator Output
S Simplified Wall Adapter Interface
S PoE Classification 0–5
S 100V Input Absolute Maximum Rating
S Inrush Current Limit of 182mA Maximum
S Current Limit During Normal Operation Between
1700mA and 2100mA
S Current Limit and Foldback
S Legacy UVLO at 36V
S LED Driver with Programmable LED Current
(MAX5982A/MAX5982B)
S Overtemperature Protection
S Thermally Enhanced, 5mm x 5mm, 16-Pin TQFN
Applications
IEEE 802.3af/at Powered Devices
IP Phones, Wireless Access Nodes, IP Security
Cameras
WiMAXK Base Stations
19-5960; Rev 0; 6/11
WiMAX is a trademark of WiMAX Forum.
IEEE is a registered service mark of the Institute of Electrical
Ordering Information appears at end of data sheet.
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated 70W High-Power MOSFET
MAX5982A/MAX5982B/MAX5982C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
VDD to VSS ..........................................................-0.3V to +100V
DET, RTN, WAD, PG, 2EC to VSS .......................-0.3V to +100V
CLS, SL, WK, ULP, LED to VSS ...............................-0.3V to +6V
Maximum Current on CLS (100ms maximum) .................100mA
Continuous Power Dissipation (TA = +70NC) (Note 1)TQFN (derate 28.6mW/NC above +70NC)Multilayer Board .....................................................2285.7mW
Operating Temperature Range ..........................-40NC to +85NC
Maximum Junction Temperature .....................................+150NC
Storage Temperature Range ............................-65NC to +150NC
Lead Temperature (soldering, 10s) .............................. +300NC
Soldering Temperature (reflow) .................................... +260NC
ELECTRICAL CHARACTERISTICS
(VIN = (VDD - VSS) = 48V, RDET = 24.9kω, RCLS = 615ω, and RSL = 60.4kω. RTN, WAD, PG, 2EC, WK, and ULP unconnected, all
voltages are referenced to VSS, unless otherwise noted. TA = TJ = -40NC to +85NC, unless otherwise noted. Typical values are at
TA = +25NC.) (Note 3)
ABSOLUTE MAXIMUM RATINGS
Note 1: Maximum power dissipation is obtained using JEDEC JESD51-5 and JESD51-7 specifications.
TQFN
Junction-to-Ambient Thermal Resistance (qJA) ..........35°C/W
Junction-to-Case Thermal Resistance (BJC) ..............2.7NC/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to /thermal-tutorial.
PACKAGE THERMAL CHARACTERISTICS(Note 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
DETECTION MODE
Input Offset CurrentIOFFSETVIN = 1.4V to 10.1V (Note 4)10FA
Effective Differential Input
ResistancedRVIN = 1.4V up to 10.1V with 1V step,
VDD = RTN = WAD = PG = 2EC (Note 5)23.9525.0025.50kI
CLASSIFICATION MODE
Classification Disable
ThresholdVTH,CLSVIN rising (Note 6)22.022.823.6V
Classification Stability Time0.2ms
Classification CurrentICLASS
VIN = 12.5V to
20.5V, VDD =
RTN = WAD =
PG = 2EC
Class 0, RCLS = 615I03.96
Class 1, RCLS = 117I9.1211.88
Class 2, RCLS = 66.5I17.219.8
Class 3, RCLS = 43.7I26.329.7
Class 4, RCLS = 30.9I36.443.6
Class 5, RCLS = 21.3I52.763.3
TYPE 2 (802.3at) CLASSIFICATION MODE
Mark Event ThresholdVTHMVIN falling10.110.711.6V
Hysteresis on Mark Event
Threshold0.82V
Mark Event CurrentIMARKVIN falling to enter mark event, 5.2V P VIN
P 10.1V0.250.85mA
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated 70W High-Power MOSFET
MAX5982A/MAX5982B/MAX5982C
ELECTRICAL CHARACTERISTICS (continued)
(VIN = (VDD - VSS) = 48V, RDET = 24.9kω, RCLS = 615ω, and RSL = 60.4kω. RTN, WAD, PG, 2EC, WK, and ULP unconnected, all
voltages are referenced to VSS, unless otherwise noted. TA = TJ = -40NC to +85NC, unless otherwise noted. Typical values are at
TA = +25NC.) (Note 3)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
POWER MODE
VIN Supply Voltage Range60V
VIN Supply CurrentIQCurrent through internal MOSFET = 00.250.55mA
VIN Turn-On VoltageVONVIN rising34.335.436.6V
VIN Turn-Off VoltageVOFFVIN falling30V
VIN Turn-On/-Off HysteresisVHYST_UVLO(Note 7)4.2V
VIN Deglitch TimetOFF_DLYVIN falling from 40V to 20V (Note 8)30120Fs
Inrush to Operating Mode
DelaytDELAYtDELAY = minimum PG current pulse width
after entering into power mode 9096102ms
Isolation Power MOSFET
On-ResistanceRON_ISOIRTN = 950mA
TJ = +25NC0.10.2TJ = +85NC0.150.25
TJ = +125NC0.2
RTN Leakage CurrentIRTN_LKGVRTN = 12.5V to 30V10FA
CURRENT LIMIT
Inrush Current LimitIINRUSHDuring initial turn-on period, VRTN = 1.5V90135182mA
Current Limit During Normal
OperationILIMAfter inrush completed,
VRTN = 1V (Note 9)170019002100mA
Current Limit in Foldback
ConditionILIM-FLDBKBoth during inrush and after inrush
completed VRTN = 7.5V53mA
Foldback Threshold VRTN (Note 10)6.57.07.5V
LOGIC
WAD Detection ThresholdVWAD-REFVWAD rising, VIN = 14V to 48V
(referenced to RTN)8910V
WAD Detection Threshold
Hysteresis
VWAD falling, VRTN = 0V, VSS
unconnected0.35V
WAD Input CurrentIWAD-LKGVWAD = 10V (referenced to RTN)3.5FA
2EC Sink CurrentV2EC = 3.5V (referenced to RTN),
VSS disconnected11.52.25mA
2EC Off-Leakage CurrentV2EC = 48V 1FA
PG Sink CurrentVRTN = 1.5V, VPG = 0.8V, during inrush
period125230375FA
PG Off-Leakage CurrentVPG = 60V1FA
SLEEP MODE (MAX5982A/MAX5982B)
WK and ULP Logic Threshold VTHVWK falling and VULP rising and falling 1.53V
SL Logic Threshold Falling0.750.80.85V
SL CurrentRSL = 0I140FA
LED Current AmplitudeILED
RSL = 60.4kI, VLED = 3.5V1010.511.5RSL = 30.2kI, VLED = 3.75V19.520.922.5
RSL = 30.2kI, VLED = 4V19
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated 70W High-Power MOSFET
MAX5982A/MAX5982B/MAX5982C
ELECTRICAL CHARACTERISTICS (continued)
(VIN = (VDD - VSS) = 48V, RDET = 24.9kω, RCLS = 615ω, and RSL = 60.4kω. RTN, WAD, PG, 2EC, WK, and ULP unconnected, all
voltages are referenced to VSS, unless otherwise noted. TA = TJ = -40NC to +85NC, unless otherwise noted. Typical values are at
TA = +25NC.) (Note 3)
Note 3: All devices are 100% production tested at TA = +25NC. Limits over temperature are guaranteed by design.
Note 4: The input offset current is illustrated in Figure 1.
Note 5: Effective differential input resistance is defined as the differential resistance between VDD and VSS. See Figure 1.
Note 6: Classification current is turned off whenever the device is in power mode.
Note 7: UVLO hysteresis is guaranteed by design, not production tested.
Note 8: A 20V glitch on input voltage, which takes VDD below VON shorter than or equal to tOFF_DLY does not cause the
MAX5982A/MAX5982B/MAX5982C to exit power-on mode.
Note 9: Maximum current limit during normal operation is guaranteed by design; not production tested.
Note 10: In power mode, current-limit foldback is used to reduce the power dissipation in the isolation MOSFET during an
overload condition across VDD and RTN.
Figure 1. Effective Differential Input Resistance/Offset Current
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
LED Current Programmable
Range1020mA
LED Current with Grounded SLVSL = 0V20.524.528.5mA
LED Current FrequencyfILEDNormal and ultra-low-power sleep modes250Hz
LED Current Duty CycleDILEDNormal and ultra-low-power sleep modes25%
VDD Current AmplitudeIVDDNormal sleep mode, VLED = 3.5V101112.2mA
Internal Current Duty CycleDIVDDNormal and ultra-low-power sleep modes75%
Internal Current Enable TimetMPSUltra-low-power sleep mode 808488ms
Internal Current Disable TimetMPDOUltra-low-power sleep mode220228236ms
SL Delay TimetSL
Time VSL must remain below the SL logic
threshold to enter sleep and ultra-low-
power modes (MAX5982A)
5.46.06.6s
THERMAL SHUTDOWN
Thermal-Shutdown ThresholdTSDTJ rising+150NC
Thermal-Shutdown HysteresisTJ falling30NC
IIN
IINi + 1
IINi
IOFFSET
dRiVINiVINi + 1
IOFFSET = IINi - VINi
dRi
dRi = (VINi + 1 - VINi) = 1V (IINi + 1 - IINi) (IINi + 1 - IINi)
VIN
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated 70W High-Power MOSFET
MAX5982A/MAX5982B/MAX5982C
Typical Operating Characteristics
(VIN = (VDD - VSS) = 54V, RDET = 24.9kω, RCLS = 615ω, and RSL = 60.4kω. RTN, WAD, PG, 2EC, WK, and ULP unconnected; all
voltages are referenced to VSS.)
DETECTION CURRENT
vs. INPUT VOLTAGE
MAX5982A toc01
VIN (V)
IIN
(mA)642
IIN = IVDD + IDET
RDET = 25.4kI
RTN = 2EC = PG = WAD = VDD
CLASSIFICATION CURRENT
vs. INPUT VOLTAGE
MAX5982A toc04
VIN (V)
IIN
(mA)2015105
CLASS 5
CLASS 4
CLASS 3
CLASS 2
CLASS 1
CLASS 0
SIGNATURE RESISTANCE
vs. INPUT VOLTAGE
MAX5982A toc02
VIN (V)
SIGNATURE
(k642
IIN = IVDD + IDET
RDET = 25.4kI
RTN = 2EC = PG = WAD = VDD
TA = +85°C
TA = -40°C
TA = +25°C
CLASSIFICATION SETTLING TIME
MAX5982A toc05
VIN
5V/div
IIN
100mA/div
VCLS
2V/div
100µs/div
STEP INPUT APPLIED TO
VIN FROM 10V TO 12V
INPUT OFFSET CURRENT
vs. INPUT VOLTAGE
MAX5982A toc03
VIN (V)
INPUT OFFSET CURRENT (µA)642
TA = +85°C
TA = -40°C
TA = +25°C
2EC SINK CURRENT vs. 2EC VOLTAGE
MAX5982A toc06
V2EC (V)
I2EC
(mA)40302010
TA = +85°C
TA = -40°C
TA = +25°C
PG SINK CURRENT vs. PG VOLTAGE
MAX5982A toc07
IPG
(µA)40302010
TA = +85°C
TA = -40°C
TA = +25°C
INRUSH CURRENT LIMIT
vs. RTN VOLTAGE
MAX5982A toc08
INRUSH CURRENT LIMIT (A)40102030
NORMAL OPERATION CURRENT LIMIT
vs. RTN VOLTAGE
MAX5982A toc09
CURRENT LIMIT (A)40302010
060
MAX5982A/MAX5982B/MAX5982C
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated Power MOSFET
Typical Operating Characteristics (continued)
(VIN = (VDD - VSS) = 54V, RDET = 24.9kω, RCLS = 615ω, and RSL = 60.4kω. RTN, WAD, PG, 2EC, WK, and ULP unconnected; all
voltages are referenced to VSS.)
INRUSH CONTROL WAVEFORM
WITH TYPE 2 CLASSIFICATION
MAX5982A toc10
VIN
50V/div
IRTN
100mA/div
VRTN
50V/div
V2EC
50V/div
VPG
50V/div
20ms/div
LED CURRENT vs. LED VOLTAGE
MAX5982A toc13
VLED (V)
ILED
(mA)321
RSL = 30.2kI
RSL = 60.4kI
INRUSH CONTROL WAVEFORM
WITH TYPE 2 CLASSIFICATION
MAX5982A toc11
VIN
50V/div
IRTN
100mA/div
VRTN
50V/div
V2EC
50V/div
400µs/div
DRIVING LED WITH ULP IN
POWER MODE
MAX5982A toc14
VULP
2V/div
ILED
5mA/div
LED CURRENT vs. RSL
MAX5982A toc12
RSL (kI)
ILED
(mA)555045403530252015105
SLEEP/ULTRA-LOW-POWER MODE
DELAY (MAX5982A)
MAX5982A toc15
VSL
1V/div
ILED
5mA/div
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated 70W High-Power MOSFET
MAX5982A/MAX5982B/MAX5982C
Pin Description
Pin Configurations
PIN
NAMEFUNCTIONMAX5982A/
MAX5982BMAX5982C1, 13–16N.C.No Connection. Not internally connected.2VDD Positive Supply Input. Connect a 68nF (min) bypass capacitor between VDD and VSS.3DETDetection Resistor Input. Connect a signature resistor (RDET = 24.9kI) from DET to VDD. 4I.C.Internally Connected. Leave unconnected.
5, 65, 6VSSNegative Supply Input. VSS connects to the source of the integrated isolation n-channel
power MOSFET.
7, 87, 8RTN
Drain of Isolation MOSFET. RTN connects to the drain of the integrated isolation
n-channel power MOSFET. Connect RTN to the downstream DC-DC converter ground as
shown in the Typical Application Circuit.9WAD
Wall Power Adapter Detector Input. Wall adapter detection is enabled the moment
VDD - VSS crosses the mark event threshold. Detection occurs when the voltage from
WAD to RTN is greater than 9V. When a wall power adapter is present, the isolation
n-channel power MOSFET turns off and 2EC current sink turns on. Connect WAD directly
to RTN when the wall power adapter or other auxiliary power source is not used. 10PG
Open-Drain, Power-Good Indicator Output. PG sinks 230FA to disable the downstream
DC-DC converter while turning on the hot-swap MOSFET switch. PG current sink is
disabled during detection, classification, and in the steady-state power mode. The PG
current sink is turned on to disable the downstream DC-DC converter when the device is
in sleep mode.
RTN
*EP
LED
VDD1513
DET
I.C.
CLS
2EC
WAD
MAX5982A
MAX5982B
RTN
N.C.
TQFN
ULPWKSL
*CONNECT EP TO VSS.
TQFN
TOP VIEW
RTN
*EP
N.C.N.C.N.C.
VDD1513
DET
I.C.
CLS
2EC
WAD
MAX5982C
RTN
N.C.
N.C.12
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated 70W High-Power MOSFET
MAX5982A/MAX5982B/MAX5982C
Pin Description (continued)
PIN
NAMEFUNCTIONMAX5982A/
MAX5982BMAX5982C112EC
2-Event Classification Detect or Wall Adapter Detect Output. A 1.5mA current sink is
enabled at 2EC when a Type 2 PSE or a wall adapter is detected. When powered by
a Type 2 PSE, the 2EC current sink is enabled after the isolation MOSFET is fully on
until VIN drops below the UVLO threshold. 2EC is latched when powered by a Type 2
PSE until VIN drops below the reset threshold. 2EC also asserts when a wall adapter
supply, typically greater than 9V, is applied between WAD and RTN. 2EC is not latched if
asserted by WAD. The 2EC current sink is turned off when the device is in sleep mode.12CLS
Classification Resistor Input. Connect a resistor (RCLS) from CLS to VSS to set the
desired classification current. See the classification current specifications in the Electrical
Characteristics table to find the resistor value for a particular PD classification.––LED
LED Driver Output. During sleep mode, LED sources a periodic current (ILED) at 250Hz
with 25% duty cycle. The amplitude of ILED is set by RSL according to the formula ILED (in
A) = 645.75/(RSL + 1200).––SL
Sleep Mode Enable Input. In the MAX5982B, a falling edge on SL brings the device into
sleep mode (VSL must drop below 0.75V). In the MAX5982A, VSL must remain below
the threshold (0.75V) for a period of at least 6s after falling edge to bring the device into
sleep mode. An external resistor (RSL) connected between SL and VSS sets the LED
current (ILED).––WK
Wake Mode Enable Input. WK has an internal 2.5kI pullup resistor to the internal 5V
bias rail. A falling edge on WK brings the device out of sleep mode and into the normal
operating mode (wake mode). ––ULP
Ultra-Low-Power Sleep Enable Input (in Sleep Mode). ULP has an internal 50kI pullup
resistor to the internal 5V bias rail. A falling edge on SL in the MAX5982B (and a 6s
period below the SL threshold in the MAX5982A) while ULP is asserted low enables
ultra-low-power sleep mode. When ultra-low-power sleep mode is enabled, the power
consumption of the device is reduced even lower than normal sleep mode to comply with
ultra-low-power sleep power requirements while still supporting MPS.––EP
Exposed Pad. Do not use EP as an electrical connection to VSS. EP is internally
connected to VSS through a resistive path and must be connected to VSS externally. To
optimize power dissipation, solder the exposed pad to a large copper power plane.
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with Integrated 70W High-Power MOSFET
MAX5982A/MAX5982B/MAX5982C
MAX5982A/MAX5982B Simplified Block Diagram
1.5mA
46µA
VDDCLS
2EC
VDD
SET
CLR
DET
VSS
5V REGULATOR
THERMAL
SHUTDOWN
tDELAY
VDD
VDD
VDD
WAD
RTN
LED
VON/VOFF
VDD
SET
CLR
230µA
CLASSIFICATION
ISWITCH
LOGIC
K x ISWITCH
ISOLATION
SWITCH
MUX
1/K
MAX5982A
MAX5982B
ULP
50kI
2.5kI
