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MAZ8150-L ,Silicon planar typeFeatures•Extremely low noise voltage caused from the diode (2.4V to 39V,1/3 to 1/10 of our conventi ..
MAZ8150-M ,Silicon planar typeAbsolute Maximum Ratings T = 25°CaMarking SymbolParameter Symbol Rating UnitRefer to the list of t ..
MAZ8160-H ,Silicon planar typeElectrical Characteristics T = 25°CaParameter Symbol Conditions Min Typ Max UnitForward voltage V ..
MAZ8160-L ,Silicon planar typeZener DiodesMAZ8000 SeriesSilicon planar typeUnit : mmFor stabilization of power supplyKA
MAX5942BCSE+
IEEE 802.3af Power-Over-Ethernet Interface/PWM Controller for Power Devices
General DescriptionThe MAX5942A/MAX5942B integrate a complete power
IC for powered devices (PD) in a power-over-ethernet
(PoE) system. The MAX5942A/MAX5942B provide a PD
interface and a compact DC-DC PWM controller suitable
for flyback and forward converters in either isolated or
nonisolated designs.
The MAX5942A/MAX5942B PD interface complies with
the IEEE™ 802.3af standard, providing the PD with a
detection signature, a classification signature, and an
integrated isolation switch with programmable inrush cur-
rent control. These devices also feature power-mode
undervoltage lockout (UVLO) with wide hysteresis and
power-good status outputs.
The MAX5942A/MAX5942B also integrate all the build-
ing blocks necessary for implementing DC-DC fixed-
frequency isolated power supplies. This device is a
current-mode controller with an integrated high startup
circuit suitable for isolated telecom/industrial voltage
range power supplies. A high-voltage startup circuit
allows the PWM controller to draw power directly from the
18V to 67V input supply during startup. The switching
frequency is internally trimmed to 275kHz ±10%, thus
reducing magnetics and filter components. The
MAX5942A allows an 85% operating duty cycle and can
be used to implement flyback converters. The MAX5942B
limits the operating duty cycle to less than 50% and can
be used in single-ended forward converters. The
MAX5942A/MAX5942B are designed to work with or with-
out an external diode bridge in front of the PD.
The MAX5942A/MAX5942B are available in 16-pin SO
packages.
ApplicationsPhones
Wireless Access Nodes
Internet Appliances
Computer Telephony
Security Cameras
Power Devices in Power-Over-Ethernet/
Power-Over-MDI
FeaturesPowered Device Interface
Fully Integrated IEEE 802.3af-Compliant PD
Interface
PD Detection and Programmable Classification
Signatures
Less than 10μA Leakage Current Offset During
Detection
Integrated MOSFET for Isolation and Inrush
Current Limiting
Gate Output Allows External Control of the
Internal Isolation FET
Programmable Inrush Current Control/ULVO
PGOOD/PGOODOutputs Enable PWM
ControllerPWM Controller
Wide Input Range: 18V to 67V
Isolated (Without Optocoupler) or Nonisolated
Power Supply
Current-Mode Control
Leading-Edge Blanking
Internally Trimmed 275kHz ±10% Oscillator
Soft-Start
MAX5942A/MAX5942B
IEEE 802.3af Power-Over-Ethernet
Interface/PWM Controller for Power Devices
Ordering Information19-3024; Rev 2; 9/04
PARTTEMP RANGEPIN-
PACKAGEA X D U T YYC L E ( % ) MAX5942AESE*-40°C to +85°C16 SO85
MAX5942ACSE0°C to +70°C16 SO85
MAX5942BESE*-40°C to +85°C16 SO50
MAX5942BCSE 0°C to +70°C16 SO50
Typical Operating Circuit appears at end of data sheet.IEEE is a trademark of the Institute of Electrical and Electronics
Engineers.
*Future product—contact factory for availability.VCC
NDRV
GND
PGOOD
PGOOD
OUT
TOP VIEW
MAX5942A
MAX5942B
VDD
RCL
SS_SHDN
ULVO
GATE
VEE
Pin Configuration
MAX5942A/MAX5942B
IEEE 802.3af Power-Over-Ethernet
Interface/PWM Controller for Power Devices
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VIN= (GND - VEE) = 48V, GATE = PGOOD= PGOOD = OPEN, V- tied to OUT, V+ tied to GND, UVLO = VEE, TA= TMINto TMAX,
unless otherwise noted. Typical values are at TA= +25°C. All voltages are referenced to VEE, unless otherwise noted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages are referenced to VEE, unless otherwise noted.)
GND........................................................................-0.3V to +90V
OUT, PGOOD...........................................-0.3V to (GND + 0.3V)
RCL, GATE.............................................................-0.3V to +12V
UVLO........................................................................-0.3V to +8V
PGOOD to OUT.........................................-0.3V to (GND + 0.3V)
V+ to V-...................................................................-0.3V to +80V
VDDto V-.................................................................-0.3V to +40V
VCCto V-..............................................................-0.3V to +12.5V
FB, NDRV, SS_SHDN, CS to V-..................-0.3V to (VCC+ 0.3V)
Maximum Input/Output Current (continuous)
OUT to VEE...................................................................500mA
GND, RCL to VEE............................................................70mA
UVLO, PGOOD, PGOOD to VEE.....................................20mA
GATE to VEE....................................................................80mA
VDD, VCC.........................................................................20mA
NDRV Continuous...........................................................25mA
NDRV (pulsed for less than 1µs).......................................±1A
Continuous Power Dissipation (TA= +70°C)
16-Pin SO (derate 9.1mW/°C above +70°C)................727mW
Operating Temperature Ranges
MAX5942_CSE...................................................0°C to +70°C
MAX5942_ESE................................................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s) ................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
PD INTERFACE
DETECTION MODEInput Offset CurrentIOFFSETVIN = 1.4V to 10.1V (Note 2)10µA
Effective Differential Input
ResistancedRVIN = 1.4V up to 10.1V with 1V step,
OUT = PGOOD = GND (Note 3)550kΩ
CLASSIFICATION MODEClassification Current Turn-Off
ThresholdVTH,CLSSVIN rising (Note 4)20.821.822.5V
Class 0, RCL = 10kΩ02
Class 1, RCL = 732Ω9.1711.83
Class 2, RCL = 392Ω17.2919.71
Class 3, RCL = 255Ω26.4529.55
Classification CurrentICLASS
VIN = 12.6V
to 20V, RDISC
= 25.5kΩ
(Notes 5, 6)
Class 4, RCL = 178Ω36.641.4
POWER MODEOperating Supply VoltageVINVIN = (GND - VEE)67V
Operating Supply CurrentIINMeasure at GND, not including RDISC0.41mA
Default Power Turn-On VoltageVUVLO,ONVIN increasing, UVLO = VEE37.438.640.1V
Default Power Turn-Off VoltageVUVLO,OFFVIN decreasing, UVLO = VEE30V
Default Power Turn-On/Off
HysteresisVHYST,UVLO7.4V
External UVLO Programming
RangeVIN,EXSet UVLO externally (Note 7)1267V
UVLO External Reference VoltageVREF,UVLOVUVLO increasing2.4002.4602.522V
UVLO External Reference
Voltage HysteresisHYSTRatio to VREF,UVLO19.22020.9%
MAX5942A/MAX5942B
IEEE 802.3af Power-Over-Ethernet
Interface/PWM Controller for Power Devices
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSUVLO Bias CurrentIUVLOUVLO = 2.460V-1.5+1.5µA
UVLO Input Ground Sense
ThresholdVTH,G,UVLO(Note 8)50440mV
UVLO Input Ground Sense Glitch
RejectionUVLO = VEE7µs
Power Turn-Off Voltage,
Undervoltage Lockout Deglitch
Time
tOFF_DLYVIN, VUVLO falling (Note 9)0.32ms
TA = +25°C
(Note 11)0.61.1
Isolation Switch N-Channel
MOSFET On-ResistanceRON
Output current =
300mA, VGATE = 5.6V,
measured between
OUT and VEETA = +85°C0.81.5
Isolation Switch N-Channel
MOSFET Off-Threshold VoltageVGSTHOUT = GND, VGATE - VEE, output current
< 1µA0.5V
GATE Pulldown Switch ResistanceRGPower-off mode, VIN = 12V, UVLO = VEE3880Ω
GATE Charging CurrentIGVGATE = 2V51015µA
GATE High VoltageVGATEIGATE = 1µA5.585.765.93V
VOUT - VEE, |VOUT - VEE| decreasing,
VGATE = 5.75V1.151.231.31VPGOOD, PGOOD Assertion
VOUT ThresholdVOUTEN
Hysteresis70mV
(GATE - VEE) increasing, OUT = VEE4.624.764.91VPGOOD, PGOOD Assertion
VGATE ThresholdVGSENHysteresis80mV
PGOOD Output Low VoltageVOLDCDCISINK = 2mA (Note 10)0.4V
PGOOD Output Low VoltageISINK = 2mA, OUT ≤ (GND - 5V) (Note 10)0.2V
PGOOD Leakag e C ur r entGATE = hi g h, GN D - V OU T = 67V ( N ote 10) 1µA
PGOOD Leakag e C ur r entGATE = V E E , P GOOD - V E E = 67V ( N ote 10) 1µA
ELECTRICAL CHARACTERISTICS (continued)(VIN= (GND - VEE) = 48V, GATE = PGOOD= PGOOD = OPEN, V- tied to OUT, V+ tied to GND, UVLO = VEE, TA= TMINto TMAX,
unless otherwise noted. Typical values are at TA= +25°C. All voltages are referenced to VEE, unless otherwise noted.) (Note 1)
ELECTRICAL CHARACTERISTICS (PWMController)(All voltages referenced to V-. VDD= 13V, a 10µF capacitor connects VCCto V-, VCS= V-, V+ = 48V, 0.1µF capacitor connected to
SS_SHDN, NDRV = open circuit, VFB= 3V, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
SUPPLY CURRENTIV+(NS)VDD = 0V, V+ = 67V, driver not switching0.81.6
V+ Supply CurrentIV+(S)V+ = 67V, VDD = 0V, VFB = 4V, driver
switching1.63.2mA
V+ Supply Current After StartupV+ = 67V, VDD = 13V, VFB = 4V14µA
MAX5942A/MAX5942B
IEEE 802.3af Power-Over-Ethernet
Interface/PWM Controller for Power Devices
ELECTRICAL CHARACTERISTICS (PWMController) (continued)(All voltages referenced to V-. VDD= 13V, a 10µF capacitor connects VCCto V-, VCS= V-, V+ = 48V, 0.1µF capacitor connected to
SS_SHDN, NDRV = open circuit, VFB= 3V, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSIVDD(NS)VDD = 36V, driver not switching0.91.6VDD Supply CurrentIVDD(S)VDD = 36V, driver switching, VOPTO = 4V1.93.2mA
V+ Shutdown CurrentVSS_SHDN = 0V, V+ = 67V180290µA
VDD Shutdown CurrentVSS_SHDN = 0V420µA
PREREGULATORS/STARTUPV+ Input Voltage1867V
VDD Supply Voltage1336V
INTERNAL REGULATORSPowered from V+, ICC = 7.5mA, VDD = 0V7.59.812VCC Output VoltagePowered from VDD, ICC = 7.5mA9.010.011.0V
VCC Undervoltage LockoutVCC_UVLOVCC falling6.6V
OUTPUT DRIVERPeak Source CurrentVCC = 11V (externally forced)570mA
Peak Sink CurrentVCC = 11V (externally forced)1000mA
NDRV High-Side Driver
ResistanceROHVCC = 11V, externally forced, NDRV
sourcing 50mA412Ω
NDRV Low-Side Driver
ResistanceROLVCC = 11V, externally forced, NDRV sinking
50mA1.64Ω
ERROR AMPLIFIERFB Input ResistanceRIN50kΩ
FB Input Bias CurrentIFBVFB = VSS_SHDN±1µA
Error Amplifier Gain (Inverting)AVCL-20V/V
Closed-Loop 3dB Bandwidth200kHz
FB Input Voltage Range23V
SLOPE COMPENSATIONSlope CompensationVSCOMPMAX5942A26mV/µs
THERMAL SHUTDOWNThermal Shutdown Temperature+150°C
Thermal Hysteresis25°C
CURRENT LIMITCS Threshold VoltageVILIMFB = 4V419465510mV
CS Input Bias Current0V ≤ VCS ≤ 2V, FB = 4V-1+1µA
Current-Limit Comparator
Propagation Delay25mV overdrive on CS, FB = V-180ns
CS Blanking TimeFB = GN D , onl y P W M com p ar ator i s b l anked 70ns
OSCILLATORClock Frequency RangeFB = V-235275314kHz
MAX5942A, FB = V-7585Max Duty CycleMAX5942B, FB = V-4450%
MAX5942A/MAX5942B
IEEE 802.3af Power-Over-Ethernet
Interface/PWM Controller for Power DevicesIIN
IINi +1
IINi
IOFFSET
dRiVINiVINi +1
IOFFSET ≅ IINi - VINi
dRi
dRi ≅ (VINi + 1 - VINi) = 1V (IINi + 1 - IINi) (IINi + 1 - IINi)
Figure 1. Effective Differential Input Resistance/Offset Current
ELECTRICAL CHARACTERISTICS (PWMController) (continued)(All voltages referenced to V-. VDD= 13V, a 10µF capacitor connects VCCto V-, VCS= V-, V+ = 48V, 0.1µF capacitor connected to
SS_SHDN, NDRV = open circuit, VFB= 3V, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
Note 1:All min/max limits for the PD interface are production tested at +85°C (extended grade)/+70°C (commercial grade). Limits
at +25°C and -40°C are guaranteed by design. All PWM controller min/max limits are 100% production tested at +25°C
and +85°C (extended grade)/+70°C (commercial grade). Limits at -40°C are guaranteed by design, unless otherwise
noted.
Note 2:The input offset current is illustrated in Figure 1.
Note 3:Effective differential input resistance is defined as the differential resistance between GND and VEEwithout any external
resistance.
Note 4: Classification current is turned off whenever the IC is in power mode.
Note 5:See Table 2 in the PD Classification Modesection. RDISCand RCLmust be 100ppm or better.
Note 6:See Thermal Dissipation sectionfor details.
Note 7:When UVLO is connected to the midpoint of an external resistor-divider with a series resistance of 25.5kΩ(±1%), the turn-
on threshold set point for the power mode is defined by the external resistor-divider. Make sure the voltage on the UVLO
pin does not exceed its maximum rating of 8V when VINis at the maximum voltage.
Note 8:When the VUVLOis below VTH, G, UVLO,the MAX5942_ sets the turn-on voltage threshold internally (VUVLO,ON).
Note 9:An input voltage or VUVLOglitch below their respective thresholds shorter than or equal to tOFF_DLYwill not cause the
MAX5942A/MAX5942B to exit power-on mode (as long as the input voltage remains above an operable voltage level of 12V).
Note 10:PGOOD references to OUT while PGOODreferences to VEE.
Note 11:Guaranteed by design.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
SOFT-STARTSS Source CurrentISSOVSS_SHDN = V-2.04.56.5µA
SS Sink Current1mA
Peak Soft-Start Voltage ClampNo external load2.3312.4202.500V
VSS_SHDN falling (Note 11)0.250.370.41Shutdown ThresholdVSS_SHDN rising (Note 11)0.530.590.65V
MAX5942A/MAX5942B
IEEE 802.3af Power-Over-Ethernet
Interface/PWM Controller for Power Devices
DETECTION CURRENT vs.
INPUT VOLTAGEMAX5942A/B toc01
INPUT VOLTAGE (V)
DETECTION CURRENT (mA)642
RDISC = 25.5k�
GND = V+ = V- = OUT
CLASSIFICATION CURRENT
vs. INPUT VOLTAGEMAX5942A/B toc02
INPUT VOLTAGE (V)
CLASSIFICATION CURRENT (mA)201530
CLASS 0
CLASS 1
CLASS 2
CLASS 3
CLASS 4
EFFECTIVE DIFFERENTIAL INPUT
RESISTANCE vs. INPUT VOLTAGEMAX5942A/B toc03
INPUT VOLTAGE (V)
EFFECTIVE DIFFERENTIAL INPUT RESISTANCE (M105
OFFSET CURRENT
vs. INPUT VOLTAGE
MAX5942A/B toc04
INPUT VOLTAGE (V)
OFFSET CURRENT (642910753
NORMALIZED UVLO
vs. TEMPERATURE
MAX5942A/B toc05
TEMPERATURE (°C)
NORMALIZED UVLO3510-15
UVLO = VEE
PGOOD OUTPUT LOW VOLTAGE
vs. CURRENTMAX5942A/B toc06
ISINK (mA)
PGOOD
(mV)1248
PGOOD OUTPUT LOW VOLTAGE
vs. CURRENT
MAX5942A/B toc07
ISINK (mA)
PGOOD
(mV)1284
OUT LEAKAGE CURRENT
vs. TEMPERATURE
MAX5942A/B toc08
OUT LEAKAGE CURRENT (nA)3510-15
VOUT = 67V
INRUSH CURRENT CONTROL
(VIN = 12V)MAX5942A/B toc09
VGATE
5V/div
IINRUSH
100mA/div
VOUT
10V/div
PGOOD
10V/div
1ms/div
Typical Operating Characteristics(VIN= (GND - VEE) = 48V, GATE = PGOOD = PGOOD = OUT = OPEN, UVLO = VEE, VDD= 13V, NDRV floating, TA= TMINto TMAX.
Typical values are at TA= +25°C. All voltages are referenced to VEE(for graphs 1–11 in the Typical Operating Characteristics); all
voltages are referenced to V- (for graphs 12–30 in the Typical Operating Characteristics), unless otherwise noted.
MAX5942A/MAX5942B
IEEE 802.3af Power-Over-Ethernet
Interface/PWM Controller for Power Devices
INRUSH CURRENT CONTROL
(VIN = 48V)MAX5942A/B toc10
VGATE
5V/div
IINRUSH
100mA/div
VOUT
50V/div
PGOOD
50V/div
2ms/div
INRUSH CURRENT CONTROL
(VIN = 67V)MAX5942A/B toc11VGATE
5V/div
IINRUSH
100mA/div
VOUT
50V/div
PGOOD
50V/div
2ms/div
VSS_SHDN vs. TEMPERATURE
(AT THE END OF SOFT-START)
MAX5942 toc12
TEMPERATURE (°C)
VFB = V-
SS_SHDN
(V) (NORMALIZED TO V
REF
= 2.4V)
MAX5942A
MAXIMUM DUTY CYCLE vs. TEMPERATURE
MAX5942 toc14
TEMPERATURE (°C)
MAXIMUM DUTY CYCLE (%)
FB = V-
MAX5942B
MAXIMUM DUTY CYCLE vs. TEMPERATURE
MAX5942 toc15
TEMPERATURE (°C)
MAXIMUM DUTY CYCLE (%)
FB = V-
V+ SUPPLY CURRENT
vs. TEMPERATUREMAX5942 toc16
V+ SUPPLY CURRENT (mA)
TEMPERATURE (°C)
FB = VDD = V-
SOFT-START SOURCE CURRENT
vs. TEMPERATURE
MAX5942 toc17
TEMPERATURE (°C)
SOFT-START SOURCE CURRENT (VDD = FB = SS_SHDN = V-
V+ = 67V
V+ INPUT CURRENT vs.
TEMPERATURE (AFTER STARTUP)
MAX5942 toc18
TEMPERATURE (°C)
V+ INPUT CURRENT (V+ = 67V, VDD = 13V, FB = V-
ypical Operating Characteristics (continued)(VIN= (GND - VEE) = 48V, GATE = PGOOD = PGOOD = OUT = OPEN, UVLO = VEE, VDD= 13V, NDRV floating, TA= TMINto TMAX.
Typical values are at TA= +25°C. All voltages are referenced to VEE(for graphs 1–11 in the Typical Operating Characteristics); all
voltages are referenced to V- (for graphs 12–30 in the Typical Operating Characteristics), unless otherwise noted.
NDRV FREQUENCY
vs. TEMPERATURE
MAX5942 toc13
TEMPERATURE (°C)
NDRV FREQUENCY (kHz)
FB = V-
MAX5942A/MAX5942B
IEEE 802.3af Power-Over-Ethernet
Interface/PWM Controller for Power DevicesCS THRESHOLD VOLTAGE
vs. TEMPERATURE
MAX5942 toc20
TEMPERATURE (°C)
CS THRESHOLD VOLTAGE (V)
FB = V-
NDRV RESISTANCE
vs. TEMPERATUREMAX5942 toc21
NDRV RESISTANCE (
TEMPERATURE (°C)
HIGH-SIDE DRIVER
LOW-SIDE DRIVER
CURRENT-LIMIT DELAY
vs. TEMPERATURE
MAX5942 toc22
TEMPERATURE (°C)
CURRENT-LIMIT DELAY (ns)
FB = V-, 100mV OVERDRIVE ON CS
VSS_SHDN vs. VDD
MAX5942 toc23
VDD (V)
SS_SHDN
(V)
NDRV FREQUENCY vs. VDD
MAX5942 toc24
VDD (V)
NDRV FREQUENCY (kHz)FB = V-
ypical Operating Characteristics (continued)(VIN= (GND - VEE) = 48V, GATE = PGOOD = PGOOD = OUT = OPEN, UVLO = VEE, VDD= 13V, NDRV floating, TA= TMINto TMAX.
Typical values are at TA= +25°C. All voltages are referenced to VEE(for graphs 1–11 in the Typical Operating Characteristics); all
voltages are referenced to V- (for graphs 12–30 in the Typical Operating Characteristics), unless otherwise noted.
V+ SHUTDOWN CURRENT
vs. TEMPERATURE
MAX5942 toc19
TEMPERATURE (°C)
V+ SHUTDOWN CURRENT (V+ = 67V, FB = SS_SHDN = V-
MAX5942A/MAX5942B
IEEE 802.3af Power-Over-Ethernet
Interface/PWM Controller for Power DevicesV+ SUPPLY CURRENT vs. V+ VOLTAGE
(AFTER STARTUP)
MAX5942 toc28
V+ VOLTAGE (V)
V+ LEAKAGE CURRENT (
VDD = 13V, FB = V-
V+ SUPPLY CURRENT vs.
V+ VOLTAGE
MAX5942 toc27
V+ VOLTAGE (V)
V+ SUPPLY CURRENT (mA)
VFB = VDD = V-
VCC VOLTAGE vs. VCC CURRENT
MAX5942 toc29
VCC CURRENT (mA)
VOLTAGE (V)5101520
V+ = +67V, VFB = 4V
VDD = 36V
VDD = 13V
VCC VOLTAGE vs. VCC CURRENT
MAX5942 toc30
VCC CURRENT (mA)
VOLTAGE (V)
VDD = GND, VFB = 4V
V+ = 67V
V+ = 48V
V+ = 36V
V+ = 24V
ypical Operating Characteristics (continued)(VIN= (GND - VEE) = 48V, GATE = PGOOD = PGOOD = OUT = OPEN, UVLO = VEE, VDD= 13V, NDRV floating, TA= TMINto TMAX.
Typical values are at TA= +25°C. All voltages are referenced to VEE(for graphs 1–11 in the Typical Operating Characteristics); all
voltages are referenced to V- (for graphs 12–30 in the Typical Operating Characteristics), unless otherwise noted.
MAX5942B
MAXIMUM DUTY CYCLE vs.VDD
MAX5942 toc25
VDD (V)
MAXIMUM DUTY CYCLE (%)
VFB = 4V, CS = V-
DEVICE POWERED
FROM V+
DEVICE POWERED
FROM VDD
VCC vs. VDD
MAX5942 toc26
VDD (V)
(V)
DEVICE POWERED FROM VDD
DEVICE POWERED
FROM V+
FB = V-
MAX5942A/MAX5942B
IEEE 802.3af Power-Over-Ethernet
Interface/PWM Controller for Power Devices
MAX5942A/MAX5942B
Pin Description
PINNAMEFUNCTION1V+H i g h- V ol tag e S tar tup Inp ut. Refer enced to V - . C onnect d i r ectl y to an i np ut vol tag e r ang e b etw een 18V to 67V .onnects i nter nal l y to a hi g h- vol tag e l i near r eg ul ator that g ener ates V C C d ur i ng star tup .
2VDD
Line Regulator Input. Referenced to V-. VDD is the input to the linear regulator that generates VCC. For
supply voltages less than 36V, connect VDD and V+ to the supply. For supply voltages greater than 36V,
VDD receives its power from the tertiary winding of the transformer and accepts voltages from 13V to 36V.
Bypass VDD to V- with a 4.7µF capacitor.
3FBFixed-Gain Inverting Amplifier Input. Referenced to V-. Connect a voltage-divider from the regulated output
to FB. The noninverting input of the amplifier is referenced to +2.4VSS_SHDN
Soft-Start Timing Capacitor Connection. Referenced to V-. Ramp time to full current limit is approximately
0.45ms/nF. Bypass with a minimum 10nF capacitor to V-. A 2.4V reference voltage appears across the
capacitor. Disable the PWM controller by pulling SS_SHDN below 0.25V.UVLO
Undervoltage Lockout Programming Input for Power Mode. Referenced to VEE. When UVLO is above its
threshold, the device enters the power mode. Connect UVLO to VEE to use the default undervoltage lockout
threshold. Connect UVLO to an external resistor-divider to define a threshold externally. The series
resistance value of the external resistors must add to 25.5kΩ (±1%) and replaces the detection resistor. To
keep the device in undervoltage lockout, pull UVLO between VTH,G,UVLO and VREF,UVLO.RCLClassification Setting. Referenced to VEE. Add a resistor from RCL to VEE to set a PD class (see Table 1).GATE
Gate of Internal N-Channel Power MOSFET. Referenced to VEE . GATE sources 10µA when the device
enters the power mode. Connect an external 100V ceramic capacitor from GATE to VOUT to program the
inrush current. Pull GATE to VEE to turn off the internal MOSFET. The detection and classification functions
operate normally when GATE is pulled to VEE.
8VEEN e g a t i v e I n p u t P o w e r . S o u r ce o f th e i n te g r a t ed i s o l a t i o n N - c h a nn e l p ow e r M O S F E T . C o n n e ct V E E t o
- 4 8V .OUTOutput Voltage. Referenced to VEE. Drain of the integrated isolation N-channel power MOSFET. Connect
OUT to V-.PGOOD
Power-Good Indicator Output, Active High, Open Drain. PGOOD is referenced to OUT. PGOOD goes high
impedance when VOUT is within 1.2V of VEE and when GATE is 5V above VEE. Otherwise, PGOOD is pulled
to OUT (given that VOUT is at least 5V below GND).PGOOD
Power-Good Indicator Output, Active Low, Open Drain. PGOOD is referenced to VEE. PGOOD is pulled to
VEE when VOUT is within 1.2V of VEE and when GATE is 5V above VEE. Otherwise, PGOOD goes high
impedance.GNDGround. Referenced to VEE. GND is the positive input power.CS
Current-Sense Input. Referenced to V-. Turns power switch off if VCS rises above 465mV for cycle-by-cycle
current limiting. CS is also the feedback for the current-mode controller. CS connects to the PWM controller
through a leading-edge blanking circuit.V-Ground. V- is the ground terminal of the PWM controller.NDRVGate Drive. Referenced to V-. Drives a high-voltage external N-channel power MOSFET.VCC
Regulated IC Supply. Referenced to V-. Provides power for MAX5942_. VCC is regulated from VDD during
normal operation and from V+ during startup. Bypass VCC with a 10µF tantalum capacitor in parallel with a
0.1µF ceramic capacitor to V-.
MAX5942A/MAX5942B
IEEE 802.3af Power-Over-Ethernet
Interface/PWM Controller for Power Devices
MAX5942A/MAX5942B
CLASSUSAGERCL (Ω)MAXIMUM POWER USED BY PD (W)Default10k0.44 to 12.95Optional7320.44 to 3.84Optional3923.84 to 6.49Optional2556.49 to 12.95Not allowed178Reserved*
*Class 4 reserved for future use.
Table 1. PD Power Classification/RCLSelection
Detailed DescriptionThe MAX5942A/MAX5942B integrate a complete power
IC for powered devices (PD) in a power-over-ethernet
(PoE) system. The MAX5942A/MAX5942B provide PD
Interface and a compact DC-DC PWM controller suitable
for flyback and forward converters in either isolated or
nonisolated designs.
The MAX5942A/MAX5942B PD interface complies with
the IEEE 802.3af standard, providing the PD with a
detection signature, a classification signature, and an
integrated isolation switch with programmable inrush
current control. These devices also feature power-mode
undervoltage lockout (UVLO) with wide hysteresis, and
power-good status outputs.
An integrated MOSFET provides PD isolation during
detection and classification. The MAX5942A/MAX5942B
guarantee a leakage current offset of less than 10µA dur-
ing the detection phase. A programmable current limit
prevents high inrush current during power-on. The
devices feature power-mode UVLO with wide hysteresis
and long deglitch time to compensate for twisted-pair
cable resistive drop and to ensure glitch-free transition
between detection, classification, and power-on/off
phases. The MAX5942A/MAX5942B provide both active-
high (PGOOD) and active-low (PGOOD) outputs. Both
devices offer an adjustable UVLO threshold with a
default value compliant to the IEEE 802.3af standard.
The MAX5942A/MAX5942B are designed to work with or
without an external diode bridge in front of the PD.
Use the MAX5942A/MAX5942B PWM current-mode con-
trollers to design flyback- or forward-mode power sup-
plies. Current-mode operation simplifies control-loop
design while enhancing loop stability. An internal high-
voltage startup regulator allows the device to connect
directly to the input supply without an external startup
resistor. Current from the internal regulator starts the con-
troller. Once the tertiary winding voltage is established,
the internal regulator is switched off and bias current
for running the PWM controller is derived from the
tertiary winding. The internal oscillator is set to 275kHz
and trimmed to ±10%. This permits the use of small
magnetic components to minimize board space. Both the
MAX5942A and MAX5942B can be used in power sup-
plies providing multiple output voltages. A functional dia-
gram of the PWM controller is shown in Figure 4. Typical
application circuits for forward and flyback topologies are
shown in Figure 5 and Figure 6, respectively.
Powered Device Interface
Operating ModesThe PD front-end section of the MAX5942A/MAX5942B
operates in three different modes: PD detection signa-
ture, PD classification, and PD power, depending on its
input voltage (VIN= GND - VEE). All voltage thresholds
are designed to operate with or without the optional
diode bridge while still complying with the IEEE 802.3af
standard (see Application Circuit 1).
Detection Mode (1.4V ≤VIN≤
10.1V)In detection mode, the power source equipment (PSE)
applies two voltages on VINin the range of 1.4V to
10.1V (1V step minimum), and then records the current
measurements at the two points. The PSE then com-
putes ∆V/∆I to ensure the presence of the 25.5kΩsig-
nature resistor. In this mode, most of the
MAX5942A/MAX5942B internal circuitry is off and the
offset current is less than 10µA.
If the voltage applied to the PD is reversed, install pro-
tection diodes on the input terminal to prevent internal
damage to the MAX5942A/MAX5942B (see Figures 8
and 9). Since the PSE uses a slope technique (∆V/∆I) to
calculate the signature resistance, the DC offset due to
the protection diodes is subtracted and does not affect
the detection process.
Classification Mode (12.6V ≤VIN≤
20V)In the classification mode, the PSE classifies the PD
based on the power consumption required by the PD.
This allows the PSE to efficiently manage power distribu-
tion. The IEEE 802.3af standard defines five different
classes as shown in Table 1. An external resistor (RCL)
connected from RCL to VEEsets the classification current.
MAX5942A/MAX5942B
IEEE 802.3af Power-Over-Ethernet
Interface/PWM Controller for Power Devices
MAX5942A/MAX5942B21.8V
39V
GND
UVLO
GND
UVLO
GATE
MAX5942B
CLASSIFICATIONRCL
PGOOD
6.8VEN
REF
2.4V, 0.8
HYST
2.4V,
REF
200mV
VEE
VGATE, 6V
1.2V, REF
5V, REF
PGOOD
VOUT
Figure 2. Powered Device Interface Block Diagram
CLASS CURRENT SEEN AT VIN (mA)IEEE 802.3af PD CLASSIFICATION
CURRENT SPECIFICATION (mA)CLASSRCL (Ω)VIN* (V)
MINMAXMINMAX10k12.6 to 20040473212.6 to 2091291239212.6 to 201720172025512.6 to 202630263017812.6 to 2036423644
*VINis measured across the MAX5942 input pins (VEEand GND), which does not include the diode bridge voltage drop.
Table 2. Setting Classification Current
