MAX5886EGK ,3.3V, 12-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS InputsApplicationsEPN.C. 1 51 B7NBase Stations: Single/Multicarrier UMTS, N.C. 2 50 B7PN.C. 3 49 B8NCDMA, ..
MAX5886EGK+D ,3.3V, 12-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS InputsApplicationsEPN.C. 1 51 B7NBase Stations: Single/Multicarrier UMTS, N.C. 2 50 B7PN.C. 3 49 B8NCDMA, ..
MAX5887EGK ,3.3V, 14-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS InputsApplicationsEPBase Stations: Single/Multicarrier UMTS, B1P 1 51 B9NB1N 2 50 B9PCDMA, GSM B0P 3 49 B ..
MAX5887EGK+D ,3.3V, 14-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS InputsApplicationsEPBase Stations: Single/Multicarrier UMTS, B1P 1 51 B9NB1N 2 50 B9PCDMA, GSM B0P 3 49 B ..
MAX5888AEGK ,3.3V, 16-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS InputsApplicationsEPB3P 1 51 B11NBase Stations: Single-/Multicarrier UMTS, B3N 2 50 B11PB2P 3 49 B12NCDMA ..
MAX5888AEGK+ ,3.3V, 16-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS Inputsfeatures an integrated 1.2V bandgap ref-♦ 68-Lead QFN-EP Packageerence and control amplifier to ens ..
MAZ8051-H ,Silicon planar typeElectrical characteristics within part numbers T = 25°CaTemperaturecoefficient ofZener voltage Rev ..
MAZ8051-L ,Silicon planar typeElectrical Characteristics T = 25°CaParameter Symbol Conditions Min Typ Max UnitForward voltage V ..
MAZ8051M ,Silicon planar typeZener DiodesMAZ8000 SeriesSilicon planar typeUnit : mmFor stabilization of power supplyKA
MAZ8051-M ,Silicon planar typeElectrical Characteristics T = 25°CaParameter Symbol Conditions Min Typ Max UnitForward voltage V ..
MAZ8056-H ,Silicon planar typeAbsolute Maximum Ratings T = 25°CaMarking SymbolParameter Symbol Rating UnitRefer to the list of t ..
MAZ8056-L ,Silicon planar typeElectrical characteristics within part numbers T = 25°CaTemperaturecoefficient ofZener voltage Rev ..
MAX5886EGK
3.3V, 12-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS Inputs
General DescriptionThe MAX5886 is an advanced, 12-bit, 500Msps digital-
to-analog converter (DAC) designed to meet the
demanding performance requirements of signal synthe-
sis applications found in wireless base stations and
other communications applications. Operating from a
single 3.3V supply, this DAC offers exceptional dyna-
mic performance such as 76dBc spurious-free dynamic
range (SFDR) at fOUT= 30MHz. The DAC supports
update rates of 500Msps and a power dissipation of
only 230mW.
The MAX5886 utilizes a current-steering architecture,
which supports a full-scale output current range of 2mA
to 20mA, and allows a differential output voltage swing
between 0.1VP-Pand 1VP-P.
The MAX5886 features an integrated 1.2V bandgap ref-
erence and control amplifier to ensure high accuracy
and low noise performance. Additionally, a separate
reference input pin enables the user to apply an exter-
nal reference source for optimum flexibility and to
improve gain accuracy.
The digital and clock inputs of the MAX5886 are
designed for differential low-voltage differential signal
(LVDS)-compatible voltage levels. The MAX5886 is
available in a 68-pin QFN package with an exposed
paddle (EP) and is specified for the extended industrial
temperature range (-40°C to +85°C).
Refer to the MAX5887 and MAX5888 data sheets for
pin-compatible 14- and 16-bit versions of the MAX5886.
ApplicationsBase Stations: Single/Multicarrier UMTS,
CDMA, GSM
Communications: LMDS, MMDS, Point-to-Point
Microwave
Digital Signal Synthesis
Automated Test Equipment (ATE)
Instrumentation
Features500Msps Output Update RateSingle 3.3V Supply OperationExcellent SFDR and IMD Performance
SFDR = 76dBc at fOUT= 30MHz (to Nyquist)
IMD = -85dBc at fOUT= 10MHz
ACLR = 70dB at fOUT= 61MHz2mA to 20mA Full-Scale Output CurrentDifferential, LVDS-Compatible Digital and Clock
InputsOn-Chip 1.2V Bandgap ReferenceLow 130mW Power Dissipation68-Pin QFN-EP Package
MAX5886
3.3V, 12-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
Ordering Information19-2776; Rev 2; 12/03
Pin Configuration*EP = Exposed paddle.
MAX5886
3.3V, 12-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(AVDD= DVDD= VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference, VREFIO= 1.25V, differential transformer-coupled
analog output, 50Ωdouble terminated (Figure 7), IOUT= 20mA, TA= TMINto TMAX, unless otherwise noted. ≥+25°C guaranteed by
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVDD, DVDD, VCLK to AGND................................-0.3V to +3.9V
AVDD, DVDD, VCLK to DGND...............................-0.3V to +3.9V
AVDD, DVDD, VCLK to CLKGND...........................-0.3V to +3.9V
AGND, CLKGND to DGND....................................-0.3V to +0.3V
DACREF, REFIO, FSADJ to AGND.............-0.3V to AVDD+ 0.3V
IOUTP, IOUTN to AGND................................-1V to AVDD+ 0.3V
CLKP, CLKN to CLKGND...........................-0.3V to VCLK + 0.3V
B0P/B0N–B11P/B11N, SEL0,
PD to DGND...........................................-0.3V to DVDD+ 0.3V
Continuous Power Dissipation (TA= +70°C)
68-Pin QFN-EP (derate 41.7mW/°C above +70°C)......3333mW
Thermal Resistance (θJA)..............................................+24°C/W
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range ............................-60°C to +150°C
Lead Temperature (soldering, 10s) ................................+300°C
MAX5886
3.3V, 12-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
ELECTRICAL CHARACTERISTICS (continued)(AVDD= DVDD= VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference, VREFIO= 1.25V, differential transformer-coupled
analog output, 50Ωdouble terminated (Figure 7), IOUT= 20mA, TA= TMINto TMAX, unless otherwise noted. ≥+25°C guaranteed by
MAX5886
3.3V, 12-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
ELECTRICAL CHARACTERISTICS (continued)(AVDD= DVDD= VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference, VREFIO= 1.25V, differential transformer-coupled
analog output, 50Ωdouble terminated (Figure 7), IOUT= 20mA, TA= TMINto TMAX, unless otherwise noted. ≥+25°C guaranteed by
MAX5886
3.3V, 12-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
Note 2:This parameter does not include update-rate depending effects of sin(x)/x filtering inherent in the MAX5886.
Note 3:Parameter measured single ended into a 50Ωtermination resistor.
Note 4:Parameter guaranteed by design.
Note 5:A differential clock input slew rate of >100V/µs is required to achieve the specified dynamic performance.
Note 6:Parameter defined as the change in midscale output caused by a ±5% variation in the nominal supply voltage.
ELECTRICAL CHARACTERISTICS (continued)(AVDD= DVDD= VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference, VREFIO= 1.25V, differential transformer-coupled
analog output, 50Ωdouble terminated (Figure 7), IOUT= 20mA, TA= TMINto TMAX, unless otherwise noted. ≥+25°C guaranteed by
Typical Operating Characteristics(AVDD= DVDD= VCLK = 3.3V, external reference, VREFIO= 1.25V, RL= 50Ω, IOUT= 20mA, TA= +25°C, unless otherwise noted.)
MAX5886
3.3V, 12-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
Typical Operating Characteristics (continued)(AVDD= DVDD= VCLK = 3.3V, external reference, VREFIO= 1.25V, RL= 50Ω, IOUT= 20mA, TA= +25°C, unless otherwise noted.)
MAX5886
3.3V, 12-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
MAX5886
3.3V, 12-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
Detailed Description
ArchitectureThe MAX5886 is a high-performance, 12-bit, current-
steering DAC (Figure 1) capable of operating with clock
speeds up to 500MHz. The converter consists of sepa-
rate input and DAC registers, followed by a current-
steering circuit. This circuit is capable of generating
differential full-scale currents in the range of 2mA to
20mA. An internal current-switching network in combi-
nation with external 50Ωtermination resistors convert
the differential output currents into a differential output
voltage with a peak-to-peak output voltage range of
0.1V to 1V. An integrated 1.2V bandgap reference, con-
trol amplifier, and user-selectable external resistor
determine the data converter’s full-scale output range.
Reference Architecture and OperationThe MAX5886 supports operation with the on-chip 1.2V
bandgap reference or an external reference voltage
source. REFIO serves as the input for an external, low-
impedance reference source, and as the output if the
DAC is operating with the internal reference. For stable
operation with the internal reference, REFIO should be
decoupled to AGND with a 0.1µF capacitor. Due to its
limited output drive capability REFIO must be buffered
with an external amplifier, if heavier loading is required.
The MAX5886’s reference circuit (Figure 2) employs a
control amplifier, designed to regulate the full-scale
current IOUTfor the differential current outputs of the
DAC. Configured as a voltage-to-current amplifier, the
output current can be calculated as follows:
IOUT= 32 ✕IREFIO- 1 LSB
IOUT= 32 ✕IREFIO- (IOUT/ 212)
where IREFIOis the reference output current (IREFIO=
VREFIO/RSET) and IOUTis the full-scale output current of
the DAC. Located between FSADJ and DACREF, RSET
is the reference resistor, which determines the amplifi-
er’s output current for the DAC. See Table 1 for a matrix
of different IOUTand RSETselections.
Analog Outputs (IOUTP, IOUTN)The MAX5886 outputs two complementary currents
(IOUTP, IOUTN) that can be operated in a single-ended
or differential configuration. A load resistor can convert
these two output currents into complementary single-
MAX5886
3.3V, 12-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputsended output voltages. The differential voltage existing
between IOUTP and IOUTN can also be converted to a
single-ended voltage using a transformer or a differen-
tial amplifier configuration. If no transformer is used, the
output should have a 50Ωtermination to the analog
ground and a 50Ωresistor between the outputs.
Although not recommended because of additional
noise pickup from the ground plane, for single-ended
operation IOUTP should be selected as the output, with
IOUTN connected to AGND. Note that a single-ended
output configuration has a higher 2nd-order harmonic
distortion at high output frequencies than a differential
output configuration.
Figure 1. Simplified MAX5886 Block Diagram
Table 1. IOUTand RSETSelection Matrix Based on a Typical 1.200V Reference Voltage
