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MAX530AEAG+ |MAX530AEAGMAXIMN/a120avai+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC
MAX530AENG+ |MAX530AENGMAXIMN/a2avai+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC
MAX530BCAG+ |MAX530BCAGMAXIMN/a1avai+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC
MAX530BCNG+MAXIMN/a1178avai+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC


MAX530BCNG+ ,+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DACApplications /MAX530ACNG 0°C to +70°C 24 Narrow Plastic DIP ±2Battery-Powered Data-Conversion Produ ..
MAX530BCWG ,+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DACELECTRICAL CHARACTERISTICS—Single +5V Supply(V = 5V ±10%, V = 0V, AGND = DGND = REFGND = 0V, REFIN ..
MAX530BEAG ,+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DACfeatures but with a serial data interface, referto the MAX531/MAX538/MAX539 data sheet.ERRORPART TE ..
MAX530BENG ,+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DACApplications /MAX530ACNG 0°C to +70°C 24 Narrow Plastic DIP ±2Battery-Powered Data-Conversion Produ ..
MAX530BENG+ ,+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DACapplications. In40µA Shutdown-Mode Currentaddition, the SSOP (Shrink-Small-Outline-Package) mea-sur ..
MAX530BEWG ,+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DACFeatures' Buffered Voltage OutputThe MAX530 is a low-power, 12-bit, voltage-output digi-tal-to-anal ..
MAX975EUA ,Single/Dual / +3V/+5V Dual-Speed Comparators with Auto-Standbyapplications. The operatingHigh Speed with Auto-Standbymodes are as follows: high speed, high speed ..
MAX9761ETI ,Stereo 3W Audio Power Amplifiers with Headphone Drive and Input Muxfeatures include low♦ Low-Power Shutdown Mode: 10µA4mV V (minimizes DC current drain through theOS♦ ..
MAX9766ETJ+T ,750mW Audio Amplifiers with Headphone Amp, Microphone Preamp, and Input Muxapplications that do not require♦ Headphone Sense Inputa headphone amp and includes a stereo BTL sp ..
MAX9768ETG+ ,10W Mono Class D Speaker Amplifier with Volume ControlBlock Diagram3.3V 4.5V TO 14VMAX9768 EMI WITH FERRITE BEAD FILTERS(V = 12V, 1m CABLE, 8Ω LOAD)DD40S ..
MAX9768ETG+T ,10W Mono Class D Speaker Amplifier with Volume ControlELECTRICAL CHARACTERISTICS(V = 12V, V = 3.3V, V = V = 0, V = V , V = 0; Max volume setting; speaker ..
MAX976ESA ,Single/Dual/Quad / SOT23 / Single-Supply / High-Speed / Low-Power Comparatorsfeatures a' 1nA Shutdown Supply Currentlow-power shutdown mode that places the output in ahigh-impe ..


MAX530AEAG+-MAX530AENG+-MAX530BCAG+-MAX530BCNG+
+5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC
_______________General Description
The MAX530 is a low-power, 12-bit, voltage-output digi-
tal-to-analog converter (DAC) that uses single +5V or
dual ±5V supplies. This device has an on-chip voltage
reference plus an output buffer amplifier. Operating cur-
rent is only 250μA from a single +5V supply, making it
ideal for portable and battery-powered applications. In
addition, the SSOP (Shrink-Small-Outline-Package) mea-
sures only 0.1 square inches, using less board area than
an 8-pin DIP. 12-bit resolution is achieved through laser
trimming of the DAC, op amp, and reference. No further
adjustments are necessary.
Internal gain-setting resistors can be used to define a
DAC output voltage range of 0V to +2.048V, 0V to
+4.096V, or ±2.048V. Four-quadrant multiplication is pos-
sible without the use of external resistors or op amps. The
parallel logic inputs are double buffered and are compati-
ble with 4-bit, 8-bit, and 16-bit microprocessors. For DACs
with similar features but with a serial data interface, refer
to the MAX531/MAX538/MAX539 data sheet.
________________________Applications

Battery-Powered Data-Conversion Products
Minimum Component-Count Analog Systems
Digital Offset/Gain Adjustment
Industrial Process Control
Arbitrary Function Generators
Automatic Test Equipment
Microprocessor-Controlled Calibration
____________________________Features
Buffered Voltage OutputInternal 2.048V Voltage ReferenceOperates from Single +5V or Dual ±5V SuppliesLow Power Consumption:
250μA Operating Current
40μA Shutdown-Mode Current
SSOP Package Saves SpaceRelative Accuracy: ±1/2LSB Max Over
Temperature
Guaranteed Monotonic Over Temperature4-Quadrant Multiplication with No External
Components
Power-On ResetDouble-Buffered Parallel Logic Inputs
______________Ordering Information
Ordering Information continued on last page.

* Dice are tested at TA= +25°C, DC parameters only.V, Low-Power, Parallel-Input,
Voltage-Output, 12-Bit DAC
________________________________________________________________Maxim Integrated Products1

D0/D8
VDD
ROFS
RFBD4
D3/D11
D2/D10
D1/D9
TOP VIEW
VOUT
VSS
REFOUT
REFGNDA0
LDAC
CLR
AGND
REFINDGND
DIP/SO/SSOP

MAX530
__________________Pin Configuration

MAX530
REFOUTREFINROFS
2.048V
REFERENCE
POWER-ON
RESET
DAC LATCH
CONTROL
LOGIC
REFGND
AGND
CLR
LDAC
VDD
DGND
VSS
VOUT
RFB
NBL
INPUT
LATCH
D0/D8
D1/D9
D2/D10D4
D3/D11D7
NBM
INPUT
LATCH
NBH
INPUT
LATCH12345671322
12-BIT DAC LATCH
________________Functional Diagram
Call toll free 1-800-998-8800 for free samples or literature.
PARTTEMP. RANGEPIN-PACKAGE

MAX530ACNG0°C to +70°C24 Narrow Plastic DIP
MAX530BCNG0°C to +70°C24 Narrow Plastic DIP
MAX530ACWG0°C to +70°C24 Wide SO
MAX530BCWG0°C to +70°C24 Wide SO
MAX530ACAG0°C to +70°C24 SSOP
MAX530BCAG0°C to +70°C24 SSOP
MAX530BC/D0°C to +70°CDice*±1
±1/2
±1/2
±1/2
ERROR
(LSB)

19-0168; Rev 3; 7/95
V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS

VDDto DGND and VDDto AGND................................-0.3V, +6V
VSSto DGND and VSSto AGND.................................-6V, +0.3V
VDDto VSS...............................................................-0.3V, +12V
AGND to DGND........................................................-0.3V, +0.3V
REFGND to AGND........................................-0.3V, (VDD+ 0.3V)
Digital Input Voltage to DGND ...................-0.3V, (VDD+ 0.3V)
REFIN.................................................(VSS- 0.3V), (VDD+ 0.3V)
REFOUT.............................................(VSS- 0.3V), (VDD+ 0.3V)
REFOUT to REFGND...................................-0.3V, (VDD+ 0.3V)
RFB ...................................................(VSS- 0.3V), (VDD+ 0.3V)
ROFS .................................................(VSS- 0.3V), (VDD+ 0.3V)
VOUT to AGND (Note 1) ..............................................VSS,VDD
Continuous Current, Any Input ........................................±20mA
Continuous Power Dissipation (TA= +70°C)
Narrow Plastic DIP (derate 13.33mW/°C above +70°C)......1067mW
Wide SO (derate 11.76mW/°C above +70°C)..........941mW
SSOP (derate 8.00mW/°C above +70°C)..................640mW
Operating Temperature Ranges:
MAX530_C_ _...................................................0°C to +70°C
MAX530_E_ _................................................-40°C to +85°C
Storage Temperature Range.............................-65°C to +165°C
Lead Temperature (soldering, 10sec ) ..........................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Note 1:
The output may be shorted to VDD, VSS, DGND, or AGND if the continuous package power dissipation and current ratings
are not exceeded. Typical short-circuit currents are 20mA.
ELECTRICAL CHARACTERISTICS—Single +5V Supply

(VDD= 5V ±10%, VSS= 0V, AGND = DGND = REFGND = 0V, REFIN = 2.048V (external), RFB = ROFS = VOUT, CREFOUT= 33μF,= 10kΩ, CL= 100pF, TA= TMINto TMAX, unless otherwise noted.)
CONDITIONS

Bits12NResolution
UNITSMINTYPMAXSYMBOLPARAMETER

VDD= 5V (Note 2)±0.5
Guaranteed monotonicLSB±1DNLDifferential Nonlinearity
LSB±1INLRelative Accuracy
ppm/°C3TCVOS
VDD= 5V
Unipolar Offset
Temperature Coefficient
LSB018VOSUnipolar Offset Error
ppm/°C1Gain-Error Temperature Coefficient
DAC latch = all 1s,
VOUT < VDD- 0.4V
(Note 2)
LSB±1GE
4.5V ≤VDD≤5.5V (Note 3)
Gain Error (Note 2)
VOUT = 2V, load regulation ≤±1LSBkΩ2Resistive Load0VDD- 0.4
4.5V ≤VDD≤5.5V (Note 3)
Output Voltage Range
LSB/V0.41PSRRGain-Error Power-Supply Rejection
LSB/V0.41PSRRUnipolar Offset-Error
Power-Supply Rejection20ISCShort-Circuit Current0.2DC Output Impedance0VDD- 2Reference Input Range
Code dependent (Note 4)pF1050Reference Input Capacitance
Code dependent, minimum at code 555hexkΩ40Reference Input Resistance
(Note 5)dB-80AC Feedthrough
MAX530AC/AE
MAX530BC/BE
MAX530_C/E
MAX530_C/E
STATIC PERFORMANCE
DAC VOLTAGE OUTPUT (VOUT)
REFERENCE INPUT (REFIN)
V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC
_______________________________________________________________________________________3
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)

(VDD= 5V ±10%, VSS= 0V, AGND = DGND = REFGND = 0V, REFIN = 2.048V (external), RFB = ROFS = VOUT, CREFOUT= 33μF,= 10kΩ, CL= 100pF, TA= TMINto TMAX, unless otherwise noted.)
PARAMETER

Temperature Coefficient
SYMBOLMINTYPMAX

UNITS

Reference ToleranceVREFOUT
ppm/°C
DYNAMIC PERFORMANCE2.0172.079
REFERENCE OUTPUT (REFOUT)

Voltage Output Slew Rate
Reference Output ResistanceRREFOUT2Ω
Power-Supply Rejection RatioPSRR300μV/V
0.150.25V/μs
Voltage Output Settling Time
Noise Voltageen400
μVp-p50
Digital Feedthrough5nV-sSignal-to-Noise Plus
Distortion RatioSINAD68dB
DIGITAL INPUTS (D0-D7,

LDAC, CLR, CS, WR, A0, A1)
Logic High InputVIH2.4V
Logic Low InputVIL0.8V
Digital Leakage Current±1μA
Digital Input Capacitance8pF
POWER SUPPLIES
CONDITIONS

MAX530BE
MAX530BC
(Note 8)
4.5V ≤VDD≤5.5V= +25°C
To ±0.5LSB, VOUT = 2V
MAX530AC/AE= VDD, digital inputs all 1s to all 0s
Unity gain (Note 5)
Gain = 2 (Note 5)
VIN= 0V or VDD
2.0242.0482.072TA= +25°C
VDD= 5.0V
0.1Hz to 10kHz
Positive Supply-Voltage RangeVDD(Note 6)4.55.5V
Positive Supply CurrentIDDOutputs unloaded, all digital inputs = 0V or VDD250400μA
SWITCHING CHARACTERISTICS

Address to WRSetuptAWS5ns
Address to WRHoldtAWH5nsto WRSetuptCWS0nsto WRHoldtCWH0ns
Data to WRSetuptDS45ns
Data to WRHoldtDH0ns
WRPulse WidthtWR45ns
LDACPulse WidthtLDAC45ns
CLRPulse WidthtCLR45ns
Internal Power-On Reset
Pulse WidthtPOR(Note 4)1.310μs
MAX530BC/BE
Minimum Required External
CapacitorCMIN3.3μF
ELECTRICAL CHARACTERISTICS—Dual ±5V Supplies
(VDD= 5V ±10%, VSS= -5V ±10%, AGND = DGND = REFGND = 0V, REFIN = 2.048V (external), RFB = ROFS = VOUT,
CREFOUT= 33μF, RL= 10kΩ, CL= 100pF, TA= TMINto TMAX, unless otherwise noted.) V, Low-Power, Parallel-Input,
Voltage-Output, 12-Bit DAC_______________________________________________________________________________________

VDD= 5V, VSS= -5VMAX530AC/AE±0.5
MAX530BC/BE
MAX530_C/E
Guaranteed monotonicLSB±1DNLDifferential Nonlinearity
MAX530_C/E
LSB±1.5INLRelative Accuracy
ppm/°C
CONDITIONS
TCVOS
VDD= 5V, VSS= -5V
Bipolar Offset
Temperature Coefficient
LSB0±8VOSBipolar Offset Error
ppm/°C1TCGain-Error Temperature Coefficient
LSB±1
4.5V ≤VDD≤5.5V
-5.5V ≤VSS≤-4.5V (Note 3)
Gain Error
VOUT = 2V, load regulation ≤±1LSBkΩ2Resistive LoadVSS+ 0.4VDD- 0.4
4.5V ≤VDD≤5.5V, -5.5V ≤VSS≤-4.5V (Note 3)
Output Voltage Range
LSB/V
Bits12NResolution
0.41PSRRGain-Error Power-Supply Rejection
LSB/V0.41PSRRBipolar Offset-Error
Power-Supply Rejection20ISCShort-Circuit Current0.2DC Output ImpedanceVSS+ 2VDD- 2Reference Input Range
UNITSMINTYPMAXSYMBOLPARAMETER

Code dependent (Note 4)pF1050Reference Input Capacitance
Code dependent, minimum at code 555hexkΩ40Reference Input Resistance
(Note 5)dB-80AC Feedthrough
(Note 7)V-5.5-4.5VSSNegative Supply Voltage
Outputs unloaded, all digital inputs = 0V or VDDμA150200ISSNegative Supply Current
Outputs unloaded, all digital inputs = 0V or VDDμA250400IDDPositive Supply Current
(Note 6)V4.55.5VDDPositive Supply Voltage
STATIC PERFORMANCE
DAC VOLTAGE OUTPUT (VOUT)
REFERENCE INPUT (REFIN)
REFERENCE OUTPUT (REFOUT)—Specifications are identical to those under Single +5V Supply
DYNAMIC PERFORMANCE—Specifications are identical to those under Single +5V Supply
DIGITAL INPUTS (D0-D7, LDAC, CLR, CS, WR, A0, A1)—Specifications are identical to those under Single +5V Supply
POWER SUPPLIES
SWITCHING CHARACTERISTICS—Specifications are identical to those under Single +5V Supply
V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC
_______________________________________________________________________________________5

INTEGRAL NONLINEARITY vs.
DIGITAL INPUT CODE (0–11)
AX530-1
DIGITAL INPUT CODE (DECIMAL)
(L
DUAL
SUPPLIES
SINGLE
SUPPLY
INTEGRAL NONLINEARITY vs.
DIGITAL INPUT CODE (11–4095)
5121024153620482560307235844095
(L
DIGITAL INPUT CODE (DECIMAL)
-110101k100k
ANALOG FEEDTHROUGH vs.
FREQUENCY

MAX531-5
FREQUENCY (Hz)
FE
(d
10010k1M
REFIN = 2Vp-p
CODE = ALL 0s,
DUAL SUPPLIES (±5V)
REFERENCE VOLTAGE vs.
TEMPERATURE
MAX531-6
TEMPERATURE (°C)
E V
(V
__________________________________________Typical Operating Characteristics
(TA = +25°C, single supply (+5V), unity gain, code = all 1s, unless otherwise noted).0.8
OUTPUT SINK CAPABILITY vs.
OUTPUT PULL-DOWN VOLTAGE

MAX531-3
OUTPUT PULL-DOWN VOLTAGE (V)
T S
ITY
(m
OUTPUT SOURCE CAPABILITY vs.
OUTPUT PULL-UP VOLTAGE
MAX531-4
OUTPUT PULL-UP VOLTAGE (V)
(m2
Note 2:
In single supply, INL and GE are calculated from code 11 to code 4095.
Note 3:
Zero Code, Bipolar and Gain Error PSRR are input referred specifications. In Unity Gain, the specification is 500μV.
In Gain = 2 and Bipolar modes, the specification is 1mV.
Note 4:
Guaranteed by design.
Note 5:
REFIN = 1kHz, 2.0Vp-p.
Note 6:
For specified performance, VDD= 5V ±10% is guaranteed by PSRR tests.
Note 7:
For specified performance, VSS= -5V ±10% is guaranteed by PSRR tests.
Note 8:
Tested at IOUT= 100μA. The reference can typically source up to 5mA (see Typical Operating Characteristics).
ELECTRICAL CHARACTERISTICS—Dual ±5V Supplies (continued)

(VDD= 5V ±10%, VSS= -5V ±10%, AGND = DGND = REFGND = 0V, REFIN = 2.048V (external), RFB = ROFS = VOUT,
CREFOUT= 33μF, RL= 10kΩ, CL= 100pF, TA= TMINto TMAX, unless otherwise noted.)
V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC_______________________________________________________________________________________
____________________________Typical Operating Characteristics (continued)

(TA = +25°C, single supply (+5V), unity gain, code = all 1s, unless otherwise noted).500
SUPPLY CURRENT vs. REFIN

REFIN (mV)
(m
REFIN = EXTERNAL
REFGND = AGND
REFGND = VDD
MAX530-14
REFERENCE OUTPUT VOLTAGE
vs. REFERENCE LOAD CURRENT
MAX530-15
REFERENCE LOAD CURRENT (mA)
(V
A: DIGITAL INPUTS RISING EDGE,
B: VOUT, NO LOAD, 1V/div
DUAL SUPPLY (±5V)
LDAC = LOW
BIPOLAR CONFIGURATION
VREFIN = 2V
SETTLING TIME (RISING)
s/div
GAIN AND PHASE vs.
FREQUENCY
FREQUENCY (kHz)
(d100
GAIN
PHASE
(G = 2)
(G = 1)
(D
ree
MAX530-10
A: DIGITAL INPUTS FALLING EDGE, 5V/div
B: VOUT, NO LOAD, 1V/div
DUAL SUPPLY (±5V)
LDAC = LOW
BIPOLAR CONFIGURATION
VREFIN = 2V
SETTLING TIME (FALLING)

5µs/div
DIGITAL FEEDTHROUGH

A: D0...D7 = 100kHz, 4Vp-p
B: VOUT, 10mV/div
LDAC = CS = HIGH s/div
SUPPLY CURRENT vs. TEMPERATURE
TEMPERATURE (°C)
(m100
AX530-7
-14100100k
GAIN vs. FREQUENCY

MAX531-8
FREQUENCY (Hz)
(d
-1010k
REFIN = 4Vp-p
DUAL SUPPLIES (±5V)1k100k
AMPLIFIER SIGNAL-TO-NOISE RATIO

MAX531-9
FREQUENCY (Hz)
(d
10k100
REFIN = 4Vp-p
DUAL SUPPLIES (±5V)
V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC
_______________________________________________________________________________________7
______________________________________________________________Pin Description

* This applies to 4 + 4 + 4 input loading mode. See Table 2 for 8 + 4 input loading mode.
D0 (LSB) Input Dta when A0 = 0 and A1 = 1, or D8 Input when A0 = A1= 1*D0/D824
Positive Power Supply (+5V)VDD23
Offset Resistor Pin. Connect to VOUT for G = 1, to AGND for G = 2, or to REFIN for bipolar output.ROFS22
Feedback Pin. Op-amp feedback resistor. Always connect to VOUT.RFB21
Voltage Output. Op-amp buffered DAC output.VOUT20
Negative Power Supply. Usually ground for single-supply or -5V for dual-supply operation.VSS19
Reference Output. Output of the internal 2.048V reference. Tie to REFIN to drive the R-2R DAC.REFOUT18
Reference Ground must be connected to AGND when using the internal reference. Connect to VDD
to disable the internal reference and save power.REFGND17
Load DAC Input (active low). Driving this asynchronous input low transfers the contents of the input
latch to the DAC latch and updates VOUT.LDAC16
Clear (active low). A low on CLRresets the DAC latches to all 0s.CLR15
Analog GroundAGND14
Reference Input. Input for the R-2R DAC. Connect an external reference to this pin or a jumper to
REFOUT (pin 18) to use the internal 2.048V reference.REFIN13
Digital GroundDGND12
Chip Select (active low). Enables addressing and writing to this chip from common bus lines.CS11
Write Input (active low). Used with CSto load data into the input latch selected by A0 and A1.WR10
Address Line A1. Set A0 = A1 = 0 for NBL and NBM, A0 = 0 and A1 = 1 for NBL, A0 = 1 and
A1 = 0 for NBM, or A0 = A1 = 1 for NBH. See Table 2 for complete input latch addressing.A19
Address Line A0. With A1, used to multiplex 4 of 12 data lines to load low (NBL), middle (NBM),
and high (NBH) 4-bit nibbles. (12 bits can also be loaded as 8+4.)A08
D7 Input Dta, or tie to D3 and multiplex when A0 = 1 and A1 = 0*D77
D6 Input Dta, or tie to D2 and multiplex when A0 = 1 and A1 = 0*D66
D5 Input Dta, or tie to D1 and multiplex when A0 = 1 and A1 = 0*D55
D3/D11
D2/D10
D1/D9
NAME

D4 Input Dta, or tie to D0 and multiplex when A0 = 1 and A1 = 0*4
D3 Input Dta, when A0 = 0 and A1 = 1, or D11 (MSB) Input when A0 = A1 =1*3
D2 Input Dta, when A0 = 0 and A1 = 1, or D10 Input when A0 = A1 = 1*2
D1 Input Dta, when A0 = 0 and A1 = 1, or D9 Input when A0 = A1 = 1*1
FUNCTIONPIN
________________Detailed DescriptionThe MAX530 consists of a parallel-input logic interface, a
12-bit R-2R ladder, a reference, and an op amp. The
Functional Diagramshows the control lines and signal
flow through the input data latch to the DAC latch, as well
as the 2.048V reference and output op amp. Total supply
current is typically 250μA with a single +5V supply. This
circuit is ideal for battery-powered, microprocessor-con-
trolled applications where high accuracy, no adjustments,
and minimum component count are key requirements.
R-2R Ladder

The MAX530 uses an “inverted” R-2R ladder network with
a BiCMOS op amp to convert 12-bit digital data to analog
voltage levels. Figure 1 shows a simplified diagram of the
R-2R DAC and op amp. Unlike a standard DAC, the
MAX530 uses an “inverted” ladder network. Normally, the
REFIN pin is the current output of a standard DAC and
would be connected to the summing junction, or virtual
ground, of an op amp. In this standard DAC configura-V, Low-Power, Parallel-Input,
Voltage-Output, 12-Bit DAC_______________________________________________________________________________________
2R2R2R2RRR
MSB
OUTPUT
BUFFER
VOUT
RFB
ROFS
MAX530
REFIN
AGND
DAC LATCH
R = 80kW
LSB
NBL
INPUT
LATCH
NBH
INPUT
LATCH
NBM
INPUT
LATCH
D0/D8
D1/D9
D2/D10D4
D3/D11D7
2.048V
REFOUT
REFGND
*SHOWN FOR ALL 1s
LSBMSBCLR
Figure 1. Simplified MAX530 DAC Circuit
tion, however, the output voltage would be the inverse of
the reference voltage. The MAX530’s topology makes the
ladder output voltage the same polarity as the reference
input, which makes the device suitable for single-supply
operation. The BiCMOS op amp is then used to buffer,
invert, or amplify the ladder signal.
Ladder resistors are nominally 80kΩto conserve power
and are laser trimmed for gain and linearity. The input
impedance at REFIN is code dependent. When the DAC
register is all 0s, all rungs of the ladder are grounded
and REFIN is open or no load. Maximum loading (mini-
mum REFIN impedance) occurs at code 010101... or
555hex. Minimum reference input impedance at this
code is guaranteed to be not less than 40kΩ.
The REFIN and REFOUT pins allow the user to choose
between driving the R-2R ladder with the on-chip refer-
ence or an external reference. REFIN may be below ana-
log ground when using dual supplies. See the External
Reference andFour-Quadrant Multiplicationsections for
more information.
Internal Reference

The on-chip reference is laser trimmed to generate
2.048V at REFOUT. The output stage can source and
sink current so REFOUT can settle to the correct volt-
age quickly in response to code-dependent loading
changes. Typically source current is 5mA and sink cur-
rent is 100μA.
REFOUT connects the internal reference to the R-2R
DAC ladder at REFIN. The R-2R ladder draws 50μA
maximum load current. If any other connection is made
to REFOUT, ensure that the total load current is less
than 100μA to avoid gain errors.
A separate REFGND pin is provided to isolate refer-
ence currents from other analog and digital ground
currents. To achieve specified noise performance, con-
nect a 33μF capacitor from REFOUT to REFGND (see
Figure 2). Using smaller capacitance values increases
noise, and values less than 3.3μF may compromise the
reference’s stability. For applications requiring the low-
est noise, insert a buffered RC filter between REFOUT
and REFIN. When using the internal reference,
REFGND must be connected to AGND. In applications
not requiring the internal reference, connect REFGND
to VDD, which shuts down the reference and saves typ-
ically 100μA of VDDsupply current.
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