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MAX503CNG+ |MAX503CNGMAXIMN/a2500avai5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC
MAX503CWG+ |MAX503CWGMAXIMN/a65avai5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC
MAX503EAG+MAXIMN/a10avai5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC


MAX503CNG+ ,5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DACApplicationsMAX503CNG 0°C to +70°C 24 Narrow Plastic DIPBattery-Powered Data-Conversion ProductsMAX ..
MAX503CWG ,5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DACApplicationsMAX503CNG 0°C to +70°C 24 Narrow Plastic DIPBattery-Powered Data-Conversion ProductsMAX ..
MAX503CWG+ ,5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DACELECTRICAL CHARACTERISTICS—Single +5V Supply(V = 5V, V = 0V, AGND = DGND = REFGND = 0V, REFIN = 2.0 ..
MAX503EAG ,5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DACELECTRICAL CHARACTERISTICS—Single +5V Supply(V = 5V, V = 0V, AGND = DGND = REFGND = 0V, REFIN = 2.0 ..
MAX503EAG+ ,5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DACapplications. In addition, the shrink small-40μA Shutdown-Mode Currentoutline package (SSOP) measur ..
MAX503EWG ,5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DACFeatures' Buffered Voltage OutputThe MAX503 is a low-power, 10-bit, voltage-output digital-to-analo ..
MAX922CUA+T ,Ultra Low-Power, Single/Dual-Supply ComparatorsGeneral Description ________
MAX922EPA ,Ultra Low-Power, Single/Dual-Supply Comparatorsapplications, theDual ±1.25V to ±5.5VMAX921–MAX924 operate from a single +2.5V to +11V' Input Volta ..
MAX922ESA ,Ultra Low-Power, Single/Dual-Supply ComparatorsFeaturesThe MAX921–MAX924 single, dual, and quad micro-' µMAX Package—Smallest 8-Pin SOpower, low-v ..
MAX922ESA ,Ultra Low-Power, Single/Dual-Supply ComparatorsELECTRICAL CHARACTERISTICS: 5V OPERATION (continued)(V+ = 5V, V- = GND = 0V, T = T to T , unless ot ..
MAX922ESA+T ,Ultra Low-Power, Single/Dual-Supply ComparatorsGeneral Description ________
MAX9234EUM+TD ,Hot-Swappable, 21-Bit, DC-Balanced LVDS DeserializersApplicationsOrdering InformationAutomotive Navigation SystemsAutomotive DVD Entertainment SystemsPI ..


MAX503CNG+-MAX503CWG+-MAX503EAG+
5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC
_______________General Description
The MAX503 is a low-power, 10-bit, voltage-output digital-
to-analog converter (DAC) that uses single 5V or dual ±5V
supplies. This device has an internal voltage reference plus
an output buffer amplifier. Operating current is only 250μA
from a single 5V supply, making it ideal for portable and
battery-powered applications. In addition, the shrink small-
outline package (SSOP) measures only 0.1 square inches,
using less board area than an 8-pin DIP. 10-bit resolution is
achieved through laser trimming of the DAC, op amp, and
reference. No further adjustments are necessary.
Internal gain-setting resistors can be used to define a DAC
output voltage range of 0V to +2.048V, 0V to +4.096V, or
±2.048V. Four-quadrant multiplication is possible without
the use of external resistors or op amps. The parallel logic
inputs are double buffered and are compatible with 4-bit, 8-
bit, and 16-bit microprocessors. For a hardware and soft-
ware compatible 12-bit upgrade, refer to the MAX530 data
sheet. For DACs with similar features but with a serial data
interface, refer to the MAX504/MAX515 data sheet.
________________________Applications

Battery-Powered Data-Conversion Products
Minimum Component-Count Analog Systems
Digital Offset/Gain Adjustment
Industrial Process Control
Arbitrary Function Generators
Automatic Test Equipment
Microprocessor-Controlled Calibration
____________________________Features
Buffered Voltage OutputInternal 2.048V Voltage ReferenceOperates from Single 5V or Dual ±5V SuppliesLow Power Consumption:
250μA Operating Current
40μA Shutdown-Mode Current
SSOP Package Saves SpaceRelative Accuracy: ±1/2LSB Max Over
Temperature
Guaranteed Monotonic Over Temperature4-Quadrant Multiplication with No External
Components
Power-On ResetDouble-Buffered Parallel Logic Inputs
______________Ordering InformationV, Low-Power, Parallel-Input,
Voltage-Output, 10-Bit DAC
________________________________________________________________Maxim Integrated Products1

D6/S0
VDD
ROFS
RFBD2
D9/D1
D8/D0
D7/S1
TOP VIEW
VOUT
VSS
REFOUT
REFGNDA0
LDAC
CLR
AGND
REFINDGND
DIP/SO/SSOP

MAX503
__________________Pin Configuration

MAX503
REFOUTREFINROFS
2.048V
REFERENCE
POWER-ON
RESET
DAC
CONTROL
LOGIC
REFGND
AGND
CLR
LDAC
VDD
DGND
VSS
VOUT
RFB
DAC LATCH
NBL
INPUT
LATCH
D6/S0
D7/S1
D8/D0D2
D9/D1D5
NBM
INPUT
LATCH
NBH
INPUT
LATCH12345671322
10-BIT DAC LATCH
________________Functional Diagram
Call toll free 1-800-998-8800 for free samples or literature.
PARTTEMP. RANGEPIN-PACKAGE

MAX503CNG0°C to +70°C24 Narrow Plastic DIP
MAX503CWG0°C to +70°C24 Wide SO
MAX503CAG0°C to +70°C24 SSOP
19-0279; Rev 0; 8/94
Refer to the MAX530 for military temperature or die equivalents.
MAX503ENG-40°C to +85°C24 Narrow Plastic DIP
MAX503EWG-40°C to +85°C24 Wide SO
MAX503EAG-40°C to +85°C24 SSOP
V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS

VDDto DGND and VDDto AGND................................-0.3V, +6V
VSSto DGND and VSSto AGND.................................-6V, +0.3V
VDDto VSS...............................................................-0.3V, +12V
AGND to DGND........................................................-0.3V, +0.3V
REFGND to AGND.........................................-0.3V, (VDD+ 0.3V)
Digital Input Voltage to DGND ....................-0.3V, (VDD+ 0.3V)
REFIN..................................................(VSS- 0.3V), (VDD+ 0.3V)
REFOUT..............................................(VSS- 0.3V), (VDD+ 0.3V)
REFOUT to REFGND....................................-0.3V, (VDD+ 0.3V)
RFB ....................................................(VSS- 0.3V), (VDD+ 0.3V)
ROFS ..................................................(VSS- 0.3V), (VDD+ 0.3V)
VOUT to AGND (Note 1) ..............................................VSS,VDD
Continuous Current, Any Input ........................................±20mA
Continuous Power Dissipation (TA= +70°C)
Narrow Plastic DIP (derate 13.33mW/°C above +70°C)...1067mW
Wide SO (derate 11.76mW/°C above +70°C)...............941mW
SSOP (derate 8.00mW/°C above +70°C)......................640mW
Operating Temperature Ranges
MAX503C_G.........................................................0°C to +70°C
MAX503E_G......................................................-40°C to +85°C
Storage Temperature Range.............................-65°C to +165°C
Lead Temperature (soldering, 10sec) ...........................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PARAMETERSYMBOLMINTYPMAXUNITS

Differential NonlinearityDNL±1LSB
Unipolar Offset ErrorVOS00.253LSB
Unipolar Offset
Temperature CoefficientTCVOS3ppm/°C
Unipolar Offset-Error
Supply RejectionPSRR0.1LSB/V
Resolution
STATIC PERFORMANCE
10Bits
Gain-Error Temperature Coefficient1ppm/°C
Gain-Error Power-Supply RejectionPSRR0.1LSB/V
DAC VOLTAGE OUTPUT (VOUT)

Output Voltage Range0VDD- 0.4V
Resistive Load2kΩ
DC Output Impedance0.2Ω
Short-Circuit CurrentISC12mA
REFERENCE INPUT (REFIN)

Reference Input Range0VDD - 2V
Reference Input Resistance40kΩ
Reference Input Capacitance1050pF
AC Feedthrough-80dB
CONDITIONS

Guaranteed monotonic
4.5V ≤VDD≤5.5V
4.5V ≤VDD≤5.5V
VOUT = 2V, load regulation ≤±0.5LSB
Code dependent, minimum at code 0101...
Code dependent (Note 3)
(Note 4)
Gain Error (Note 2)GELSB±1
Note 1:
The output may be shorted to VDD, VSS, DGND, or AGND if the continuous package power dissipation and current ratings
are not exceeded. Typical short-circuit currents are 20mA.
ELECTRICAL CHARACTERISTICS—Single +5V Supply

(VDD= 5V, VSS= 0V, AGND = DGND = REFGND = 0V, REFIN = 2.048V (external), RFB = ROFS = VOUT, CREFOUT= 33μF,= 10kΩ, CL= 100pF, TA= TMINto TMAX, unless otherwise noted.)
DAC latch = all 1s,
VOUT < VDD- 0.4V (Note 2)
Relative AccuracyINL±0.5LSB(Note 2)
V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC
_______________________________________________________________________________________3
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)

(VDD= 5V, VSS= 0V, AGND = DGND = REFGND = 0V, REFIN = 2.048V (external), RFB = ROFS = VOUT, CREFOUT= 33μF, = 10kΩ, CL= 100pF, TA= TMINto TMAX, unless otherwise noted.)
PARAMETER

Temperature Coefficient
SYMBOLMINTYPMAXUNITS

Reference ToleranceVREFOUT
ppm/°C
DYNAMIC PERFORMANCE2.0152.081
REFERENCE OUTPUT (REFOUT)

Voltage Output Slew Rate
Reference Output ResistanceRREFOUT2Ω
Power-Supply Rejection RatioPSRR200μV/V
0.150.25V/μs
Voltage Output Settling Time
Noise Voltageen400
μVp-p
Digital Feedthrough5nV-sSignal-to-Noise Plus
Distortion RatioSINAD68dB
DIGITAL INPUTS (S0, S1, D0–D9, LDAC, CLR, CS, WR, A0, A1)

Logic High InputVIH2.4V
Logic Low InputVIL0.8V
Digital Leakage Current±1μA
Digital Input Capacitance8pF
POWER SUPPLIES
CONDITIONS

(Note 5)
4.5V ≤VDD≤5.5V= +25°C
To ±0.5LSB, VOUT = 2V= VDD, digital inputs all 1s to all 0s
Unity gain (Note 4)
Gain = 2 (Note 4)
VIN= 0V or VDD
2.0242.0482.072TA= +25°C
0.1Hz to 10kHz
Positive Supply-Voltage RangeVDD4.55.5V
Positive Supply CurrentIDDOutputs unloaded, all digital inputs = 0V or VDD250400μA
SWITCHING CHARACTERISTICS

Address to WRSetuptAWS5ns
Address to WRHoldtAWH5nsto WRSetuptCWS0nsto WRHoldtCWH0ns
Data to WRSetuptDS45ns
Data to WRHoldtDH0ns
WRPulse WidthtWR45ns
LDACPulse WidthtLDAC45ns
CLRPulse WidthtCLR45ns
Internal Power-On Reset
Pulse WidthtPOR(Note 3)1.310μs
Required External CapacitorCREFOUT3.3μF
MAX503E
MAX503C
ELECTRICAL CHARACTERISTICS—Dual ±5V Supplies
(VDD= 5V, VSS= -5V, AGND = DGND = REFGND = 0V, REFIN = 2.048V (external), RFB = ROFS = VOUT, CREFOUT= 33μF, = 10kΩ, CL= 100pF, TA= TMINto TMAX, unless otherwise noted.)
Note 2:
In single supply, INL and GE are calculated from code 3 to code 1023 (code excludes S0 and S1).
Note 3:
Guaranteed by design.
Note 4:
REFIN = 1kHz, 2.0Vp-p.
Note 5:
Tested at IOUT= 100μA. The reference can typically source up to 5mA (see Typical Operating Characteristics).V, Low-Power, Parallel-Input,
Voltage-Output, 10-Bit DAC_______________________________________________________________________________________
SWITCHING CHARACTERISTICS—Specifications are identical to those under Single +5V Supply
POWER SUPPLIES

Positive Supply VoltageVDD4.55.5V
Negative Supply VoltageVSS-5.50V
Positive Supply CurrentIDDOutputs unloaded, all digital inputs = 0V or VDD250400μA
Negative Supply CurrentISSOutputs unloaded, all digital inputs = 0V or VDD150200μA
PARAMETER
DAC VOLTAGE OUTPUT (VOUT)
SYMBOLMINTYPMAX
DYNAMIC PERFORMANCE—Specifications are identical to those under Single +5V Supply
DIGITAL INPUTS (S0, S1, D0–D9, LDAC, CLR, CS, WR, A0, A1)—Specifications are identical to those under Single +5V Supply
UNITS

Bipolar Offset ErrorVOS±3
Output Voltage Range
LSB
Differential Nonlinearity
VSS+ 0.4VDD- 0.4
DNL±1LSB
ResolutionN
Bipolar Offset-Error
Power-Supply Rejection
Resistive Load
Bipolar Offset
Temperature CoefficientTCVOS3ppm/°CkΩ
DC Output Impedance
Gain-Error Temperature CoefficientTC1
ppm/°C
Gain-Error Power-Supply Rejection
PSRR0.1LSB/V
Short-Circuit CurrentISC20mA
REFERENCE INPUT (REFIN)

REFERENCE OUTPUT (REFOUT)—Specifications are identical to those under Single +5V Supply

Reference Input Range
STATIC PERFORMANCE

VSS+ 2VDD - 2V
Reference Input Resistance40kΩ
Reference Input Capacitance
Bits
PSRR50pF
AC Feedthrough-80dB
0.1LSB/V
CONDITIONS

Guaranteed monotonic
4.5V ≤VDD≤5.5V, -5.5V ≤VSS ≤-4.5V
VOUT = 2V, load regulation ≤±0.5LSB
4.5V ≤VDD≤5.5V, -5.5V ≤VSS≤-4.5V
Code dependent, minimum at code 0101...
Code dependent (Note 3)
(Note 4)
Gain Error±1LSB
Relative AccuracyINL+0.5LSB
V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC
_______________________________________________________________________________________5
0.8
OUTPUT SINK CAPABILITY vs.
OUTPUT PULL-DOWN VOLTAGE

MAX503-1
OUTPUT PULL-DOWN VOLTAGE (V)
(m
OUTPUT SOURCE CAPABILITY vs.
OUTPUT PULL-UP VOLTAGE
MAX503-2
OUTPUT PULL-UP VOLTAGE (V)
(m2
SUPPLY CURRENT vs. TEMPERATURE
TEMPERATURE (°C)
(m100
MAX503-5
-14100100k
GAIN vs. FREQUENCY

MAX503-6
FREQUENCY (Hz)
(dB
-1010k
REFIN = 4Vp-p
DUAL SUPPLIES (±5V)
__________________________________________Typical Operating Characteristics

(Single +5V supply, unity gain, code = all 1s, TA = +25°C, unless otherwise noted.)
-110101k100k
ANALOG FEEDTHROUGH vs.
FREQUENCY

AX503-3
FREQUENCY (Hz)
(d
10010k1M
REFIN = 2Vp-p
CODE = ALL 0s,
DUAL SUPPLIES (±5V)
REFERENCE VOLTAGE vs.
TEMPERATURE
AX503-4
TEMPERATURE (°C)
(V
-202080100400-401401k100k
AMPLIFIER SIGNAL-TO-NOISE RATIO

MAX503-7
FREQUENCY (Hz)
(d
10k100
REFIN = 4Vp-p
DUAL SUPPLIES (±5V)
GAIN AND PHASE vs.
FREQUENCY
FREQUENCY (kHz)
(d100
GAIN
PHASE
(G = 2)
(G = 1)
IFT
(D
MAX503-8
V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC_______________________________________________________________________________________
____________________________Typical Operating Characteristics (continued)

(Single +5V supply, unity gain, code = all 1s, TA = +25°C, unless otherwise noted.)
DIGITAL FEEDTHROUGH

A: S0, S1, D0–D9 = 100kHz, 4Vp-p
B: VOUT, 10mV/div
LDAC = CS = HIGH s/div
A: DIGITAL INPUTS RISING EDGE,
B: VOUT, NO LOAD, 1V/div
DUAL SUPPLY (±5V)
LDAC = LOW
BIPOLAR CONFIGURATION
VREFIN = 2V
SETTLING TIME (RISING)
s/div
REFERENCE OUTPUT VOLTAGE
vs. REFERENCE LOAD CURRENT
AX503-10
REFERENCE LOAD CURRENT (mA)
E O
(V
A: DIGITAL INPUTS FALLING EDGE, 5V/div
B: VOUT, NO LOAD, 1V/div
DUAL SUPPLY (±5V)
LDAC = LOW
BIPOLAR CONFIGURATION
VREFIN = 2V
SETTLING TIME (FALLING)

5µs/div500
SUPPLY CURRENT vs. REFIN

REFIN (mV)
(m
EXTERNAL REFERENCE
REFGND = AGND
REFGND = VDD
MAX503-9
V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC
_______________________________________________________________________________________7
PINFUNCTION
D7 input when A0 = A1 = 1, or S1 input when A0 = 0 and A1 = 1. Always set S1 to 0.*D8 input when A0 = A1 = 1, or D0 input when A0 = 0 and A1 = 1.*D9 input when A0 = A1 = 1, or D1 input when A0 = 0 and A1 = 1.*D2 Input Data, or tie to S0 and multiplex when A0 = 1 and A1 = 0.*
______________________________________________________________Pin Description
NAME

D7/S1
D8/D0
D9/D1D3D3 Input Data, or tie to S1 and multiplex when A0 = 1 and A1 = 0.*D4D4 Input Data, or tie to D0 and multiplex when A0 = 1 and A1 = 0.*D5D5 Input Data, or tie to D1 and multiplex when A0 = 1 and A1 = 0.*A0Address Line A0. With A1, used to multiplex 4 of 12 data lines to load low (NBL), middle (NBM),
and high (NBH) 4-bit nibbles. (12 bits can also be loaded as 8+4.)A1Address Line A1. Set A0 = A1 = 0 for NBL and NBM, A0 = 0 and A1 = 1 for NBL, A0 = 1 and A1 =
0 for NBM, or A0 = A1 = 1 for NBH. See Table 2 for complete input latch addressing.WRWrite Input (active low). Used with CSto load data into the input latch selected by A0 and A1.CSChip Select (active low). Enables addressing and writing to this chip from common bus lines.DGNDDigital GroundREFINReference Input. Input for the R-2R DAC. Connect an external reference to this pin or a jumper to
REFOUT (pin 18) to use the internal 2.048V reference.AGNDAnalog GroundCLRClear (active low). A low on CLRresets the DAC latches to all 0s.LDACLoad DAC Input (active low). Driving this asynchronous input low transfers the contents of the input
latch to the DAC latch and updates VOUT.REFGNDReference Ground must be connected to AGND when using the internal reference. Connect to VDD
to disable the internal reference and save power.REFOUTReference Output. Output of the internal 2.048V reference. Tie to REFIN to drive the R-2R DAC.VSSNegative Power Supply. Usually ground for single-supply or -5V for dual-supply operation.VOUTVoltage Output. Op-amp buffered DAC output.RFBFeedback Pin. Op-amp feedback resistor. Always connect to VOUT.ROFSOffset Resistor Pin. Connect to VOUT for G = 1, to AGND for G = 2, or to REFIN for bipolar output.VDDPositive Power Supply (+5V)D6/S0D6 input when A0 = A1 = 1, or S0 input when A0 = 0 and A1 = 1. Always set S0 to 0.*
* This applies to 4 + 4 + 4 input loading mode. See Table 2 for 8 + 4 input loading mode.
________________Detailed DescriptionThe MAX503 consists of a parallel-input logic interface, a
10-bit R-2R ladder, a reference, and an op amp. The
Functional Diagramshows the control lines and signal
flow through the input data latch to the DAC latch, as well
as the 2.048V reference and output op amp. Total supply
current is typically 250μA with a single +5V supply. This
circuit is ideal for battery-powered, microprocessor-con-
trolled applications where high accuracy, no adjustments,
and minimum component count are key requirements.
R-2R Ladder

The MAX503 uses an “inverted” R-2R ladder network with
a BiCMOS op amp to convert 10-bit digital data to analog
voltage levels. Figure 1 shows a simplified diagram of the
R-2R DAC and op amp. Unlike a standard DAC, the
MAX503 uses an “inverted” ladder network. Normally, the
REFIN pin is the current output of a standard DAC and
would be connected to the summing junction, or virtual
ground, of an op amp. In this standard DAC configura-
tion, however, the output voltage would be the inverse ofV, Low-Power, Parallel-Input,
Voltage-Output, 10-Bit DAC_______________________________________________________________________________________
2R2R2R2RRR
MSB
OUTPUT
BUFFER
VOUT
RFB
ROFS
MAX503
REFIN
AGND
DAC LATCH
R = 80kW
LSB
NBL
INPUT
LATCH
NBH
INPUT
LATCH
NBM
INPUT
LATCH
D6/S0
D7/S1
D8/D0D2
D9/D1D5
2.048V
REFOUT
REFGND
*SHOWN FOR ALL 1s
LSBMSBCLR
Figure 1. Simplified MAX503 DAC Circuit
the reference voltage. The MAX503’s topology makes the
ladder output voltage the same polarity as the reference
input, making the device suitable for single-supply oper-
ation. The BiCMOS op amp is then used to buffer, invert,
or amplify the ladder signal.
Ladder resistors are nominally 80kΩto conserve power
and are laser trimmed for gain and linearity. The input
impedance at REFIN is code dependent. When the DAC
register is all 0s, all rungs of the ladder are grounded
and REFIN is open or no load. Maximum loading (mini-
mum REFIN impedance) occurs at code 010101....
Minimum reference input impedance at this code is guar-
anteed to be not less than 40kΩ.
The REFIN and REFOUT pins allow the user to choose
between driving the R-2R ladder with the on-chip refer-
ence or an external reference. REFIN may be below ana-
log ground when using dual supplies. See the External
Reference andFour-Quadrant Multiplicationsections for
more information.
Internal Reference

The on-chip reference is laser trimmed to generate
2.048V at REFOUT. The output stage can source and
sink current so REFOUT can settle to the correct volt-
age quickly in response to code-dependent loading
changes. Typically, source current is 5mA and sink
current is 100μA.
REFOUT connects the internal reference to the R-2R
DAC ladder at REFIN. The R-2R ladder draws 50μA
maximum load current. If any other connection is made
to REFOUT, ensure that the total load current is less
than 100μA to avoid gain errors.
A separate REFGND pin is provided to isolate refer-
ence currents from other analog and digital ground
currents. To achieve specified noise performance, con-
nect a 33μF capacitor from REFOUT to REFGND (see
Figure 2). Using smaller capacitance values increases
noise, and values less than 3.3μF may compromise the
reference’s stability. For applications requiring the low-
est noise, insert a buffered RC filter between REFOUT
and REFIN. When using the internal reference,
REFGND must be connected to AGND. In applications
not requiring the internal reference, connect REFGND
to VDD, which shuts down the reference. This saves
typically 100μA of VDDsupply current and eliminates
the need for CREFOUT.
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