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MAX5039EUA-MAX5039EUA+T
Voltage-Tracking Controllers for PowerPC, DSPs, and ASICs
General DescriptionThe MAX5039/MAX5040 provide intelligent control to
power systems where two supply voltages need track-
ing. These cases include PowerPC®, DSP, and ASIC
systems, which require a lower CORE voltage supply
and a higher I/O voltage supply.
The MAX5039/MAX5040 control the output voltage of
the CORE and I/O supplies during power-up, power-
down, and brownout situations. They ensure that the
two power supplies rise or fall at the same rate, limiting
the voltage difference between the CORE and I/O sup-
plies. This eliminates stresses on the processor. The
MAX5039/MAX5040 shut down both the CORE and I/O
supplies if either one is shorted or otherwise fails to
come up.
The MAX5040 provides a power-OK (POK) signal that
signals the processor if the CORE supply, the I/O sup-
ply, and the system bus supply (VCC) are above their
respective specified levels. The MAX5039/MAX5040
are targeted for nominal bus VCCvoltages from 4V to
5.5V. The MAX5039/MAX5040 work with CORE volt-
ages ranging from 800mV to about 3V (depending on
the gate-to-source turn-on threshold of the external N-
channel MOSFET) and I/O voltages ranging from
VCOREto 4V. The MAX5039/MAX5040 provide tracking
control of the I/O and CORE voltages using a single
external N-channel MOSFET connected across them.
This MOSFET is not in series with the power paths and
does not dissipate any additional power during normal
system operation. The external MOSFET is only on for
brief periods during power-up/power-down cycling so a
low-cost, small-size MOSFET with a rating of 1/4th to
1/8th of the normal supply current is suitable.
The MAX5039/MAX5040 are offered in space-saving
8-pin µMAX and 10-pin µMAX packages, respectively.
ApplicationsPowerPC Systems
Embedded DSPs and ASICs
Embedded 16- and 32-Bit Controller Systems
Telecom/Base Station/Networking
FeaturesProvide Tracking of Two External Power Supplies
During Power-Up and Power-DownCompatible with a Wide Range of External Power
Supplies Independent of Output PowerBus Voltage Undervoltage Lockout Enables/
Disables COREand I/O Supplies TogetherDetect Short Circuit on VCOREand VI/O, Disable
COREand I/O Supplies in Either CaseOutput Undervoltage MonitoringPOK Status (MAX5040)Operating VCCSupply Voltage Range: 2.5V to 5.5VI/O Voltage Range: VCOREto 4VCOREVoltage Range: 0.8V to VI/O
MAX5039/MAX5040
Voltage-Tracking Controllers for
PowerPC, DSPs, and ASICs
Ordering InformationPowerPC is a registered trademark of IBM Corp.
Power-On and Power-Off With and Without Voltage Tracking
Typical Operating Circuit and Pin Configurations appear at
end of data sheet.
MAX5039/MAX5040
Voltage-Tracking Controllers for
PowerPC, DSPs, and ASICs
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VCC= 2.5V to 5.5V, VUVLO= 2V, VCORE= 1.8V, VI/O= 2.5V, VCORE_FB= 1V, VI/O_SENSE= 2V (MAX5040 only), = -40°C to +85°C, unless otherwise specified. Typical values are at VCC= 5V, TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All Voltages Referenced to GND)
VCC, NDRV, SDO, and POK ..................................-0.3V to +14V
CORE_FB, UVLO, I/O_SENSE, I/O, CORE..........-0.3V to +4.25V
All Pins to VCC(except POK).............................................+0.3V
NDRV Continuous Current .................................................50mA
Continuous Current, All Other Pins.....................................20mA
Continuous Power Dissipation (TA= +70°C)
8-Pin µMAX (derate 4.5mW/°C above +70°C).............362mW
10-Pin µMAX (derate 5.6mW/°C above +70°C)...........444mW
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
MAX5039/MAX5040
Voltage-Tracking Controllers for
PowerPC, DSPs, and ASICs
ELECTRICAL CHARACTERISTICS (continued)(VCC= 2.5V to 5.5V, VUVLO= 2V, VCORE= 1.8V, VI/O= 2.5V, VCORE_FB= 1V, VI/O_SENSE= 2V (MAX5040 only), = -40°C to +85°C, unless otherwise specified. Typical values are at VCC= 5V, TA= +25°C.)
Note 1:VCCslew-rate limited to 30V/µs.
Note 2:SDOautomatically goes low when the UVLO pin drops below its threshold (or VCCdrops below 2.5V). SDOremains low as
VCCfalls. For some VCCbelow VCCLOSDOmay float.
Note 3:This undervoltage lockout disables the MAX5039/MAX5040 at VCCvoltages below which the device cannot effectively oper-
ate. When VCCdrops below the threshold, SDOgoes low, the bleeder turns off, and POK is high impedance.
Note 4:In order to regulate correctly, VCCmust be higher than VCOREplus the turn-on voltage of the external N-channel MOSFET.
Note 5:I/O and CORE valid mean the voltages on these pins have settled within their target specifications for normal operation.
Note 6:CORE and I/O supplies rise and fall rates must be limited to less than 6.6V/µs.
Note 7:POK does not deassert for glitches less than tPOK.
Note 8:A fault condition is latched when either of the two following conditions maintains for longer than tFAULT:
VCORE_FB< VC_REF(i.e., VCOREis less than its set point)
VI/O< VCORE
A FAULT condition forces SDOand POK (MAX5040 only) low. CORE discharges to GND through 20Ωwhile VCC> 2.5V.
Cycle UVLO or VCClow, then high, to clear a FAULT.
MAX5039/MAX5040
Voltage-Tracking Controllers for
PowerPC, DSPs, and ASICs
Typical Operating Characteristics(VCC= 5V, VCORE= 1.8V, VI/O= 3.3V, TA= +25°C, unless otherwise specified.)
MAX5039/MAX5040
Voltage-Tracking Controllers for
PowerPC, DSPs, and ASICsMAX5039/40 toc10
UVLO RISING THRESHOLD vs. VCCVCC (V)
UVCC
(V)
MAX5039/40 toc11
UVLO HYSTERESIS vs. VCCVCC (V)
UVLO HYSTERESIS (
mV)
MAX5039/40 toc12
I/O_SENSE THRESHOLD (VI/O_REF) vs. VCCVCC (V)
I/O_REF
(V)
I/O_SENSE HYSTERESIS vs. VCC
MAX5039/40 toc13
VCC (V)
I/O_SENSE HYSTERESIS (mV)
POK GLITCH REJECTION vs. VCC
MAX5039/40 toc14
VCC (V)
GLITCH REJECTION TIME (
Typical Operating Characteristics (continued)(VCC= 5V, VCORE= 1.8V, VI/O= 3.3V, TA= +25°C, unless otherwise specified.)
MAX5039/MAX5040
Voltage-Tracking Controllers for
PowerPC, DSPs, and ASICs
MAX5039/MAX5040
Voltage-Tracking Controllers for
PowerPC, DSPs, and ASICs
Performance During
Typical OperationScope shots are of the MAX5040 EV kit. Figures 1
through 8 demonstrate system performance of the
MAX5040 under various power-up, power-down, and
fault conditions. In some cases (described in detail
below), startup or shutdown of the I/O and CORE sup-
plies were purposely delayed with respect to each
other to simulate possible system operating conditions.
In Figure 1 (with MAX5040), VCCramps up slowly and
the I/O supply comes up before the CORE supply. As
soon as VCCrises above 2.5V (at about 7.5ms) NDRV
goes to VCCshorting the I/O and CORE supplies togeth-
er. When VCCrises above 4.5V (bringing VUVLOabove
VUVCC), SDOgoes high enabling the I/O and CORE
supplies. Although the CORE PWM supply turns on 5ms
after the I/O PWM supply, both supply voltages come up
together because NDRV is held at VCC, shorting the sup-
plies together through the N-channel FET. The I/O supply
supports both the I/O line and the CORE line. Once
VCORErises close to its set point, NDRV falls to around
2.8V to regulate VCOREat its set point. At around 22ms,
the CORE supply comes up, NDRV goes to GND, and
POK goes high. On power-down, when VCCdrops low
enough to bring VUVLObelow VUVCC, SDOimmediately
falls, turning the I/O and CORE supplies off. Simultane-
ously, POK falls, indicating power-down to the proces-
sor. When the I/O voltage drops below the CORE
voltage, NDRV goes to VCC(at around 36ms), shorting
the supplies together. NDRV remains at VCC until VCC
falls below 2.5V and then it returns to GND.
In Figure 2 (without MAX5040),VCCramps up slowly
and the CORE and I/O supplies are turned on when
VCCexceeds 2.5V. The I/O voltage comes up before
the CORE voltage. There is a 3.3V difference between
the I/O and CORE supplies for about 4ms before the
CORE supply finally comes up. When VCCpowers
down, I/O remains high for about 10ms after CORE
reaches GND.
In Figure 3 (with MAX5040), VCCramps up slowly and
the CORE supply comes up before the I/O supply. As
soon as VCCrises above 2.5V (at about 7.5ms), NDRV
goes to VCC, shorting the I/O and CORE supplies togeth-
er. When VCCrises above 4.5V (bringing VUVLOabove
VUVCC), SDOgoes high, enabling the I/O and CORE
supplies. Although the I/O PWM supply turns on 8ms
after the CORE PWM supply, both supply voltages come
up together because NDRV is held at VCC, shorting the
supplies together through the N-channel FET. The CORE
supply supports both the CORE line and the I/O line until
the I/O supply comes up. At around 23ms, the I/O supply
turns on, pulling the I/O voltage above the CORE volt-
age. At this point, the MAX5040 brings NDRV to GND
and POK goes high. On power-down, when VCCdrops
low enough to bring VUVLO below VUVCC, SDOimmedi-
ately falls, turning the I/O and CORE supplies off.
Simultaneously POK falls, indicating power-down to the
processor. When the CORE voltage drops below its reg-
ulation point, NDRV begins to regulate it (at around
30ms). When I/O falls below CORE, NDRV is pulled up to
VCCto short the two supplies together.
In Figure 4 (without MAX5040),VCCramps up slowly
and the CORE voltage comes up before the I/O volt-
age. It takes about 8ms before the I/O supply finally
comes up above the CORE supply. When VCCpowers
down, the supplies do not turn off together. CORE
remains high for around 14ms after I/O falls.
In Figure 5 (with MAX5040),the system power-up is
attempted with the CORE supply held in shutdown. As
soon as VCCrises above 2.5V, NDRV goes to VCC,
shorting the I/O and CORE supplies together. Next,
when VCCrises above 4.5V (bringing VUVLOabove
VUVCC), SDOgoes high, enabling the I/O and CORE
supplies. Both supplies come up together because
NDRV is high. Note that the CORE supply is still off;
CORE is held up through the N-channel FET shunt.
Once VCORE rises close to its set point, the linear regu-
lator holds VCORE to its set point by regulating NDRV to
around 2.8V. After 15ms of regulating CORE, the
MAX5040 latches a fault. SDOgoes low, NDRV goes to
VCC, and both supplies power down together. POK
remains low throughout because a valid operating state
was not achieved.
In Figure 6 (with MAX5040),VCCis set to 5V. Toggling
UVLO from low to high controls system startup. While
UVLO is low and the VCCis 5V, NDRV is high, causing
the supplies to be shorted together. When UVLO goes
high, SDOalso goes high, turning on the CORE and I/O
supplies (at around 3ms). In this example, the I/O sup-
ply comes up before the CORE supply. The MAX5040
regulates CORE by driving NDRV to about 2.8V until the
CORE supply comes up (at around 7ms), then NDRV
falls to GND and POK goes high. When UVLO is driven
low, SDOgoes low, disabling the CORE and I/O sup-
plies. NDRV goes to VCCand both supplies power
down together.
In Figure 7 (with MAX5040),VCCis set to 5V. Toggling
UVLO from low to high controls system startup. While
UVLO is low and the VCCis 5V, NDRV is high, shorting
the supplies together while they are both off. When
UVLO does go high, SDOalso goes high, turning on
the CORE and I/O supplies (at around 8ms). In this
example, the CORE supply comes up before the I/O
MAX5039/MAX5040
Voltage-Tracking Controllers for
PowerPC, DSPs, and ASICssupply. The MAX5040 holds up I/O by driving NDRV to
VCC(because the I/O voltage is less than the CORE
voltage) until the I/O supply comes up (at around
16ms). At this point, NDRV goes to GND and POK goes
high. UVLO is driven low (at around 22ms), causingSDOto go low, disabling the CORE and I/O supplies.
The CORE supply powers down at about 23ms and
NDRV goes to 2.8V to regulate the CORE supply until
I/O falls. Then NDRV goes to VCCwhen the I/O voltage
falls to the CORE voltage (at around 36ms).
Figure 8 (with MAX5040) starts out with the supplies in
their normal range. At 3ms, CORE is shorted to GND.
NDRV goes high, and POK goes low immediately.
NDRV shorts the I/O supply to the CORE supply, bring-
ing the supplies down together. After 15ms, the
MAX5040 latches a fault and SDOgoes low turning off
the supplies.
Detailed DescriptionThe MAX5039/MAX5040 voltage-tracking controllers
limit the maximum differential voltage between two
power supplies during power-up, power-down, and
brownout conditions. The devices provide a shutdown
output control signal, SDO, which is used to turn on
Figure 1. System Power-Up/Power-Down (VI/ORising Before
VCORE)
Figure 2. System Power-Up/Power-Down Without MAX5039/
MAX5040 (VI/ORising Before VCORE)
Figure 3. System Power-Up/Power-Down (VCORERising
Before VI/O)
Figure 4. System Power-Up/Power-Down Without MAX5039/
MAX5040 (VCORERising Before VI/O)
MAX5039/MAX5040
Voltage-Tracking Controllers for
PowerPC, DSPs, and ASICsand off the CORE and I/O power supplies. The
MAX5039/MAX5040 monitor and compare the CORE
and I/O voltages as follows.
When the I/O voltage is greater than or equal to the
CORE voltage, MAX5039/MAX5040 regulate the exter-
nal N-channel MOSFET as a linear regulator by control-
ling NDRV. The linear regulator regulates the CORE
voltage to the value set by the external resistor-divider
connected from CORE to CORE_FB and GND (see
Figures 9 and 10). If the CORE_FB voltage is far less
than its regulation point, VC_REF(800mV), NDRV drives
high to VCC, effectively shorting CORE and I/O together
through the external MOSFET. If the CORE_FB voltage
equals VC_REF, NDRV goes into regulation mode. If the
CORE_FB voltage is higher than VC_REF, the linear reg-
ulator goes into standby mode and pulls NDRV low,
turning off the external N-channel MOSFET.
When the I/O voltage is lower than the CORE voltage by
VTH(90mV), the MAX5039/MAX5040 turn the external N-
channel MOSFET on by driving NDRV high to VCC.
Whenever SDOis high, the MAX5039/MAX5040 track the
time that NDRV is in regulation mode or driven high. If
NDRV is in regulation mode or driven high for longer than
tFAULT(15ms), a fault occurs and SDOis pulled low.
Figure 7. System Turn-On/Turn-Off Under UVLO Control
(VCORERising Before VI/O)
Figure 8. Short-Circuit Response (CORE Shorted to GND)
Figure 5. System Power-Up/Power-Down, Fault Startup
(CORE Supply Fails to Turn On)
Figure 6. System Turn-On/Turn-Off Under UVLO Control
(VI/ORising Before VCORE)
MAX5039/MAX5040
Voltage-Tracking Controllers for
PowerPC, DSPs, and ASICs
Functional Diagram
