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MAX4928BETN+ |MAX4928BETNMAXIMN/a525avaiDisplayPort/PCIe Passive Switches
MAX4928BETN+T |MAX4928BETNTMAXIMN/a1100avaiDisplayPort/PCIe Passive Switches


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MAX4928BETN+-MAX4928BETN+T
DisplayPort/PCIe Passive Switches
General Description
The MAX4928A/MAX4928B high-speed passive switch-
es route PCI Express®(PCIe) data and/or DisplayPort™
signals between two possible destinations in desktop or
laptop PCs. The MAX4928A is intended to be used with
the ATX form factor desktop PCs, while the MAX4928B
is expected to be used in the BTX form factor.
The MAX4928A/MAX4928B are hex double-pole/dou-
ble-throw (6 x DPDT) switches. The MAX4928A/
MAX4928B feature a single digital control input (SEL) to
switch signal paths and a latch input (LE) that holds the
switches in a given state.
The MAX4928A/MAX4928B are fully specified to oper-
ate from a single +3.3V (typ) power supply. The
MAX4928A/MAX4928B are available in an industry
standard 5mm x 11mm, 56-pin TQFN package. Both
devices operate over the -40°C to +85°C extended
temperature range.
Applications

Desktop PCs
Notebook PCs
Features
Single +3.3V Power Supply VoltageSupports PCIe Gen I, Gen II, and DisplayPort
Data Rates > 5Gbps
Excellent Return Loss > 12dB at 2.5GHzSix Bidirectional Pairs of Switches
All Switching in One Device
Low 850µA (max) Supply CurrentSmall 5mm x 11mm, 56-Pin TQFN PackageIndustry-Standard Pinouts
MAX4928A/MAX4928B
DisplayPort/PCIe Passive Switches

19-4030; Rev 1; 8/08
Typical Operating Circuit appears at end of data sheet.

MAX4928A22232425262728
VDD
*EP
GND
TX0+TX0-
TX1+TX1-VDDGND
GND
HPD2
HPD1
AUX-
AUX+
GND53565552515049
OUT+
OUT-
GND
IN3-
IN3+
SEL
GND
VDD
GND
IN2-
IN2+
VDD
IN1-
IN1+
IN0-
IN0+
GND
D3+
D3-
GND
D2-
D2+
D1-
RX1+
RX1-
GND
RX0-
RX0+
VDD
D1+
D0-
D0+
TX3-
TX3+
TX2-
TX2+
GND
*CONNECT EXPOSED PADDLE TO GND.TQFN
TOP VIEW
MAX4928B22232425262728
VDD
*EP
GNDD0+D0-
D1+D1-VDDGND
GND
RX1-
RX1+RX0-RX0+
GND53565552515049
IN3+
IN3-
OUT+
GND
IN2-
IN2+
GND
VDD
GND
OUT-
IN1-
IN1+
VDD
IN0-
IN0+
SEL
GND
TX3+
TX3-
GND
TX2-
TX2+
TX1-
HPD1
HPD2
GND
AUX-
AUX+
VDD
TX1+
TX0-
TX0+
D3-
D3+
D2-
D2+
GND
TQFN
Pin Configurations

PCI Express is a registered trademark of PCI-SIG.
DisplayPort is a trademark of Video Electronics Standards
Association (VESA).
PARTTEMP RANGEPIN-PACKAGE
MAX4928AETN+
-40°C to +85°F56 TQFN-EP
MAX4928BETN+
-40°C to +85°F56 TQFN-EP
Ordering Information

+Denotes a lead-free package/RoHS-Compliant package.
EP = Exposed paddle.
MAX4928A/MAX4928B
DisplayPort/PCIe Passive Switches
ELECTRICAL CHARACTERISTICS

(VDD= +3.3V ±10%, TA=TMINto TMAX, unless otherwise noted. Typical values are at VDD= +3.3V, TA= +25°C, unless otherwise
noted.) (Note 3)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
ANALOG SWITCH

Analog Signal Range
IN_, X_, OUT_,
D_, TX_, HPD_,
RX_, AUX_
-0.1 (VDD -
1.8)V
Voltage Between IN and D/TX, X
and HPD/RX1, and OUT and
AUX/RX0
|VIN_ - VTX_|,
|VIN_ - VD_|,
|VX_ - VHPD_|,
|VX_ - VRX1_|,
|VOUT_ -
VAUX_|,
|VOUT_ - VRX0_|
01.8V
On-ResistanceRONIIN_ = IX_ = IOUT_ = 15mA, VD_, VTX_,
VHPD_, VAUX_, or VRX_ = 0V, +1.2V8Ω
On-Resistance Match
Between Pairs of Same ChannelΔROND D = + 3.0V , II N _ = IX _ = IOU T _= 15m A,D _, V T X _ , V H P D _, V A U X _, or V R X _ = 0V N otes 4, 5)
On-Resistance Match
Between ChannelsΔROND D = + 3.0V , II N _ = IX _ = IOU T _= 15m A,D _, V T X _ , V H P D _, V A U X _, or V R X _ = 0V N otes 4, 5)
On-Resistance FlatnessRFLAT(ON)D D = + 3.0V , II N _ = IX _ = IOU T _= 15m A,D _, V T X _ , V H P D _, V A U X _, or V R X _ = 0V ,1.2V ( N otes 5, 6)
0.31.5Ω
ABSOLUTE MAXIMUM RATINGS

(All voltages referenced to GND, unless otherwise noted.)
VDD...........................................................................-0.3V to +4V
LE, SEL, IN_, X_, OUT_, D_, TX_, HPD_, RX_, AUX_
(Note 1)...............................................-0.3V to + (VDD+ 0.3V)
|VIN_- VTX_|, |VIN_- VD_|, |VX_- VHPD_|, |VX_- VRX1_|,
|VOUT_- VAUX_|, |VOUT_- VRX0_| (Note 1)...................0 to +2V
Continuous Current (IN_ to D_/TX_, X_ to HPD_/RX1_,
OUT_ to AUX_/RX0_.....................................................±70mA
Peak Current (IN_ to D_/TX_, X_ to HPD_/RX1_, OUT_ to
AUX_/RX0_) (pulsed at 1ms, 10% duty cycle).............±70mA
Continuous Current (LE, SEL)...........................................±30mA
Peak Current (LE, SEL)
(pulsed at 1ms, 10% duty cycle)..................................±70mA
Continuous Power Dissipation (TA= +70°C) for Multilayer Board
56-Pin TQFN (derate 41.0mW/°C above +70°C).......3279mW
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Package Junction-to-Ambient Thermal Resistance (θJA)
(Note 2).....................................................................24.4°C/W
Package Junction-to-Case Thermal Resistance (θJC)
(Note 2).......................................................................1.5°C/W
Lead Temperature (soldering).........................................+300°C
Note 1:
Signals on IN_, X_, OUT_, D_, TX_, HPD_, RX_, or AUX_, LE, SEL exceeding VDDor GND are clamped by internal diodes.
Limit forward-diode current to maximum current rating.
Note 2:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a 4-layer
board. For detailed information on package thermal considerations, see /thermal-tutorial.
MAX4928A/MAX4928B
DisplayPort/PCIe Passive Switches
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

D_ or TX_/
HPD_ or RX1_/
AUX_ or RX0_ Off-Leakage
Current
ID_ (OFF)
ITX_ (OFF)
IHPD_ (OFF)
IRX1_ (OFF)
IAUX_ (OFF)
IRX0_ (OFF)D D = + 3.6V , V I N _ = V X _ = V OU T _ = 0V ,1.2V ; V D _ or V T X _ , V H P D _ or V R X 1 _,A U X _ or V R X 0 _ = + 1.2V , 0V +1
IN_/X_/OUT_ On-Leakage
Current
IIN_ (ON)
IX_ (ON)
IOUT_ (ON)D D = + 3.6V , V I N _ = V X _ = V OU T _ = 0V ,1.2V ; V D _ or V T X _ = V I N _ or
unconnected , V H P D _ or V R X 1 _ = V X _ or
unconnected , V A U X _ or V R X 0 _ = V OU T _
or unconnected +1
DIGITAL SIGNALS

SEL to Switch Turn-On TimetON_SEL
VD_ or VTX_ = +1.0V, RL = 50Ω,
VHPD_ or VRX1_ = +1.0V, RL = 50Ω,
VAUX_ or VRX0_ = +1.0V, RL = 50Ω,
LE = VDD, CL = 100pf (Figure 1)120ns
SEL to Switch Turn-Off TimetOFF_SEL
VD_ or VTX_ = +1.0V, RL = 50Ω,
VHPD_ or VRX1_ = +1.0V, RL = 50Ω,
VAUX_ or VRX0_ = +1.0V, RL = 50Ω,
LE = VDD, CL = 100pf (Figure 1)
850ns
LE Setup Time
SEL to LEtSU
VD_ or VTX_ = +1.0V, RL = 50Ω,
VHPD_ or VRX1_ = +1.0V, RL = 50Ω,
VAUX_ or VRX0_ = +1.0V, RL = 50Ω
(Figure 1)
2ns
LE Hold Time
SEL to LEtHOLD
VD_ or VTX_ = +1.0V, RL = 50Ω,
VHPD_ or VRX1_ = +1.0V, RL = 50Ω,
VAUX_ or VRX0_ = +1.0V, RL = 50Ω,
(Figure 1)
2ns
LE Minimum Pulse-Width LowtW
VD_ or VTX_ = +1.0V, RL = 50Ω,
VHPD_ or VRX1_ = +1.0V, RL = 50Ω,
VAUX_ or VRX0_ = +1.0V, RL = 50Ω
(Figure 1)ns
f = 2.5GHz-1.5
f = 5.0GHz-3.3Differential Insertion Loss
(Figure 2)SDD21
f = 7.5GHz-4.9
f = 2.5GHz-40
f = 5.0GHz-23Differential Crosstalk (Figure 2)SDDCTK
f = 7.5GHz-28
Differential Off-IsolationSDD21_OFFf = 3.0GHz-22dB
f = 2.8GHz-21
f = 5.0GHz-8Differential Return Loss (Figure 2)SDD11
f = 7.5GHz-7
ELECTRICAL CHARACTERISTICS (continued)

(VDD= +3.3V ±10%, TA=TMINto TMAX, unless otherwise noted. Typical values are at VDD= +3.3V, TA= +25°C, unless otherwise
noted.) (Note 3)
MAX4928A/MAX4928B
DisplayPort/PCIe Passive Switches
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Signal Data RateBRRS = RL = 100Ω balanced10Gbps
Differential -3dB BandwidthDBWRS = RL = 100Ω balanced5GHz
LOGIC INPUT (LE, SEL)

Input Logic-HighVIH1.4V
Input Logic-LowVIL0.5V
Input Logic HysteresisVHYST100mV
Input Leakage CurrentIINVIN = 0 or VDD-1+1µA
POWER SUPPLY

Power Supply RangeVDD3.03.6V
VDD Supply CurrentIDDVIN = 0 or VDD850µA
ELECTRICAL CHARACTERISTICS (continued)

(VDD= +3.3V ±10%, TA=TMINto TMAX, unless otherwise noted. Typical values are at VDD= +3.3V, TA= +25°C, unless otherwise
noted.) (Note 3)
Note 3:
All units are 100% production tested at TA= +85°C. Limits over the operating temperature range are guaranteed by design
and characterization and are not production tested.
Note 4:
ΔRON= RON (MAX)- RON (MIN).
Note 5:
Guaranteed by design. Not production tested.
Note 6:
Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal range.
MAX4928A/MAX4928B
DisplayPort/PCIe Passive Switches

ON-RESISTANCE vs. VIN_, VX_, VOUT_
MAX4928A/B toc01
VIN_, VX_, VOUT_ (V)
ON-RESISTANCE (
VDD = 3.3V
ON-RESISTANCE vs. VIN_, VX_, VOUT_
MAX4928A/B toc02
VIN_, VX_, VOUT_ (V)
ON-RESISTANCE (
TA = +85°C
TA = +25°C
TA = -40°C
VDD = 3.3V
SUPPLY CURRENT vs. TEMPERATURE
MAX4928A/B toc03
TEMPERATURE (°C)
SUPPLY CURRENT (
VDD = 3.3V
0. 7
LOGIC THRESHOLD vs. SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
LOGIC THRESHOLD (V)
VDD = 3.3V
MAX4928A/B toc04VIH
VIL
TURN-ON/OFF TIME vs. SUPPLY VOLTAGE
MAX4928A/B toc05
SUPPLY VOLTAGE (V)
TURN-ON/OFF TIME (ns)
tON_SEL
tOFF_SEL
-1010,0001,000100
DIFFERENTIAL INSERTION LOSS

MAX4928A/B toc06
FREQUENCY (MHz)
DIFFERENTIAL INSERTION LOSS (dB)
-8010,0001,000100
DIFFERENTIAL OFF-ISOLATION

MAX4928A/B toc07
FREQUENCY (MHz)
DIFFERENTIAL OFF-ISOLATION (dB)
-10010,0001,000100
DIFFERENTIAL CROSSTALK

MAX4928A/B toc08
FREQUENCY (MHz)
DIFFERENTIAL CROSSTALK (dB)
-4010,0001,000100
DIFFERENTIAL RETURN LOSS

MAX4928A/B toc09
FREQUENCY (MHz)
DIFFERENTIAL RETURN LOSS (dB)
Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)
MAX4928A/MAX4928B
DisplayPort/PCIe Passive Switches

tr < 5ns
tf < 5ns
50%
VIL
LOGIC
INPUT
SEL
VN_ = VD_ OR VTX_, VHPD_ OR VRX1_, VAUX_, OR VRX0_
IN_, X_,
OR OUT_
GNDLE
SEL
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
VOUT = VN_ ( RL ) RL + RON
VN_
VIH
D_ OR TX_,
HPD_ OR
RX1_, AUX_
OR RX0_
0.9 x VOUT0.9 x VOUT
0.9 x VOUT0.9 x VOUT
tON_SEL
tOFF_SEL
VOUTSWITCH
OUTPUT
TX_, RX1_,
OR RX0_
SWITCH
OUTPUT
D_, HPD_,
OR AUX
LOGIC
INPUT
SEL
LOGIC
INPUT
VDD
+3.3V
VOUT
MAX4928A/MAX4928B
LOGIC
INPUT
50%50%
50%50%
LOGIC
INPUT
LOGIC
INPUT
SEL
VIL
VIH
VIL
VIH
tSUtHOLD
tON_SEL
tOFF_SELest Circuits/Timing Diagrams
Figure 1. Switching Time
MAX4928A/MAX4928B
DisplayPort/PCIe Passive Switches

IN_+
X_+
OUT_+
IN_-
X_-
OUT_-
D_+
D_-
VDD
+3.3V
TX_+
RX1_+
RX0_+
TX_-
RX1_-
RX0_-
SELVDD
GND
DIFFERENTIAL INSERTION-LOSS/DIFFERENTIAL RETURN LOSS
PORT 1
PORT 2
PORT 3
PORT 4
NETWORK
ANALYZER
0.1μF
DIFFERENTIAL INSERTION-LOSS = 20log
VIN+
VIN-
VOUT+
VOUT-
HPD_+
HPD_-
AUX_+
AUX_-0V
VIN+ - VIN-
VOUT+ - VOUT-( )
MAX4928A
MAX4928B
IN_+
X_+
OUT_+
IN_-
X_-
OUT_-
D_+
D_-
VDD
+3.3V
TX_+
RX1_+
RX0_+
TX_-
RX1_-
RX0_-
SELVDD
GND
DIFFERENTIAL OFF-ISOLATION
PORT 1
PORT 2
PORT 3
PORT 4
NETWORK
ANALYZER
0.1μF
DIFFERENTIAL OFF-ISOLATION = 20log
VIN+
VIN-
VOUT+
VOUT-
HPD_+
HPD_-
AUX_+
AUX_-0V
VIN+ - VIN-
VOUT+ - VOUT-( )
MAX4928A
MAX4928B
IN_+
X_+
OUT_+
IN_-
X_-
OUT_-
D_+/D_-
HPD_+/HPD_-
VDD
+3.3V
IN_+
X_+
OUT_+
IN_-
X_-
OUT_-
SEL0V OR VDD
GND
DIFFERENTIAL CROSSTALK
PORT 1
PORT 2
PORT 3
PORT 4
NETWORK
ANALYZER
50Ω
50Ω
50Ω
50Ω
0.1μF
DIFFERENTIAL CROSSTALK = 20log
VIN+
VIN-
VOUT+
VOUT-
AUX_+/AUX_-
TX_+/TX_-
RX1_+/RX1_-
HP0_+/HP0_-0V
VIN+ - VIN-
VOUT+ - VOUT-( )
MAX4928A
MAX4928B
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
50Ω
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
DIFFERENTIAL OFF-ISOLATION IS MEASURED BETWEEN IN_ AND “OFF” D_ OR TX_, X_ AND “OFF” HPD_ OR RX1_, OUT_ AND “OFF” AUX_ OR RX0_ TERMINAL ON EACH SWITCH.
DIFFERENTIAL ON-LOSS IS MEASURED BETWEEN IN_ AND “ON” D_ OR TX_, X_ AND “ON” HPD_ OR RX1_, OUT_ AND “ON” AUX_ OR RX0_ TERMINAL ON EACH SWITCH.
DIFFERENTIAL CROSSTALK IS MEASURED BETWEEN ANY TWO PAIRS.est Circuits/Timing Diagrams (continued)
Figure 2. Differential On-Loss, Differential Off-Isolation, and Differential Crosstalk
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