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MAX4838EXT+T |MAX4838EXTTMAXIMN/a11838avaiOvervoltage Protection Controllers with Status FLAG
MAX4840EXT+TMAXN/a5207avaiOvervoltage Protection Controllers with Status FLAG


MAX4838EXT+T ,Overvoltage Protection Controllers with Status FLAGELECTRICAL CHARACTERISTICS(V = +5V (MAX4838–MAX4841), V = +4V (MAX4842), T = -40°C to +85°C, unless ..
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MAX4838EXT+T-MAX4840EXT+T
Overvoltage Protection Controllers with Status FLAG
General Description
The MAX4838–MAX4842 are overvoltage protection ICs
that protect low-voltage systems against voltages of up
to 28V. If the input voltage exceeds the overvoltage trip
level, the MAX4838–MAX4842 turn off the low-cost
external n-channel FET(s) to prevent damage to the
protected components. An internal charge pump elimi-
nates the need for external capacitors and drives the
FET gate for a simple, robust solution.
The MAX4838/MAX4839 have a 7.4V overvoltage
threshold, and the MAX4840/MAX4841 have a 5.8V
overvoltage threshold. The MAX4842 has a 4.7V over-
voltage threshold. The MAX4838–MAX4841 have an
undervoltage lockout (UVLO) threshold of 3.25V while
the MAX4842 has a UVLO of 3.0V. In addition to the
single FET configuration, the devices can be config-
ured with back-to-back external FETs to prevent cur-
rents from being back-driven into the adapter.
On power-up, the device waits for 50ms before driving
GATE high. FLAGis held low for an additional 50ms
after GATE goes high before deasserting. The
MAX4838/MAX4840/MAX4842 have an open-drain
FLAGoutput, and the MAX4839/MAX4841 have a push-
pull FLAGoutput. The FLAGoutput asserts immediately
to an overvoltage fault.
Additional features include a 15kV ESD-protected input
(when bypassed with a 1µF capacitor) and a shutdown
pin (EN) to turn off the device (MAX4838/MAX4840/
MAX4842).
All devices are offered in a small 6-pin SC70 package
and are specified for operation from -40°C to +85°C.
Applications

Cell Phones
Digital Still Cameras
PDAs and Palmtop Devices
MP3 Players
Features
Overvoltage Protection Up to 28VPreset 7.4V, 5.8V, or 4.7V Overvoltage Trip LevelDrive Low-Cost NMOS FETInternal 50ms Startup DelayInternal Charge PumpUndervoltage Lockout15kV ESD-Protected InputVoltage Fault FLAGIndicator6-Pin SC70 Package
MAX4838–MAX4842
Overvoltage Protection Controllers with
Status FLAG

MAX4838–
MAX4842
INPUT
+1.2V TO +28V
GATE
FLAG
GND
OUTPUT
VIO1µF
NOTE: EN AND PULLUP
RESISTOR ON MAX4838/
MAX4840/MAX4842 ONLY.
NMOSypical Operating Circuit
Ordering Information

19-3044; Rev 1; 4/04
Pin Configuration appears at end of data sheet.
PARTTEMP RANGEPIN-
PACKAGE
TOP
MARK
MAX4838EXT-T
-40°C to +85°C6 SC70-6ABW
MAX4839EXT-T
-40°C to +85°C6 SC70-6ABY
MAX4840EXT-T
-40°C to +85°C6 SC70-6ABX
MAX4841EXT-T
-40°C to +85°C6 SC70-6ABZ
MAX4842EXT-T
-40°C to +85°C6 SC70-6ACE
Selector Guide
PART
UVLO
THRESHOLD
(V)
TRIP
LEVEL
(V)

INPUT

FLAG
OUTPUT

MAX4838EXT-T3.257.4YesOpen-Drain
MAX4839EXT-T3.257.4NoPush-Pull
MAX4840EXT-T3.255.8YesOpen-Drain
MAX4841EXT-T3.255.8NoPush-Pull
MAX4842EXT-T3.004.7YesOpen-Drain
MAX4838–MAX4842
Overvoltage Protection Controllers with
Status FLAG
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VIN= +5V (MAX4838–MAX4841), VIN= +4V (MAX4842), TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA=
+25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
IN to GND ..............................................................-0.3V to +30V
GATE to GND ........................................................-0.3V to +12V
EN, FLAGto GND ....................................................-0.3V to +6V
Continuous Power Dissipation (TA= +70°C)
6-Pin SC70 (derate 3.1mW/°C above +70°C) .............245mW
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature ....................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) ................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Input Voltage RangeVIN1.228.0V
MAX4838–MAX48413.03.253.5Undervoltage Lockout ThresholdUVLOVIN fallingMAX48422.83.03.2V
Undervoltage Lockout Hysteresis50mV
MAX4838/MAX48397.07.47.8
MAX4840/MAX48415.55.86.1Overvoltage Trip LevelOVLO
MAX48424.44.75.0
MAX4838/MAX4839100
MAX4840/MAX484180Overvoltage Trip Level Hysteresis
MAX484250
No load, EN = GND or 5.5V,
VIN = 5.4V (MAX4838–MAX4841)140240
IN Supply CurrentIIN
No load, EN = GND or 4.4V,
VIN = 4.3V (MAX4842)130220
UVLO Supply CurrentVIN = 2.9V (MAX4838–MAX4841),
VIN = 2.7V (MAX4842)150µA
MAX4838–MAX4841910GATE VoltageVGATEIGATE sourcing 1µA
MAX48427.58.0
GATE Pulldown CurrentIPDVIN > VOVLO, VGATE = 5.5V60mA
1.2V ≤ VIN < UVLO, ISINK = 50µA0.4FLAG Output Low VoltageVOLVIN ≥ OVLO, ISINK = 1mA0.4V
FLAG Output High VoltageVOHISOURCE = 100µA, FLAG deasserted,
MAX4839/MAX48412.4V
FLAG Output High LeakageIOHVFLAG = 5.5V, FLAG deasserted,
MAX4838/MAX4840/MAX48421µA
EN Input High VoltageVIHMAX4838/MAX4840/MAX48421.47V
EN Input Low VoltageVILMAX4838/MAX4840/MAX48420.65V
EN Input LeakageILKGMAX4838/MAX4840/MAX4842,
EN = GND or 5.5V1µA
Human Body Model15IN ESD ratingCIN ≥ 1µFIEC 1000-4-215kV
MAX4838–MAX4842
Overvoltage Protection Controllers with
Status FLAG
ELECTRICAL CHARACTERISTICS (continued)

(VIN= +5V (MAX4838–MAX4841), VIN= +4V (MAX4842), TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA=
+25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
TIMING

Startup DelaytSTARTVIN > VUVLO, VGATE > 0.3V, Figure 1205080ms
FLAG Blanking TimetBLANKVGATE = 0.3V, VFLAG = 2.4V, Figure 1205080ms
GATE Turn-On TimetGON
VGATE = 0.3V to 8V (MAX4838–MAX4841),
VGATE = 0.3V to 6V (MAX4842), CGATE =
1500pF, Figure 1ms
GATE Turn-Off TimetGOFF
VIN increasing from 5V to 8V at 3V/µs
(MAX4838–MAX4841), VIN increasing from
4V to 6V at 2V/µs (MAX4842),
VGATE = 0.3V, CGATE = 1500pF, Figure 2
620µs
FLAG Assertion DelaytFLAG
VIN increasing from 5V to 8V at 3V/µs
(MAX4838–MAX4841), VIN increasing from
4V to 6V at 2V/µs (MAX4842), VFLAG = 0.4V,
Figure 2
5.8µs
Initial Overvoltage Fault DelaytOVP
VIN increasing from 0 to 8V
(MAX4838–MAX4841), VIN increasing from
0V to 6V (MAX4842), IGATE = 80% of IPD,
Figure 3
100ns
Disable TimetDISVEN = 2.4V, VGATE = 0.3V,
MAX4838/MAX4840/MAX4842, Figure 4580ns
SUPPLY CURRENT vs. INPUT VOLTAGE

MAX4838 toc01
INPUT VOLTAGE (V)
SUPPLY CURRENT (2015105
REVERSE CURRENT
vs. OUTPUT VOLTAGE
MAX4838 toc02
OUTPUT VOLTAGE (V)
REVERSE CURRENT (
SINGLE MOSFET
BACK-TO-BACK MOSFETS
MAX4838–MAX4841
GATE VOLTAGE vs. INPUT VOLTAGE

MAX4838 toc03
INPUT VOLTAGE (V)
GATE VOLTAGE (V)654
MAX4840
MAX4841
MAX4838
MAX4839
Typical Operating Characteristics

(VIN= +5V, MAX4838; Si9936DY external MOSFET in back-to-back configuration; TA= +25°C, unless otherwise noted.)
Note 1:
All parts are 100% tested at +25°C. Electrical limits across the full temperature range are guaranteed by design and
correlation.
MAX4838–MAX4842
Overvoltage Protection Controllers with
Status FLAGypical Operating Characteristics (continued)

(VIN= +5V, MAX4838; Si9936DY external MOSFET in back-to-back configuration; TA= +25°C, unless otherwise noted.)
MAX4842
GATE VOLTAGE vs. INPUT VOLTAGE

MAX4838 toc04
INPUT VOLTAGE (V)
GATE VOLTAGE (V)651234
MAX4842
GATE VOLTAGE vs. INPUT VOLTAGE

MAX4838 toc05
INPUT VOLTAGE (V)
GATE VOLTAGE (V)
IGATE = 0
IGATE = 4µA
IGATE = 8µA
MAX4838–MAX4841
POWER-UP RESPONSE

MAX4838 toc06
GATE
10V
OUT
FLAG
20ms/div
ROUT = ∞
COUT = 0
MAX4838–MAX4841
POWER-UP RESPONSE

MAX4838 toc07
20ms/div
FLAG
IIN
GATE
10V
ROUT = 5Ω
OVERVOLTAGE RESPONSE

MAX4838 toc10
400ns/div
GATE
IGATE
FLAG
40mA
10V
CGATE = 1500pF
POWER-UP OVERVOLTAGE RESPONSE

MAX4838 toc11
1µs/div
GATE
IGATE
FLAG
50mAGATE PULLED UP
TO IN WITH 100Ω
POWER-DOWN RESPONSE

MAX4838 toc12
10ms/div
GATE
OUT
FLAG
10V
RLOAD = 50Ω
RFLAG = 100kΩ TO +5V
MAX4842
POWER-UP RESPONSE

MAX4838 toc08
20ms/div
FLAG
OUT
GATE
ROUT = ∞
COUT = 0
MAX4842
POWER-UP RESPONSE

MAX4838 toc09
20ms/div
800mA
FLAG
IIN
GATE
ROUT = 5Ω
MAX4838–MAX4842
Overvoltage Protection Controllers with
Status FLAG
PIN
MAX4838/
MAX4840/
MAX4842
MAX4839/
MAX4841
NAMEFUNCTION

11INInput. IN is both the power-supply input and the overvoltage sense input. Bypass IN to
GND with a 1µF capacitor or larger.GNDGroundFLAG
Fault Indication Output, Active Low. FLAG is asserted low during undervoltage lockout
and overvoltage lockout conditions. FLAG is deasserted during normal operation. FLAG
is open-drain on the MAX4838/MAX4840/MAX4842, and push-pull on the
MAX4839/MAX4841.GATEGate-Drive Output. GATE is the output of an on-chip charge pump. When VUVLO < VIN <
VOVLO, GATE is driven high to turn on the external N-channel MOSFET(s).5, 6N.C.No Connection. Can be connected to GND.ENDevice Enable Input, Active Low. Drive EN low or connect to ground to allow normal
device operation. Drive EN high to turn off the external MOSFET.
Pin Description

VIN
VGATE
VUVLO
0.3V
tSTART
2.4V
tBLANK
8V (6V)
tGON
VFLAG
5V (4V)
( ) MAX4842
Figure 1. Startup Timing Diagram
VIN
VGATE
VOVLO
0.3V
tGOFF
0.4V
tFLAG5V (4V)
8V (6V)
VFLAG
( ) MAX4842
Figure 2. Shutdown Timing Diagram
VIN
IGATE
VOVLO
80%
tOVP
8V (6V)
( ) MAX4842
Figure 3. Power-Up Overvoltage Timing Diagram
VGATE
0.3V
tDIS
1.47VVEN
Figure 4. Disable Timing Diagram
Timing Diagrams
MAX4838–MAX4842
Overvoltage Protection Controllers with
Status FLAG
Detailed Description

The MAX4838–MAX4842 provide up to 28V overvoltage
protection for low-voltage systems. When the input volt-
age exceeds the overvoltage trip level, the MAX4838–
MAX4842 turn off a low-cost external n-channel FET(s)
to prevent damage to the protected components. An
internal charge pump (Figure 5) drives the FET gate for
a simple, robust solution.
Undervoltage Lockout (UVLO)

The MAX4838–MAX4841 have a fixed 3.25V typical
undervoltage lockout level (UVLO) while the MAX4842
has a 3.0V typical UVLO. When VINis less than the
UVLO, the GATE driver is held low and FLAGis asserted.
Overvoltage Lockout (OVLO)

The MAX4838/MAX4839 have a 7.4V typical overvoltage
threshold (OVLO), and the MAX4840/MAX4841 have a
5.8V typical overvoltage threshold. The MAX4842 has a
4.7V typical overvoltage threshold. When VINis greater
than OVLO, the GATE driver is held low and FLAGis
asserted.
FLAGOutput

The FLAGoutput is used to signal the host system
there is a fault with the input voltage. FLAGasserts
immediately to an overvoltage fault. FLAGis held low
for 50ms after GATE turns on before deasserting.
The MAX4839 and MAX4841 have a push-pull FLAGout-
put. The output high voltage is proportional to VINfor VIN
up to 5.5V, and fixed at 5.5V when VIN> 5.5V.
The MAX4838/MAX4840/MAX4842 have an open-drain
FLAGoutput. Connect a pullup resistor from FLAGto
the logic I/O voltage of the host system.Enable Inputis an active-low enable input on the MAX4838/
MAX4840/MAX4842 only. Drive ENlow or connect to
ground to enable normal device operation. Drive EN
high to force the external MOSFET(s) off. ENdoes not
override an OVLO or UVLO fault.
GATE Driver

An on-chip charge pump is used to drive GATE above
IN, allowing the use of low-cost n-channel MOSFETS.
The charge pump operates from the internal 5.5V
regulator.
The actual GATE output voltage tracks approximately
two times VINuntil VINexceeds 5.5V or the OVLO trip
level is exceeded, whichever comes first. The
MAX4838/MAX4839 have a 7.4V typical OVLO, there-
fore GATE remains relatively constant at about 10.5V
for 5.5V < VIN< 7.4V. The MAX4840/MAX4841 have a
5.8V typical OVLO, but this can be as low as 5.5V. The
MAX4840/MAX4841 in practice may never actually
achieve the full 10.5V GATE output. The MAX4842 has
a 4.7V (typ) OVLO and the GATE output voltage is 2x
the input voltage. The GATE output voltage as a func-
tion of input voltage is shown in the Typical Operating
Characteristics.
Device Operation

The MAX4838–MAX4842 have an on-board state
machine to control device operation. A flowchart is
shown in Figure 6. On initial power-up, if VIN< UVLO or
if VIN> OVLO, GATE is held at 0V, and FLAGis low.
If UVLO < VIN< OVLO and ENis low, the device enters
startup after a 50ms internal delay. The internal charge
pump is enabled, and GATE begins to be driven above
VINby the internal charge pump. FLAGis held low dur-
ing startup until the FLAGblanking period expires, typi-GATE
GND
5.5V
REGULATOR
2x CHARGE
PUMPGATE DRIVER
CONTROL
LOGIC AND TIMER
UVLO AND
OVLO
DETECTOR
FLAG
MAX4838–
MAX4842
Figure 5. Functional Diagram
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