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MAX4688EBT-T |MAX4688EBTTmaxN/a3000avai2.5?, Low-Voltage, SPST/SPDT Analog Switches in UCSP Package


MAX4688EBT-T ,2.5?, Low-Voltage, SPST/SPDT Analog Switches in UCSP PackageApplicationsMP3 PlayersCellular PhonesOrdering InformationPower RoutingBattery-Operated EquipmentTE ..
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MAX4688EBT-T
2.5?, Low-Voltage, SPST/SPDT Analog Switches in UCSP Package
General Description
The MAX4686/MAX4687/MAX4688 low on-resistance
(RON), low-voltage analog switches operate from a sin-
gle +1.8V to +5.5V supply. The MAX4686/MAX4687 are
single-pole/single-throw (SPST) analog switches, and
the MAX4688 is a single-pole/double-throw (SPDT) ana-
log switch. The MAX4686 is a normally open (NO)
switch, and the MAX4687 is a normally closed (NC)
switch. The MAX4688 has one normally open (NO)
switch and one normally closed (NC) switch.
When powered from a 3V supply these devices feature
2.5Ω(max) RON, with 0.4Ω(max) RONmatching and 1Ω
(max) flatness. The MAX4686/MAX4687/MAX4688 offer
fast switching speeds (tON= 30ns max, tOFF= 12ns
max). The MAX4688 offers break-before-make action.
The digital logic inputs are 1.8V logic compatible from a
+2.7V to +3.3V supply. The MAX4686/MAX4687/
MAX4688 are available in the chip-scale package
(UCSP™), significantly reducing the required PC board
area. The chip occupies only a 1.50mm x 1.02mm area.
The 3 x 2 array of solder bumps are spaced with a
0.5mm bump pitch.
________________________Applications

MP3 Players
Cellular Phones
Power Routing
Battery-Operated Equipment
Relay Replacement
Audio and Video Signal Routing
Communications Circuits
PCMCIA Cards
Cellular Phones
Hard Drives
Features
6-Bump, 0.5mm Pitch, UCSPRON
2.5Ωmax (+3V Supply)
10Ωmax (+1.8V Supply)
0.4Ωmax RONMatch Between Channels 1Ωmax RONFlatness Over Signal Range Low Leakage Currents Over Temperature
0.5nA (max) at TA= +25°C
Fast Switching: tON= 30ns, tOFF= 12nsGuaranteed Break-Before-Make (MAX4688)+1.8V to +5.5V Single-Supply OperationRail-to-Rail®Signal HandlingLow Crosstalk: -95dB (100kHz)High Off-Isolation: -90dB (100kHz)1.8V Logic Compatible
MAX4686/MAX4687/MAX4688
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
Pin Configurations/Functional Diagrams/Truth Table

19-2042; Rev 1; 2/03
Ordering Information

Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
UCSP is a trademark of Maxim Integrated Products, Inc.
MAX4686/MAX4687/MAX4688
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(V+ = +2.7V to +3.3V, VIH= +1.4V, VIL= 0.5V, TA= TMINto TMAX, unless otherwise noted. Typical values are at 3V and TA= +25°C.)
(Notes 3, 4)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
All Voltages Referenced to GND
V+, IN.......................................................................-0.3V to +6V
COM, NO, NC (Note1)..................................-0.3V to (V+ + 0.3V)
Continuous Current NO, NC, COM ................................±100mA
Peak Current NO, NC, COM
(pulsed at 1ms, 10% duty cycle) ...............................±200mA
Continuous Power Dissipation (TA= +70°C)
3 x 2 UCSP (derate 10.1mW/°C at +70°C)..................808mW
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range ............................-65°C to +150°C
Bump Reflow Temperature .............................................+235°C
Note 1:
Signals on NO, NC, and COM exceeding V+ are clamped by an internal diode. Limit forward-diode current to maximum cur-
rent rating.
Note 2:
This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device
can be exposed to during board level solder attach and rework. This limit permits only the use of the solder profiles recom-
mended in the industry standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and convection reflow.
Preheating is requied. Hand or wave soldering is not allowed.
MAX4686/MAX4687/MAX4688
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package

this data sheet.
Note 4:
UCSP parts are 100% tested at +25°C only and guaranteed by correlation at the full hot-rated temperature.
Note 5:
∆RON= RON(MAX) - RON(MIN), between switches.
Note 6:
Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
Note 7:
Guaranteed by design.
Note 8:
Off Isolation = 20log10(VCOM/ VNO), VCOM= output, VNO= input to off switch.
Note 9:
Between switches.
ELECTRICAL CHARACTERISTICS (continued)

(V+ = +2.7V to +3.3V, VIH= +1.4V, VIL= 0.5V, TA= TMINto TMAX, unless otherwise noted. Typical values are at 3V and TA= +25°C.)
(Notes 3, 4)
MAX4686/MAX4687/MAX4688
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package

TURN-ON/OFF TIME vs. TEMPERATURE
MAX4686/7/8 toc07
TEMPERATURE (°C)
tON/OFF
(ns)1000
ON/OFF-LEAKAGE CURRENT
vs. TEMPERATURE
MAX4686/7/8 toc08
TEMPERATURE (°C)
ON/OFF-LEAKAGE CURRENT (pA)1345
CHARGE INJECTION vs. VCOM

MAX4686/7/8 toc09
VCOM (V)
Q (pC)31456
SUPPLY CURRENT vs. SUPPLY VOLTAGE

MAX4686/7/8 toc01
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (pA)
ON-RESISTANCE vs. VCOM
MAX4686/7/8 toc02
VCOM (V)
ON-RESISTANCE vs. VCOM (V+ = +3V)
MAX4686/7/8 toc03
VCOM (V)
ON-RESISTANCE vs. VCOM (V+ = +5V)
MAX4686/7/8 toc04
VCOM (V)
LOGIC THRESHOLD VOLTAGE
vs. SUPPLY VOLTAGE
MAX4686/7/8 toc05
V+ (V)
LOGIC THRESHOLD VOLTAGE (V)2456
TURN-ON/OFF TIME vs. SUPPLY VOLTAGE

MAX4686/7/8 toc06
V+ (V)
ON/OFF
(ns)
Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)
Applications Information
Logic Inputs

Where the MAX4686/MAX4687/MAX4688 have a +3.3V
supply, IN may be driven low to GND and driven high
to 5.5V. Driving IN rail-to-rail minimizes power con-
sumption. Logic inputs accept up to +5.5V regardless
of supply voltage.
Analog Signal Levels

Analog signals that range over the entire supply volt-
age (V+ to GND) are passed with very little change in
RON(see Typical Operating Characteristics). The
switches are bidirectional, so the NO, NC, and COM
pins are both inputs or outputs.
Power-Supply Sequencing
and Overvoltage Protection
CAUTION: Do not exceed the absolute maximum
ratings because stresses beyond the listed ratings
may cause permanent damage to devices.
MAX4686/MAX4687/MAX4688
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package

FREQUENCY RESPONSE
MAX4686/7/8 toc10
FREQUENCY (MHz)
LOSS (dB)
-201k100k
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY

MAX4686/7/8 toc11
FREQUENCY (Hz)
THD + N (%)
10010kypical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
Proper power-supply sequencing is recommended for all
CMOS devices. Always apply V+ before applying analog
signals, especially if the analog signal is not current limit-
ed. If this sequencing is not possible, and if the analog
inputs are not current limited to <20mA, add a small-sig-
nal diode (D1) as shown in Figure 1. Adding a protection
diode reduces the analog range to a diode drop (about
0.7V) below V+ (for D1). RONincreases slightly at low
supply voltages. Maximum supply voltage (V+) must not
exceed +6V.Protection diode D1 also protects against
some overvoltage situations. No damage will result on
Figure 1’s circuit if the supply voltage is below the
absolute maximum rating and if a fault voltage up to the
absolute maximum rating is applied to an analog signal
pin.
UCSP Package Consideration

For general UCSP package information and PC layout
considerations, please refer to the Maxim Application
Note (Wafer-Level Ultra-Chip-Board-Scale Package).
UCSP Reliability

The chip-scale package (UCSP) represents a unique
packaging form factor that may not perform equally to a
packaged product through traditional mechanical relia-
bility tests. CSP reliability is integrally linked to the user’s
assembly methods, circuit board material, and usage
environment. The user should closely review these areas
when considering use of a CSP package. Performance
through Operating Life Test and Moisture Resistance
remains uncompromised as it is primarily determined by
the wafer-fabrication process.
Mechanical stress performance is a greater considera-
tion for a CSP package. CSPs are attached through
direct solder contact to the user’s PC board, foregoing
the inherent stress relief of a packaged product lead
frame. Solder joint contact integrity must be considered.
Information on Maxim’s qualification plan, test data, and
recommendations are detailed in the UCSP application
note, which can be found on Maxim’s website at
.
MAX4686/MAX4687/MAX4688
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
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