MAX456CPL+ ,8x8 Crosspoint Video SwitchFeaturesThe MAX456 is the first monolithic CMOS 8 x 8 video ♦ Routes Any Input Channel to Any Outpu ..
MAX456CQH ,8 x 8 Video Crosspoint SwitchApplicationsD1/SER OUT V+ 140Video Test EquipmentD0/SER IN2 OUT039Video Security SystemsA23 D238Vid ..
MAX456EPL ,8 x 8 Video Crosspoint SwitchELECTRICAL CHARACTERISTICS(V+ = 5.0V, V- = -5.0V, -1.3V ≤ V ≤ +1.3V; LOAD = +5V; internal load resi ..
MAX456EPL+ ,8x8 Crosspoint Video SwitchApplicationsD1/ SER OUT V+ 140Video Test EquipmentD0/ SER IN2 OUT039Video Security SystemsA23 D238V ..
MAX4570CWI ,Serially Controlled / Dual 4x2 / Clickless Audio/Video Analog Crosspoint Switchesapplications. Each device contains two' 43Ω Typical On-Resistance (±5V Supplies)identical crosspoin ..
MAX4571CAI ,Serially Controlled / Clickless Audio/Video Switchesfeatures 35Ω max on-resistance, -90dB audio' 35Ω max On-Resistanceoff-isolation at 20kHz, -60dB vid ..
MAX8677AETG+ ,1.5A Dual-Input, USB/AC Adapter Charger and Smart Power SelectorFeaturesThe MAX8677A is an integrated 1-cell Li+ charger and♦ Complete Charger and Smart Power Sele ..
MAX8677AETG+T ,1.5A Dual-Input, USB/AC Adapter Charger and Smart Power Selectorfeatures include overvoltage protection (OVP),charge status and fault outputs, power-OK monitors,Or ..
MAX8677CETG , 1.5A Dual-Input USB/AC Adapter Charger and Smart Power Selector
MAX8677CETG+ ,1.5A Dual-Input USB/AC Adapter Charger and Smart Power SelectorApplications+Denotes a lead-free package.PDAs, Palmtops, and Wireless Handhelds**EP = Exposed paddl ..
MAX8677CETG+T ,1.5A Dual-Input USB/AC Adapter Charger and Smart Power SelectorFeaturesThe MAX8677C is an integrated 1-cell Li+ charger and♦ Complete Charger and Smart Power Sele ..
MAX8678ETE+ ,White LED Charge Pump with 1.1W Audio AmplifierApplications PART PIN-PACKAGE TOP MARK PKG CODECell Phones and Smartphones16 Thin QFNMAX8678ETE+ AF ..
MAX456CPL+-MAX456EPL+
8x8 Crosspoint Video Switch
_______________General DescriptionThe MAX456 is the first monolithic CMOS 8 x 8 video
crosspoint switch that significantly reduces component
count, board space, and cost. The crosspoint switch
contains a digitally controlled matrix of 64 T-switches
that connect eight video input signals to any, or all, out-
put channels. Each matrix output connects to eight
internal, high-speed (250V/μs), unity-gain-stable buffers
capable of driving 400Ωand 20pF to ±1.3V. For appli-
cations requiring increased drive capability, the
MAX456 outputs can be connected directly to two
MAX470 quad, gain-of-two video buffers, which are
capable of driving 75Ωloads.
Three-state output capability and internal, programma-
ble active loads make it feasible to parallel multiple
MAX456s and form larger switch matrices.
In the 40-pin DIP package, crosstalk (70dB at 5MHz) is
minimized, and board area and complexity are simpli-
fied by using a straight-through pinout. The analog
inputs and outputs are on opposite sides, and each
channel is separated by a power-supply line or quiet
digital logic line.
________________________ApplicationsVideo Test Equipment
Video Security Systems
Video Editing
____________________________FeaturesRoutes Any Input Channel to Any Output ChannelSwitches Standard Video SignalsSerial or Parallel Digital InterfaceExpandable for Larger Switch Matrices80dB All-Channel Off Isolation at 5MHz8 Internal Buffers with:
250V/μs Slew Rate, Three-State Output Capability,
Power-Saving Disable Feature, 35MHz Bandwidth
______________Ordering Information
Ordering Information continued on last page.* Dice are specified at TA= +25°C, DC parameters only.
x 8 Video Crosspoint Switch
________________________________________________________________Maxim Integrated Products1V+
OUT0
OUT1A1
D0/SER IN
D1/SER OUT
TOP VIEW
MAX456
OUT2
OUT3LOAD
IN1
IN0
AGND
OUT4DGND
IN2
AGND
OUT5
AGND
OUT6
OUT7
LATCH
EDGE/LEVEL
IN4
DGND
IN3
SER/PAR
IN6
IN5
IN7
DIPPLCC on last page
_________________Pin ConfigurationsOUTPUT
SELECT
8 X 8
T-SWITCH
MATRIX
MAX470
8 INPUT CHANNELS
D1/SER OUT
D0/SER IN
INPUT
SELECT
OR
SERIAL
I/O
MAX456
LATCH
75W
75WAV = 2
MAX470
AV = 2
________Typical Application Circuit
Call toll free 1-800-998-8800 for free samples or literature.19-2858; Rev 2; 2/94
PARTTEMP. RANGEPIN-PACKAGEMAX456CPL0°C to +70°C40 Plastic DIP
MAX456CQH0°C to +70°C44 PLCC
MAX456C/D0°C to +70°CDice*
x 8 Video Crosspoint Switch_______________________________________________________________________________________ABSOLUTE MAXIMUM RATINGSTotal Supply Voltage (V+ to V-)...........................................+12V
Positive Supply Voltage V+ Referred to AGND......-0.3V to +12V
Negative Supply Voltage V- Referred to AGND.....-12V to +0.3V
DGND Voltage.........................................................AGND ±0.3V
Buffer Short Circuit to Ground when
Not Exceeding Package Power Dissipation.............Indefinite
Analog Input Voltage............................(V+ + 0.3V) to (V- - 0.3V)
Digital Input Voltage.............................(V+ + 0.3V) to (V- - 0.3V)
Input Current, Power On or Off
Digital Inputs.................................................................±20mA
Analog Inputs...............................................................±50mA
Continuous Power Dissipation (TA= +70°C)
40-Pin Plastic DIP (derate 11.3mW/°C above +70°C)....889mW
40-Pin CERDIP (derate 20.0mW/°C above +70°C)....1600mW
44-Pin PLCC (derate 13.3mW/°C above +70°C).......1066mW
Operating Temperature Ranges:
MAX456C _ _......................................................0°C to +70°C
MAX456E _ _...................................................-40°C to +85°C
Storage Temperature Range.............................-65°C to +160°C
Lead Temperature (soldering, 10 sec)............................+300°C
ELECTRICAL CHARACTERISTICS(V+ = 5.0V, V- = -5.0V, -1.3V ≤VIN≤+1.3V; LOAD = +5V; internal load resistors on; AGND = DGND = 0V; TA= +25°C,unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PARAMETERCONDITIONSMINTYPMAXUNITS= +25°C3945
Operating Supply Voltage±4.5±5.5V
Offset Voltage DriftTA= TMINto TMAX20μV/°C
Buffer Offset VoltageTA= +25°C±7
Supply Current, All Buffers On
(No External Load)TA= TMINto TMAX60mA
1.53.0Supply Current, All Buffers OffTA= TMINto TMAX4mA
Power-Supply Rejection Ratio±4.5V to ±5.5V, DC measurement5064dB
Input Voltage Range-1.31.3V
TA= TMINto TMAX
Voltage Gain
V/V
Analog Input Current±0.1±10nA
Output Leakage CurrentInternal load resistors off, all buffers
off, TA= TMINto TMAX±100nA
Internal load
resistors on, no
external load,
VIN= 0V to 1V
TA= +25°C= TMINto TMAX= TMINto TMAX±12mV= +25°C= +25°C250400600Internal Amplifier Load Resistor
(LOAD Pin = 5V)TA= TMINto TMAX200765Ω
Buffer Output Voltage SwingInternal load resistors on, no external load ±1.3V
Digital Input CurrentTA= TMINto TMAX±1
Output Impedance at DC10Ω
Input Logic Low Threshold0.8V
Input Logic High Threshold2.4V
SER OUT Output Logic Low 0.4
SER OUT Output Logic High4VSerial mode,
SER/–P—A—R–= 5VIOH= -0.4mA
IOL= 1.6mA
Note 1:Guaranteed by design.
Note 2:See Dynamic Test Circuitson page 11.
Note 3:3dB typical crosstalk improvement when RS = 0Ω.
Note 4:Input test signal: 3.58MHz sine wave of amplitude 40IRE superimposed on a linear ramp (0 to 100IRE). IRE is a unit of
video-signal amplitude developed by the International Radio Engineers. 140IRE = 1.0V.
x 8 Video Crosspoint Switch
_______________________________________________________________________________________3
PARAMETERCONDITIONSMINTYPMAXUNITSAll-Channel Crosstalk5MHz, VIN= 2VP-P(Notes 2, 3)57dB
Output-Buffer Slew Rate
Internal load resistors on, 10pF load250V/μs
Single-Channel Crosstalk5MHz, VIN= 2VP-P(Note 2)6070dB
All-Channel Off Isolation5MHz, VIN= 2VP-P(Note 2)80dB
-3dB Bandwidth10pF load, VIN= 2VP-P(Note 2)2535MHz
Differential Phase Error(Note 4)1.0deg
ELECTRICAL CHARACTERISTICS(V+ = 5.0V, V- = -5.0V, -1.3V ≤VIN≤+1.3V, LOAD = +5V, internal load resistors on, AGND = DGND = 0V, TA= +25°C,
unless otherwise noted.)
Differential Gain Error(Note 4)0.5%
Input NoiseDC to 40MHz0.31.0mVRMS
Input CapacitanceAll buffer inputs grounded6pF
Buffer Input CapacitanceAdditional capacitance for each out-
put buffer connected to channel input2pF
Output CapacitanceOutput buffer off7pF
DYNAMIC SPECIFICATIONS(Note 1)
PARAMETERLatch Delay
SYMBOLMINTYP MAX80
UNITSSwitch Break-Before-Make DelaytON - tOFF15ns
LATCH Edge to Switch OfftOFF35ns
LATCH Edge to Switch OntON50ns
Write Pulse Width LowtWL80ns
Chip-Enable to Write SetuptCE0ns
Write Pulse Width HightWH80ns
Data HoldtDH0ns
Latch Pulse WidthtL80ns
CONDITIONSLATCH on
Parallel mode
32-bit serial modeData SetuptDS160ns
SWITCHING CHARACTERISTICS (Note 1)(Figure 4, V+ = 5.0V, V- = -5.0V, -1.3V ≤VIN≤+1.3V, LOAD = +5V, internal load resistors on, AGND = DGND = 0V,
TA = TMINto TMAX, unless otherwise noted.)
x 8 Video Crosspoint Switch_____________________________________________________________________________________________________________________________________________________Pin Description
Note 1:Buffer inputs are internally grounded with a 1000 or 1001 command from the D3-D0 lines. AGND must be at 0.0V since the
gain setting resistors of the buffers are internally tied to AGND.
PINNAMEFUNCTION1, 12, 23, 34N.C.No connect. Not internally connected.2D1/SER OUTParallel Data Bit D1 when SER/P—A—R–= 0V. Serial Output for cascading
multiple parts when SER/P—A—R–= 5V.3D0/SER INParallel Data Bit D0 when SER/P—A—R–= 0V. A Serial Input when
SER/P—A—R–= 5V.
3, 4, 64, 5, 7A2, A1, A0Output Buffer Address Lines
5, 7, 9, 11,
13, 15, 17, 19
6, 8, 10, 13,
15, 17, 19, 21IN0–IN7Video lnput Lines9LOAD
Asynchronous control line. When LOAD = 1, all the 400Ωinternal active
loads are on. When LOAD = 0, external 400Ωloads must be used. The
buffers MUST have a resistive load to maintain stability.
10, 1211, 14DGNDDigital Ground Pins. Both DGND pins must have the same potential and
be bypassed to AGND. DGND should be within ±0.3V of AGND.16EDGE/–L—E—V—E—L–
When this control line is high, the 2nd-rank registers are loaded with the
rising edge of the LATCH line. If this control line is low, the 2nd-rank reg-
isters are transparant when LATCH is low, passing data directly from the
1st-rank registers to the decoders.
16, 26, 4018, 29, 44V+All V+ pins must be tied to each other and bypassed to AGND
separately (Figure 2).20SER/P—A—R–5V = 32-Bit Serial, 0V = 7-Bit Parallel
20, 3422, 38V-Both V- pins must be tied to each other and bypassed to AGND
separately (Figure 2).24WRWRITEin the serial mode, shifts data in. In the parallel mode, WR loads
data into the 1st-rank registers. Data is latched on the rising edge.25LATCH
If EDGE/–L—E—V—E—L–= 5V, data is loaded from the 1st-rank registers to the 2nd-
rank registers on the rising edge of LATCH. If EDGE/–L—E—V—E—L–= 0V, data is
loaded while LATCH = 0V. In addition, data is loaded during the execution
of parallel-mode functions 1011 through 1110, or if LATCH = 5V during the
execution of the parallel-mode "software-LATCH" command (1111).26C—E––C—h—i—p— —E—n—a—b—l—e–. When–C—E–= 0V and CE = 5V, the WR line is enabled.27CEChip Enable. When –C—E–= 0V and CE = 5V, the WR line is enabled.
25, 27, 29, 31,
33, 35, 37, 39
28, 30, 32, 35,
37, 39, 41, 43OUT7-OUT0Output Buffers 7-0 (Note 1)
28, 30, 3231, 33, 36AGNDAnalog Ground must be at 0.0V since the gain resistors of the buffers are
tied to these 3 pins.40D3
Parallel Data Bit D3 when SER/ –P—A—R–= 0V. When D3 = 0V, D0-D2 specifies
the input channel to be connected to buffer. When D3 = 5V, then D0-D2
specify control codes. D3 is not used when SER/–P—A—R–= 5V.42D2Parallel Data Bit D2 when SER/–P—A—R–= 0V. Not used when
SER/–P—A—R–= 5V.
DIPPLCC
x 8 Video Crosspoint Switch_______________________________________________________________________________________5
_______________Detailed Description
Output BuffersThe MAX456 video crosspoint switch consists of 64
T-switches in an 8 x 8 grid (Figure 1). The 8 matrix out-
puts are followed by 8 wideband buffers optimized for
driving 400Ωand 20pF loads. Each buffer has an
internal active load on the output that can be readily
shut off via the LOAD input (off when LOAD = 0V). The
shut-off is useful when two or more MAX456 circuits are
connected in parallel to create more input channels.
With more input channels, only one set of buffers can
be active and only one set of loads can be driven.
And, when active, the buffer must have either
1) an internal load, 2) the internal load of another buffer
in another MAX456, or 3) an external load.
Each MAX456 output can be disabled under logic con-
trol. When a buffer is disabled, its output enters a high-
impedance state. In multichip parallel applications, the
disable function prevents inactive outputs from loading
lines driven by other devices. Disabling the inactive
buffers reduces power consumption.
The MAX456 outputs connect easily to MAX470 quad,
gain-of-two buffers when 75Ωloads must be driven.
Power-On RESETThe MAX456 has an internal power-on reset (POR) cir-
cuit that remains low for 5μs when power is applied.
POR also remains low if the total supply voltage is less
than 4V. The POR disables all buffer outputs at
power-up, but the switch matrix is not preset to any ini-tial condition. The desired switch state should be pro-
grammed before the buffer outputs are enabled.
___________________Digital InterfaceThe desired switch state can be loaded in a 7-bit paral-
lel-interface mode or 32-bit serial-interface mode (see
Table 3 and Figures 4-6). All action associated with the
WR line occurs on its rising edge. The same is true for
the LATCH line if EDGE/–L—E—V—E—L–is high. Otherwise, the
second-rank registers update while LATCH is low
(when EDGE/–L—E—V—E—L–is low). WR is logically ANDed with
CE and –C—E–to allow active-high or active-low chip
enable.
7-Bit Parallel ModeIn the parallel-interface mode, the 7 data bits A2-A0
and D3-D0 specify an output channel (A2-A0) and the
input channel to which it connects (D3-D0). The data is
loaded on the rising edge of WR. The 8 input channels
are selected by 0000 through 0111 (D3-D0). The
remaining 8 codes (1000-1111) control other MAX456
functions, as listed in Table 1.
32-Bit Serial-Interface ModeIn serial mode (SER/–P—A—R–= high), all first-rank registers
are loaded with data, making it unnecessary to specify
an output address (A2, A1, A0). The input data format
is D3-D0, starting with OUT0 and ending with OUT7 for
32 total bits. Only codes 0000 through 1010 are valid.
Code 1010 disables a buffer, while code 1001 enables
it. After data is shifted into the 32-bit first-rank register,
it is transferred to the second rank by the LATCH line
(see Table 2).
x 8 Video Crosspoint Switch_______________________________________________________________________________________Table 1. Parallel-Interface Mode Functions
A2-A0D3-D0FUNCTION0000 to 0111Connect the buffer selected by A2-A0 to the input channel selected by D3-D0.
1000Connect the buffer selected by A2-A0 to DGND. Note, if the buffer output is on, its output
is its offset voltage.
1011Shut off the buffer selected by A2-A0, and retain 2nd-rank contents.
1100Turn on the buffer selected by A2-A0, or restore the previously connected channel.
1101Turn off all buffers, or leave 2nd-rank registers unchanged.
1110Turn on all buffers, or restore the previously connected channels.
Send a pulse to the 2nd-rank registers to load them with the contents of the 1st-rank
registers. When latch is held high, this "software-LATCH" command performs the same
function as pulsing LATCH low.
Selects
Output
Buffer,
OUT0
OUT7
1001 and 1010Do not use these codes in the parallel-interface mode. These codes are for the serial-
interface mode only.
Table 2. Serial-Interface Mode Functions
D3-D0FUNCTION0000 to 0111Connect the selected buffer to the input
channel selected by D3-D0.
Connect the input of the selected buffer to
GND. Note, if the buffer output remains
on, its input is its offset voltage.
Turn on the selected buffer and connect
its input to GND. Use this code to turn on
buffers after power is applied. The default
power-up state is all buffers disabled.
Shut off the selected buffer at the speci-
fied channel, and erase data stored in the
2nd rank of registers. The 2nd rank now
holds the command word 1010.
1011 to 1111
Do not use these codes in the serial-inter-
face mode. They inhibit the latching of the
2nd-rank registers, which prevents proper
data loading.
