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MAX4399CTK+ |MAX4399CTKMAXIMN/a30avaiAudio/Video Switch for Three SCART Connectors


MAX4399CTK+ ,Audio/Video Switch for Three SCART ConnectorsApplicationsRGBCVBSSTBENCODERSatellite ReceiversTV SCARTR/L AUDIOR/L AUDIO CONNECTORSatellite Set-T ..
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MAX4400AUK-T ,Single/Dual/Quad / Low-Cost / Single-Supply / Rail-to-Rail Op Amps with ShutdownELECTRICAL CHARACTERISTICS (continued)(V = +5V, V = 0, V = 0, V = V /2, R = ∞ connected to V /2, SH ..
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MAX4399CTK+
Audio/Video Switch for Three SCART Connectors
General Description
The MAX4399 audio/video switch is ideal for digital set-
top box applications. The MAX4399 provides video and
audio routing from the MPEG decoder source to the TV,
VCR, and AUX SCART (peritelevision) connectors. In
addition, the TV audio channel features clickless
switching and programmable volume control from
-56dB to +6dB in 2dB steps. The device can mix an
auxiliary audio tone into the TV audio channel and can
mix the stereo audio signal into a mono audio signal.
The MAX4399 directly drives an external RF modulator
with a composite video with blanking and sound
(CVBS) signal created by an on-chip luma/chroma
(Y/C) mixer and external RLC trap filter. The MAX4399
features a fast-mode I2C-compatible 2-wire interface
allowing communication at data rates up to 400kbps.
The MAX4399 operates with standard +5V and +12V
single supplies and supports slow and fast switching.
All video and audio inputs are AC-coupled. The DC
biases of all input and output signals are set to pre-
defined levels. All video outputs, including the RF mod-
ulator, drive standard 150Ωloads. Red, green, and
blue (RGB) outputs feature a programmable gain of
+6dB ±1dB. All other video outputs have a fixed +6dB
gain. The VCR and AUX audio output gains are pro-
grammable for -6dB, 0dB, and +6dB.
The MAX4399 is available in a compact 68-pin thin
QFN package and is specified for the 0°C to +70°C
commercial temperature range. The MAX4399 evalua-
tion kit is available to help speed designs.
Applications

Satellite Receivers
Satellite Set-Top Boxes
Cable Set-Top Boxes
Terrestrial Set-Top Boxes
Game Consoles
TVs
Digital Television (DTV)
VCRs
DVD Players
DVD+R/W Players
Features
Low -86dB Video Signal-to-Noise Ratio150ΩDriver on All Video Outputs, Including the
RF Modulator
Full CVBS Loop-Through on AUX SCARTProgrammable Audio Gain Control of -56dB to
+6dB (TV Audio Outputs)
Clickless Audio Switching (TV Audio Outputs) Programmable Clamp or Bias on Red/Chroma
Video Inputs
Programmable Video Gain of +6dB, ±1dB on RGB
Outputs
+5V and +12V Standard Supply Voltages27MHz -3dB Large-Signal Bandwidth on All Video
Drivers
Supports Three SCART Connectors
MAX4399
Audio/Video Switch for Three SCART
Connectors
Ordering Information

MAX4399
SCART
SWITCH
MATRIX
I2C-COMPATIBLE
2-WIRE INTERFACE
STB
ENCODER
RGB
S-VHS
CVBS
R/L AUDIO
FAST SWITCHING
VCR SCART
CONNECTOR
TONE INPUT
CVBS
S-VHS
RGB
R/L AUDIO
FAST SWITCHING
SLOW SWITCHING
TV SCART
CONNECTOR
AUXILIARY
SCART
CONNECTOR
CHANNEL
3/4 RF
MODULATOR
SUBCARRIER TRAP
CVBS
S-VHS
RGB
R/L AUDIO
SLOW SWITCHING
FAST SWITCHING
CVBS
MONO AUDIO
R/L PHONO AUDIO
CVBS
S-VHS
R/L AUDIO
SLOW SWITCHING
VIDEO
GROUND
DIGITAL
GROUND
AUDIO
GROUND
VIDEO
+5V
DIGITAL
+5V
AUDIO
+12V
SATELLITE DISH
Typical Operating Circuit

19-2925; Rev 1; 7/06
EVALUATION KIT
AVAILABLE
PARTTEMP RANGEPIN-PACKAGEPKG CODE

MAX4399CTK0°C to +70°C68 Thin QFNT6800-3
MAX4399
Audio/Video Switch for Three SCART
Connectors
ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltages
V_VID to G_VID.....................................................-0.3V to +6V
V12 to G_AUD.....................................................-0.3V to +14V
V_DIG to G_DIG....................................................-0.3V to +6V
G_AUD to G_DIG...............................................-0.1V to +0.1V
G_VID to G_DIG.................................................-0.1V to +0.1V
G_AUD to G_VID................................................-0.1V to +0.1V
Video Inputs, Video Outputs, ENC_FS_IN, VCR_FS_IN,
VID_BIAS, TRAP................................-0.3V to (VV_VID+ 0.3V)
V_AUD to G_AUD................................................-0.3V to +9V
Audio Inputs, Audio Outputs,
AUD_BIAS........................................-0.3V to (VV_AUD+ 0.3V)
SDA, SCL, DEV_ADDR, INTERRUPT_OUT.........-0.3V to +6V
AUX_SS, TV_SS, VCR_SS....................-0.3V to (VV12+ 0.3V)
Currents
INTERRUPT_OUT..........................................................+50mA
TRAP................................................................................±4mA
Output Short Circuit
Video Outputs and TV_FS_OUT to V_VID,
V_DIG, G_AUD, G_VID, or G_DIG........................Continuous
Audio Outputs to V_AUD, V_VID, V_DIG,
G_AUD, G_VID, or G_DIG.....................................Continuous
AUX_SS, TV_SS, and VCR_SS to V12,
V_AUD, V_VID, V_DIG, G_AUD,
G_VID, or G_DIG...................................................Continuous
Continuous Power Dissipation (TA= +70°C)
68-Pin Thin QFN (derate 41.7mW/°C
above +70°C).........................................................3333.3mW
Operating Temperature Range...............................0°C to +70°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
ELECTRICAL CHARACTERISTICS

(VV12= 12V, VV_VID= 5V, VV_DIG= 5V, 0.47µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from V_AUD to
G_AUD, no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

V12 Supply Voltage RangeInferred from the slow switch output levels11.41212.6V
V_VID Supply Voltage RangeInferred from the output swing of the video
outputs4.7555.25V
V_DIG Supply Voltage Range4.7555.25V
V12 Quiescent Supply Current1735mA
V_VID Quiescent Supply CurrentAll video output amplifiers are enabled, no
load51116mA
V_VID Standby Supply CurrentAll video output amplifiers are in shutdown,
and TV_FS_OUT driver is in shutdown1934mA
V_DIG Quiescent Supply Current13mA
VIDEO

CVBS and S-VHS5.566.5
R, G, B, gain = 5dB4.555.5
R, G, B, gain = 6dB5.566.5Voltage Gain1VP-P input
R, G, B, gain = 7dB6.577.5
CVBS and S-VHS110Small-Signal Bandwidth, -3dB100mVP-P input,
gain = 6dBR, G, B110MHz
CVBS and S-VHS1527
Large-Signal Bandwidth, -3dB
1VP-P input, gain
= 6dB, TA =
+25°C (Note 2)R, G, B30
MHz
MAX4399
Audio/Video Switch for Three SCART
Connectors
ELECTRICAL CHARACTERISTICS (continued)

(VV12= 12V, VV_VID= 5V, VV_DIG= 5V, 0.47µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from V_AUD to
G_AUD, no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Slew RateSR1VP-P input, gain = 6dB170V/µs
Gain Matching1VP-P input, between RGB or Y-C-0.50+0.5dB
RF_CVBS_OUT0.03
Differential GainDG
5-step
modulated
staircaseAll other video outputs0.13
RF_CVBS_OUT0.09
Differential PhaseDP
5-step
modulated
staircaseAll other video outputs0.36
degrees
Signal-to-Noise RatioSNR1VP-P input-86dB
RF_CVBS_OUT5Group Delayf = 0.1MHz to
6MHzAll other video outputs3ns
Bottom Level ClampRGB, composite and luma, no signal, no
load1.21V
Chroma BiasChroma only, no signal, no load1.88V
Sync Crush
Percentage reduction in sync pulse
(0.3VP-P); inferred from input clamping
current with a 0.1µF coupling capacitor0+2%
Power-Supply Rejection RatioPSRRf = 100kHz, 0.5VP-P60dB
CVBS, Y, or RGB video input4MΩInput ImpedanceChroma video input11kΩ
Input Clamp CurrentVIN = 1.75V2.54.28.0µA
RGB, composite, and
luma1.05Output Bias VoltageNo signal, no
load
Chroma2.24
Pulldown ResistanceVCR_R/C_OUT, AUX_R/C_OUT,
TV_R/C_OUT10Ω
Crosstalkf = 4.43MHz, 1VP-P input, between any two
active inputs-63dB
Mute Suppressionf = 4.43MHz, 1VP-P input, on one input-65dB
AUDIO

V_AUD VoltageGenerated by internal linear regulator8.1V
Voltage Gain1.414VP-P input, gain = 0dB-0.250+0.25dB
Gain Matching Between
Channels1.414VP-P input, gain = 0dB-0.50+0.5dB
Gain Flatnessf = 20Hz to 20kHz, 0.5VRMS input, gain =
0dB0.005dB
Frequency Bandwidth0.5VRMS input; frequency where output is
-3dB with 1kHz serving as 0dB210kHz
MAX4399
Audio/Video Switch for Three SCART
Connectors
ELECTRICAL CHARACTERISTICS (continued)

(VV12= 12V, VV_VID= 5V, VV_DIG= 5V, 0.47µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from V_AUD to
G_AUD, no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Input DC LevelGain = 0dBV_AUD/2V
Input Signal AmplitudeInferred through total harmonic distortion
specification, f = 1kHz2VRMS
Input Resistance100kΩ
Output DC LevelV_AUD/2V
Signal-to-Noise RatioSNRf = 1.0kHz, 1VRMS, gain = 0dB, 20Hz to
20kHz105dB
f = 1.0kHz, 0.5VRMS0.002Total Harmonic DistortionTHDRLOAD = 10kΩf = 1.0kHz, 2VRMS0.005%
Output Impedance0.5Ω
TV audio, volume control
range extends from -56dB
to +6dB
1.522.5Volume Attenuation Step1.414VP-P
input
VCR, AUX audio5.566.5
Power-Supply Rejection RatioPSRRf = 1kHz, 0.5VP-P110dB
Mute Suppressionf = 1kHz, 0.5VRMS input105dB
Audio Limiter Levelf = 1kHz, 2.5VRMS input6.7VP-P
Crosstalkf = 1kHz, 0.5VRMS, gain = 0dB105dB
DIGITAL INTERFACE: SDA and SCL

Low-Level Input VoltageVIL0.8V
High-Level Input VoltageVIH2.6V
Hysteresis of Schmitt Trigger
Input0.2V
ISINK = 3mA00.4SDA Low-Level Output VoltageVOLISINK = 6mA00.6V
Output Fall Time for SDA Line400pF bus load250ns
Spike Suppression50ns
Input CurrentVIL = 0V, VIH = 5V-10+10µA
Input Capacitance5pF
SCL Clock Frequency0400kHz
Hold TimetHD,STARepeated start condition0.6µs
Low Period of SCL ClocktLOW1.3µs
High Period of SCL ClocktHIGH0.6µs
Setup Time for a Repeated Start
ConditiontSU,STA0.6µs
Data Hold TimetHD,DAT00.9µs
Data Setup TimetSU,DAT100ns
Maximum Receive SCL/SDA Rise
TimetR(Note 3)300ns
MAX4399
Audio/Video Switch for Three SCART
Connectors
ELECTRICAL CHARACTERISTICS (continued)

(VV12= 12V, VV_VID= 5V, VV_DIG= 5V, 0.47µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from V_AUD to
G_AUD, no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Minimum Receive SCL/SDA Rise
Time (Note 3)tR20 +
0.1CBns
Maximum Receive SCL/SDA Fall
Time (Note 3)tF300ns
Minimum Receive SCL/SDA Fall
Time (Note 3)tF20 +
0.1CBns
Setup Time for Stop ConditiontSU,STO0.6µs
Bus Free Time Between a Stop
and StarttBUF1.3µs
OTHER DIGITAL PINS

DEV_ADDR Low Level0.8V
DEV_ADDR High Level2.6V
INTERRUPT_OUT Low VoltageINTERRUPT_OUT sinking 1mA0.150.4V
INTERRUPT_OUT High Leakage
CurrentVINTERRUPT_OUT = 5V110µA
SLOW SWITCHING

Input Low Level02V
Input Medium Level4.57.0V
Input High Level9.512.0V
Input Current50100µA
Output Low LevelRLOAD = 10kΩ to ground01.5V
Output Medium Level (External
16/9)RLOAD = 10kΩ to ground5.06.5V
Output High Level (External 4/3)RLOAD = 10kΩ to ground1012V
FAST SWITCHING

Input Low Level00.4V
Input High Level13V
Input Current110µA
Output Low LevelISINK = 0.5mA00.010.2V
Output High LevelV_VID - VOH, ISOURCE = 20mA0.752V
Fast-Switching Output to RGB
Skew
Difference in propagation delays of fast-
switching signal and RGB signals;
measured from 50% input transition to 50%
output transitionns
Fast-Switching Output Rise TimeRLOAD = 150Ω to ground30ns
Fast-Switching Output Fall TimeRLOAD = 150Ω to ground30ns
Note 1:
All devices are 100% tested at TA= +25°C. All temperature limits are guaranteed by design.
Note 2:
Parameter guaranteed by design.
Note 3:
CB= total capacitance of one bus line in pF. Tested with CB= 400pF.
MAX4399
Audio/Video Switch for Three SCART
Connectors
Typical Operating Characteristics

(VV12= 12V, VV_VID= 5V, VV_DIG= 5V, 0.47µF ceramic X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from
V_AUD to G_AUD, no load, TA= +25°C, unless otherwise noted.)
RGB VIDEO LARGE-SIGNAL BANDWIDTH
vs. FREQUENCY

MAX4399 toc01
FREQUENCY (MHz)
GAIN (dB)1
VIN = 1VP-P
RL = 150Ω to G_VID
Y VIDEO LARGE-SIGNAL BANDWIDTH
vs. FREQUENCY

MAX4399 toc02
FREQUENCY (MHz)
GAIN (dB)1
VIN = 1VP-P
RL = 150Ω to G_VID
RGB VIDEO SMALL-SIGNAL BANDWIDTH
vs. FREQUENCY

MAX4399 toc03
FREQUENCY (MHz)
GAIN (dB)1
VIN = 100mVP-P
RL = 150Ω to G_VID
Y VIDEO SMALL-SIGNAL BANDWIDTH
vs. FREQUENCY

MAX4399 toc04
FREQUENCY (MHz)
GAIN (dB)1
VIN = 100mVP-P
RL = 150Ω to G_VID
VIDEO CROSSTALK
vs. FREQUENCY

MAX4399 toc05
FREQUENCY (MHz)
CROSSTALK (dB)1
VIN = 100mVP-P
RL = 150Ω to G_VID
RF_CVBS_OUT (WITH TRAP FILTER)

MAX4399 toc06
DIFFERENTIAL PHASE (deg)2456724567
DIFFERENTIAL GAIN (%)
RL = 150Ω to G_VID
RL = 150Ω to G_VID
RF_CVBS_OUT (WITHOUT TRAP FILTER)

MAX4399 toc07
DIFFERENTIAL PHASE (deg)
DIFFERENTIAL GAIN (%)
RL = 150Ω to G_VID
RL = 150Ω to G_VID0.2
TV_Y/CVBS_OUT
MAX4399 toc08
DIFFERENTIAL PHASE (deg)2456724567
DIFFERENTIAL GAIN (%)
RL = 150Ω to G_VID
RL = 150Ω to G_VID0.5
AUDIO LARGE-SIGNAL
BANDWIDTH vs. FREQUENCY
MAX4399 toc09
FREQUENCY (kHz)
GAIN (dB)
VIN = 0.5VRMS
RL = 10kΩ to G_AUD
MAX4399
Audio/Video Switch for Three SCART
Connectors
AUDIO THD+N vs. FREQUENCY

MAX4399 toc11
FREQUENCY (kHz)
THD+N (%)10.1
V = 1.5VRMS
V = 1.0VRMS
V = 0.5VRMS
RL = 10kΩ to G_AUD
AUDIO CROSSTALK vs. FREQUENCY

MAX4399 toc10
FREQUENCY (kHz)
CROSSTALK (dB)10.1
V = 0.5VRMS
RL = 10kΩ to G_AUD255075
V_VID QUIESCENT SUPPLY
CURRENT vs. TEMPERATURE

MAX4399 toc12
TEMPERATURE (°C)
V_VID QUIESCENT SUPPLY CURRENT (mA)
ALL VIDEO OUTPUT
AMPLIFIERS ENABLED255075
V_VID STANDBY QUIESCENT SUPPLY
CURRENT vs. TEMPERATURE

MAX4399 toc13
TEMPERATURE (°C)
V_VID STANDBY SUPPLY CURRENT (mA)
ALL VIDEO OUTPUT
AMPLIFIERS DISABLED
V_DIG QUIESCENT SUPPLY CURRENT
vs. TEMPERATURE
MAX4399 toc14
TEMPERATURE (°C)
V_DIG SUPPLY CURRENT (mA)255075
V12 QUIESCENT SUPPLY CURRENT
vs. TEMPERATURE

MAX4399 toc15
TEMPERATURE (°C)
V12 SUPPLY CURRENT (mA)
V_AUD vs. TEMPERATURE

MAX4399 toc16
TEMPERATURE (°C)
V_AUD (V)25
INPUT CLAMP AND BIAS LEVEL
vs. TEMPERATURE
MAX4399 toc17
TEMPERATURE (°C)
INPUT CLAMP AND BIAS LEVEL (V)25
BIAS
BOTTOM-LEVEL
CLAMP
INPUT CLAMP CURRENT
vs. TEMPERATURE
MAX4399 toc18
TEMPERATURE (°C)
INPUT CLAMP CURRENT (
VIN = 1.75Vypical Operating Characteristics (continued)
(VV12= 12V, VV_VID= 5V, VV_DIG= 5V, 0.47µF ceramic X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from
V_AUD to G_AUD, no load, TA= +25°C, unless otherwise noted.)
MAX4399
Audio/Video Switch for Three SCART
Connectors
Pin Description
PINNAMEFUNCTION
V_DIGDigital Supply Voltage. Connect to 5V.DEV_ADDRDevice Address Set Input. Connect to G_DIG to set write and read addresses of 94h and 95h,
respectively. Connect to V_DIG to set write and read addresses of 96h and 97h, respectively.SDABidirectional Data I/O. I2C-compatible, 2-wire interface data input/output. Output is open drain.SCLClock Input. I2C-compatible, 2-wire interface clock.INTERRUPT_OUTInterrupt Output. INTERRUPT_OUT is an open-drain output that goes high impedance to
indicate a change in the slow switch lines, AUX_SS, TV_SS, or VCR_SS.G_DIGDigital GroundENC_L_INDigital Encoder Left-Channel Audio InputST_AUX_INSatellite Dish Tone InputENC_R_INDigital Encoder Right-Channel Audio InputAUD_BIASAudio Input Bias Voltage. Bypass AUD_BIAS with a 10µF capacitor and a 0.1µF capacitor to
G_AUD.
11, 22, 30V_AUD
Audio Supply Voltage. Connect all V_AUD together. An on-board linear regulator creates the
+8V audio supply voltage from V12. Bypass pin 30 with a 10µF aluminum electrolytic capacitor
in parallel with a 0.47µF low-ESR ceramic capacitor to audio ground, and bypass pins 11 and
22 with 0.1µF capacitors to audio ground.AUX_L_INAUX SCART Left-Channel Audio InputAUX_R_INAUX SCART Right-Channel Audio InputVCR_R_INVCR SCART Right-Channel Audio InputVCR_L_INVCR SCART Left-Channel Audio Inputypical Operating Characteristics (continued)
(VV12= 12V, VV_VID= 5V, VV_DIG= 5V, 0.47µF ceramic X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from
V_AUD to G_AUD, no load, TA= +25°C, unless otherwise noted.)
INPUT CLAMP CURRENT
vs. INPUT VOLTAGE

MAX4399 toc19
INPUT VOLTAGE (V)
INPUT CLAMP CURRENT (mA)321
OUTPUT BIAS VOLTAGE
vs. TEMPERATURE
MAX4399 toc20
TEMPERATURE (°C)
OUTPUT BIAS VOLTAGE (V)25
RGB, LUMA, CVBS
CHROMA
MAX4399
Audio/Video Switch for Three SCART
Connectors
PINNAMEFUNCTION
TV_L_INTV SCART Left-Channel Audio Input
18, 26G_AUDAudio GroundAUX_L_OUTAUX SCART Left-Channel Audio OutputAUX_R_OUTAUX SCART Right-Channel Audio OutputVCR_R_OUTVCR SCART Right-Channel Audio OutputVCR_L_OUTVCR SCART Left-Channel Audio OutputPHONO_R_OUTHi-Fi Right-Channel Audio OutputPHONO_L_OUTHi-Fi Left-Channel Audio OutputRF_MONO_OUTRF Modulator Mono Audio OutputTV_L_OUTTV SCART Left-Channel Audio OutputTV_R_OUTTV SCART Right-Channel Audio OutputV12+12V Supply. Bypass V12 with a 10µF capacitor in parallel with a 0.1µF capacitor to ground.AUX_SSAUX SCART Bidirectional Slow-Switch SignalTV_SSTV SCART Bidirectional Slow-Switch SignalVCR_SSVCR SCART Bidirectional Slow-Switch SignalTRAP
Trap Filter. Connect a series RLC trap filter to eliminate the color subcarrier frequency
(4.43MHz) from the luma signal. The filter prevents cross-mixing of the color subcarriers when
the luma and chroma signals are added together to form a composite signal. Internally biased
at +0.5V.
36, 42, 50G_VIDVideo GroundTV_FS_OUTTV SCART Fast-Switching Output. This signal is used to switch the TV to its RGB inputs for on-
screen display purposes.
38, 46, 61V_VIDVideo Supply. Bypass each V_VID with a 0.01µF capacitor to V_GND. Connect a 200nH ferrite
bead from V_VID to a 5V supply.RF_CVBS_OUTRF Modulator Composite Video Output. Internally biased at 1.0V.TV_Y/CVBS_OUTTV SCART Luma/Composite Video Output. Internally biased at 1.0V.TV_R/C_OUTTV SCART Red/Chroma Video Output. Internally biased at 1.0V for red video signal and 2.1V
for chroma video signal.TV_G_OUTTV SCART Green Video Output. Internally biased at 1.0V.TV_B_OUTTV SCART Blue Video Output. Internally biased at 1.0V.AUX_R/C_OUTAUX SCART Red/Chroma Video Output. Internally biased at 1.0V for red video signal and 2.1V
for chroma video signal.AUX_Y/CVBS_OUTAUX SCART Luma/Composite Video Output. Internally biased at 1.0V.VCR_Y/CVBS_OUTVCR SCART Luma/Composite Video Output. Internally biased at 1.0V.VCR_R/C_OUTVCR SCART Red/Chroma Video Output. Internally biased at 1.0V for red video signal and 2.1V
for chroma video signal.VID_BIASVideo Bias Voltage Output. VID_BIAS sets video bias level for chroma signals. Bypass
VID_BIAS with a low-ESR 0.1µF capacitor to G_VID.TV_R/C_INTV SCART Red/Chroma Video Input. Internally biased at 1.22V for red, or 1.8V for chroma.
Pin Description (continued)
MAX4399
Detailed Description

The MAX4399 audio/video switch matrix connects audio
and video signals between different ports. In the case of
a set-top box, the ports consist of the MPEG decoder
and three SCART connectors. For DVD+RW recorders
and some televisions, the ports consist of the main
board, front panel, tuner, and two SCART connectors.
The video section consists of input buffers, a crosspoint
switch, and output drivers that can be disabled. There
is also a mixer, which creates a composite video signal
from S-video. The video inputs can be set in either
clamp or bias mode. The red/chroma outputs have pull-
downs that connect the outputs to video ground as
described in the Video Inputssection.
The audio section features input buffers, a crosspoint
switch, and output drivers. The TV audio path has vol-
ume control from -56dB to +6dB in 2dB steps. The VCR
and AUX audio paths have volume control from -6dB to
+6dB in 6dB steps. The MAX4399 can be configured to
switch inputs during a zero crossing to reduce clicks.
The MAX4399 can also switch volume levels during a
zero crossing to reduce zipper noise. The audio out-
puts can operate in different modes. For instance, left
and right audio channels can be swapped (see the
Audio Outputssection).
The MAX4399 has two fast-switching inputs and one
fast-switching output. Fast switching is used for creat-
ing on-screen displays by switching between the CVBS
and RGB signals. Under I2C-compatible control, the
fast-switching output can follow either of the fast-
switching inputs or be set high or low.
The MAX4399 features three slow-switching input/out-
puts to support slow switching, which sets the screen
aspect ratio or video source of the display device. The
slow switching relies on tri-level logic in which the levels
are 0V, 6V, and 12V. The status of the slow-switching
input is continuously read and stored in register 0Eh. If
INTERRUPT_OUT is enabled, then INTERRUPT_OUT
changes to a high-impedance state if any of the slow-
switching inputs change logic levels. The slow-switching
outputs can be set to a logic level or high impedance by
writing to registers 07h, 09h, or 0Bh.
The MAX4399 can be configured through an I2C-com-
patible interface. DEV_ADDR sets the I2C-compatible
address.
SCART Video Switching

The MAX4399 triple SCART audio/video switch
includes multiplexed video amplifiers and a Y-C mixer-
driver with a trap filter to drive an RF modulator. The
MAX4399 switches video from an MPEG decoder out-
put and TV, VCR, and AUX SCART connectors.
Audio/Video Switch for Three SCART
Connectors
Pin Description (continued)
PINNAMEFUNCTION
TV_Y/CVBS_INTV SCART Luma/Composite Video Input. Internally biased at 1.22V.AUX_R/C_INAUX SCART Red/Chroma Video Input. Internally biased at 1.22V for red, or 1.8V for chroma.AUX_Y/CVBS_INAUX SCART Luma/Composite Video. Internally biased at 1.22V.VCR_Y/CVBS_INVCR SCART Luma/Composite Video Input. Internally biased at 1.22V.VCR_FS_INVCR SCART Fast-Switching InputVCR_R/C_INVCR SCART Red/Chroma Video Input. Internally biased at 1.22V for red, or 1.8V for chroma.VCR_G_INVCR SCART Green Video Input. Internally biased at 1.22V.VCR_B_INVCR SCART Blue Video Input. Internally biased at 1.22V.ENC_Y/CVBS_INDigital Encoder Luma/Composite Video Input. Internally biased at 1.22V.ENC_R/C_INDigital Encoder Red/Chroma Video Input. Internally biased at 1.22V for red, or 1.8V for
chroma.ENC_G_INDigital Encoder Green Video Input. Internally biased at 1.22V.ENC_B_INDigital Encoder Blue Video Input. Internally biased at 1.22V.ENC_Y_INDigital Encoder Luma Video Input. Internally biased at 1.22V.ENC_C_INDigital Encoder Chroma Video Input. Internally biased at 1.8V.ENC_FS_INDigital Encoder Fast-Switching Input
The inputs and outputs are grouped by SCART connec-
tors: TV, VCR, and AUX. While the SCART connector
supports RGB, S-video, and composite formats, RGB
and S-video share a bidirectional set of SCART connec-
tor pins. The MAX4399 supports connection of auxiliary
devices (DVD players, DVD+R/W recorders, game con-
soles, camcorders, etc.) by including full I/O support for
an auxiliary (AUX) SCART connector.
Video Inputs

All of the video amplifier inputs are AC-coupled with an
external 0.1µF capacitor. Either a clamp or bias circuit
sets the DC input level of the video signals. The clamp
circuit positions the sync tip of the CVBS, RGB, or luma
(S-VHS) signals. If the signal does not have sync, then
the clamp positions the minimum of the signal at the
clamp voltage. The bias circuit positions the chroma sig-
nal (S-VHS) at its midlevel. On the video inputs that can
receive either a chroma or a red video signal, the 2-wire
interface sets whether the clamp or bias circuit is active.
Red/chroma signals, such as TV_R/C_OUT signals are
bidirectional. When the red/chroma signal is being
used as an input, then the red/chroma output must con-
nect the 75Ωback-termination resistor to ground, as
shown in Figure1, so the transmitting device can see
the proper termination on the receiving side. The
MAX4399 provides an active pulldown to G_VID on all
red/chroma outputs (AUX_R/C_OUT, TV_R/C_OUT, and
VCR_R/C_OUT).
The MPEG decoder and VCR uses the RGB format to
insert an on-screen display (OSD), usually text, onto the
TV. A fast-switching signal controls whether the RGB
signals or composite video signal appear on the TV.
The MAX4399 supports RGB as an input from either the
VCR or the MPEG decoder and as an output only to the
TV. The red video signal of the RGB format and the
chroma video signal of the S-VHS format share the
same SCART connector pin; therefore RGB signals and
S-VHS signals cannot be present at the same time.
Loop-through is possible with a composite video signal
but not with RGB signals because the RGB SCART pins
are used for both input and output.
The VCR, MPEG decoder, auxiliary device, and TV use
the S-VHS format, which is the high-quality format for the
home today. The MAX4399 supports S-VHS as an input
from the VCR, MPEG decoder, auxiliary device, and TV,
and as a separately switchable output to the TV, VCR,
and AUX SCART connectors. Because S-VHS support
was not included in the original specification of the
SCART connector, the Y signal of S-VHS and the CVBS
signal share the same SCART connector pins. If S-VHS
is present, then a composite signal must be created
MAX4399
Audio/Video Switch for Three SCART
Connectors

CLAMP/BIAS
CLAMP
CLAMP/BIAS
CLAMP
TV_R/C_IN
VIDEO INPUT
TV_R/C_IN
VIDEO INPUT
PIN 15
PIN 13
75Ω
0.1μF0.1μF
75ΩPIN 15
PIN 13
MAX4399MAX4399
VGA
5dB, 6dB, 7dB
VGA
5dB, 6dB, 7dB
TV_R/C_OUTTV_R/C_OUT
PULL-
DOWN
PULL-
DOWN
SCART
CABLE
SCART
CONNECTORS
Figure 1. Bidirectional SCART Pins
MAX4399
from the Y and C signals to drive the legacy
RF_CVBS_OUT output. The circuit is shown as a sum-
ming point with bias in Figure2. The MAX4399 sums Y
and C to get CVBS, and the bias provides the DC levels
for offsetting the chroma signal. Again, loop-through is
not possible with S-VHS because the chroma SCART
pin is used for both input and output.
The MAX4399 supports the CVBS format, with inputs
from the VCR, MPEG decoder, TV, and auxiliary device.
Full loop-through is possible to all devices except the
MPEG decoder because the SCART connector has
separate input and output pins for the CVBS format.
Slow Switching

The MAX4399 supports the tri-level slow switching of
IEC 933-1, Amendment 1, which selects the aspect ratio
for the display device. Under I2C-compatible control,
the MAX4399 sets the slow-switching output levels. Table
1 shows the valid output levels of the slow-switching
signal and the corresponding operating modes of the
display device.
The slow-switching SCART pins are bidirectional. The
MAX4399 can set the slow-switch output drivers to high-
impedance mode to receive signals. When enabled,
INTERRUPT_OUT becomes high impedance if the
voltage level changes on TV_SS, VCR_SS, or AUX_SS.
The VCR or MPEG decoder outputs a fast-switching
signal to the display device. The fast-switching signal
can also be set to a constant high or low through the 2-
wire interface. The pass-through delay from VCR to TV
or MPEG decoder to TV matches that of the RGB sig-
nals facilitating proper OSD insertion.
Video Outputs

The DC level at the video outputs is controlled so cou-
pling capacitors are not required, and all of the video
outputs are capable of driving a 150Ω, back-terminated
coax load directly with respect to ground. Since some
televisions and VCRs use the horizontal sync height for
automatic gain control, the MAX4399 accurately repro-
duces the sync height to within ±2%.
Y/C Mixer and Trap Filter

The MAX4399 includes an on-chip mixer to produce
CVBS from Y and C. The Y signal input to the mixer has
an external trap filter connection, TRAP, to eliminate the
color subcarrier frequency (4.43MHz), preventing
cross-mixing of the subcarriers in the mixer. TRAP is
internally biased at 0.5V. Connect a series RLC filter to
G_VID, or leave TRAP unconnected if not used.
SCART Audio Switching
Audio Inputs

The audio block has four stereo audio inputs from the TV,
VCR, and AUX SCART connectors, plus the MPEG
decoder. Additionally, the MAX4399 provides a satellite
tone input. Each input has a 100kΩresistor connected to
an internally generated voltage equal to 0.5 x V_AUD.
There are three main sections—the TV channel, the VCR
channel, and the AUX channel.
Audio Outputs

Each channel has a stereo output and the TV channel
has an additional phono output and a mono output. The
phono outputs always follow the TV audio input selec-
tion. The mono output, a mix of the TV right and left
channels, drives the channel 3/4 RF modulator. The
three stereo outputs can be configured to normal
mode, swap mode, mono, both channels to right input,
and both channels to left input. The latter two modes
are useful if the left audio channel carries one language
and the right audio channel carries another language.
The phono output is ideal for connection to a hi-fi, and
carries the same signals as the TV output when
switched to normal mode.
The mono mixer, a resistor summer, attenuates the
amplitude of each of the two signals by 6dB. The 3dB
gain block, which follows the mono mixer (Figures 3
and 4), is a compromise between a 0dB gain block and
a 6dB gain block. If the left and right audio channels
were completely uncorrelated, then a 6dB gain block
could be used. If the left and right channels were com-
pletely correlated, then a 0dB block would have to be
used. In reality, most stereo audio channels are partial-
ly correlated and hence a 3dB gain block was used.
Audio/Video Switch for Three SCART
Connectors
SLOW-SWITCHING
SIGNAL VOLTAGE (V)MODE

0 to 2
Display device uses an internal
source such as a built-in tuner to
provide a video signal
4.5 to 7
Display device uses a video signal
from the SCART connector and sets
the display to 16:9 aspect ratio
9.5 to 12.6
Display device uses a signal from a
SCART connector and sets the
display to 4:3 aspect ratio
Table 1. Slow Switch Modes
MAX4399
Audio/Video Switch for Three SCART
Connectors

CLAMP/BIASTV_R/C_IN
CLAMPTV_Y/CVBS_IN
CLAMPAUX_Y/CVBS_IN
CLAMP/BIASAUX_R/C_IN
CLAMPVCR_B_IN
CLAMPVCR_G_IN
CLAMP/BIASVCR_R/C_IN
VCR_FS_IN
CLAMPVCR_Y/CVBS_IN
CLAMPENC_Y/CVBS_IN
CLAMP/BIASENC_R/C_IN
CLAMPENC_G_IN
CLAMPENC_B_IN
CLAMPENC_Y_IN
ENC_FS_IN
BIASENC_C_IN
0.7V
0.7V
2kΩ
2kΩ
VCR_Y/CVBS_OUT
VCR_R/C_OUT
AUX_Y/CVBS_OUT
AUX_R/C_OUT
TV_R/C_OUT
TV_G_OUT
TV_B_OUT
TV_Y/CVBS_OUT
TV_FS_OUT
RF_CVBS_OUT
BIAS
TRAP
PULLDOWN
TV_R/C_OUT
VGA
5dB, 6dB, OR 7dB
PULLDOWN
AUX_R/C_OUT
PULLDOWN
VCR_R/C_OUT
6dB
6dB
6dB
6dB
6dB
6dB
VGA
5dB, 6dB, OR 7dB
VGA
5dB, 6dB, OR 7dB
MIXER
MAX4399
MAX4399
Audio/Video Switch for Three SCART
Connectors

0dB
0dB
0dB
MUTE
MUTE
0dB
MUTE
0dB
0dB
3dB
0dB
6dB0dB
MUTE
TV_L_IN
VCR_L_IN
AUX_L_IN
ENC_L_IN
VCR_R_IN
TV_R_IN
AUX_R_IN
ENC_R_IN
ST_AUX_INVAUD/2
VAUD/2
PHONO_L_OUT
TV_L_OUT
RF_MONO_OUT
TV_R_OUT
PHONO_R_OUT
0dB
0dB
0dB
0dB
0dB
0dB
0dB
0dB
ZCD
6dB
MUTE
ZCD
MUTE
MUTE
VOLUME CONTROL
+6dB TO -56dB
2dB STEPS
VOLUME CONTROL
+6dB TO -56dB
2dB STEPS
ZCD
VCR_LBTV_LBAUX_LBENC_LBSTEN_LB
VCR_RB
TV_RB
AUX_RBENC_RB
STEN_RB
TO AUDIO
BLOCK 2
TO AUDIO
BLOCK 2
INPUT SOURCE
SWITCHES
INPUT SOURCE
SWITCHES
VOLUME BYPASS
SWITCHES
TV MONO
SWITCHES
TV MONO
SWITCHES
VOLUME BYPASS
SWITCHES
MAX4399
MAX4399
Audio/Video Switch for Three SCART
Connectors

VCR_L_OUT
VCR_R_OUT
AUX_L_OUT
AUX_R_OUT
TV_LB
VCR_LB
AUX_LB
ENC_LB
MUTE
VAUD/2
TV_RB
VCR_RB
AUX_RB
ENC_RB
MUTE
VAUD/2
FROM BUFFER OUTPUTS ON AUDIO BLOCK 1
0dB
0dB0dB
0dB
TV_LB
VCR_LB
AUX_LB
ENC_LB
MUTE
VAUD/2
TV_RB
VCR_RB
AUX_RB
ENC_RB
MUTE
VAUD/2
-6dB, 0dB, 6dB
VOLUME CONTROL
-6dB, 0dB, 6dB
VOLUME CONTROL
-6dB, 0dB, 6dB
VOLUME CONTROL
-6dB, 0dB, 6dB
VOLUME CONTROL
FROM BUFFER OUTPUTS ON AUDIO BLOCK 1
0dB
0dB0dB
0dB
STEN_LB
STEN_RB
STEN_LB
STEN_RB
3dB
3dB
INPUT
SOURCE
SWITCHES
INPUT
SOURCE
SWITCHES
INPUT
SOURCE
SWITCHES
INPUT
SOURCE
SWITCHES
VCR MONO
SWITCHES
VCR MONO
SWITCHES
AUX MONO
SWITCHES
AUX MONO
SWITCHES
MAX4399
MAX4399
Zero-Cross (Clickless) Switching

The TV channel incorporates a zero-crossing detect
(ZCD) circuit that minimizes click noise due to abrupt
signal level changes that occur when switching between
audio signals at an arbitrary moment in time.
To implement the zero-cross function when switching
audio signals, set the ZCD bit by loading register 00h
through the I2C-compatible interface (if the ZCD bit is
not already set). Then set the mute bit high by loading
register 00h. Next, wait for a period of time long enough
for the audio signal to cross zero. This period is a func-
tion of the audio signal path’s low frequency 3dB cor-
ner (fL3dB). For example, if fL3dB= 20Hz, the time
period to wait for zero cross is 1/20Hz or 50ms. Next,
set the appropriate TV switches using register 01h.
Finally, clear the mute bit (while leaving the ZCD bit
high) using register 00h. The MAX4399 switches the
signal out of mute at the next zero crossing.
To implement the zero-cross function for TV volume
changes, or for TV and phono volume bypass switch-
ing, simply ensure the ZCD bit in register 00h is set.
Volume Control

The TV channel volume control ranges from -56dB to
+6dB in 2dB increments. The VCR and AUX volume
control settings are programmable for -6dB, 0dB, and
+6dB. With the ZCD bit set, the TV volume control
switches only at zero crossings, thus minimizing click
noise. The TV outputs can bypass the volume control.
While the phono outputs always follow the TV audio
input selection, the phono outputs can either be
processed through the TV volume control or they can
bypass the TV volume control.
Digital Section
Serial Interface

The MAX4399 uses a simple 2-wire serial interface
requiring only two I/O lines (2-wire bus) of a standard
microprocessor (µP) port. The fast-mode I2C-compati-
ble serial interface allows communication at data rates
up to 400kbps. Figure5 shows the timing diagram for
signals on the 2-wire bus.
The two bus lines (SDA and SCL) must be high when the
bus is not in use. The MAX4399 is a slave device and
must be controlled by a bus master device. Figure6
shows a typical application where multiple devices can
be connected to the bus provided they have different
address settings. External pullup resistors are not neces-
sary on these lines (when driven by push-pull drivers),
though the MAX4399 can be used in applications where
pullup resistors are required to maintain compatibility
with existing circuitry. The serial interface operates at
SCL rates up to 400kHz. The SDA state is allowed to
change only while SCL is low, with the exception of
START and STOP conditions as shown in Figure7.
SDA’s state is sampled, and therefore must remain sta-
ble while SCL is high. Data is transmitted in 8-bit bytes.
Nine clock cycles are required to transfer each byte to
the MAX4399. Release SDA during the 9th clock cycle
as the selected device acknowledges the receipt of the
byte, by pulling SDA low during this time. A series
resistor on the SDA line may be needed if the master’s
output is forced high while the selected device
acknowledges (Figure6).
Audio/Video Switch for Three SCART
Connectors

SCL
SDA
tLOW
tHIGHtR
tHD, STA
tHD, DAT
tHD, STA
tSU, DATtSU, STAtBUF
tSU, STO
START CONDITIONSTOP CONDITIONREPEATED START CONDITIONSTART CONDITION
Figure5. Timing Diagram for SDA and SCL Signals
2C CompatibilityThe MAX4399 is compatible with existing I2C systems.
SCL and SDA are high-impedance inputs. SDA has an
open drain that pulls the data line low during the 9th
clock pulse. Figure8 shows a typical I2C interface
application. The communication protocol supports the
standard I2C 8-bit communications. The general call
address is ignored, and CBUS formats are not supported.
The MAX4399 address is compatible with the 7-bit I2C
addressing protocol only. No 10-bit formats are support-
ed. RESTART protocol is supported, but an immediate
STOP condition is necessary to update the MAX4399.
Digital Inputs and Interface Logic

The I2C-compatible, 2-wire interface has logic levels
defined as VOL= 0.8V and VOH= 2.0V. All of the inputs
include Schmitt-trigger buffers to accept slow-transition
interfaces. The digital inputs are compatible with 3V
CMOS logic levels.
INTERRUPT_OUT Signal

INTERRUPT_OUT is an open-drain output that
becomes high impedance when a change in any of the
slow-switch signals occurs. Clear INTERRUPT_OUT by
setting bit 3 of register 04h low.
Data Format of the 2-Wire Interface
Write mode
Read mode

Where S = Start Condition, A = Acknowledge, P = Stop
Condition.Slave
AddressARegister
AddressADataAPSlave
AddressARegister
AddressADataAP
MAX4399
Audio/Video Switch for Three SCART
Connectors

SDASCL
RS*
VDD
RS* IS OPTIONAL.
SCL
SDA
V_DIG
MAX4399
SCL
SDA
VDD
OTHER DEVICE #1
SCL
SDA
VDD
OTHER DEVICE #2
Figure6. Multiple Devices Controlled by a 2-Wire Interface
SCL
SDA
START CONDITIONSTOP CONDITION
Figure7. Start and Stop Conditions on a 2-Wire Interface
SDASCL
VDD
SCL
SDA
V_DIG
MAX4399
SCL
SDA
VDD
OTHER DEVICE #1
SCL
SDA
VDD
OTHER DEVICE #2
Figure8. A Typical I2C Interface Application
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