MAX3964ETP ,+3.0 to +5.5 V, 124 to 266 Mbps limiting amplifier with loss-of-signal detectorApplicationso oMAX3968CEP 0 C to +70 C 20 QSOP125Mbps FDDI Receiverso oMAX3968C/D 0 C to +70 C Dice ..
MAX3967AETG+T ,270Mbps SFP LED DriverELECTRICAL CHARACTERISTICS(Load as specified in Figure 1; V = +2.97V to +5.5V (at the V pins); V V ..
MAX3969ETP ,200Mbps SFP Limiting AmplifierApplicationsMAX3969E/D** — Dice* —SFP/SFF Transceivers*Dice are designed to operate over a -40°C to ..
MAX396CAI+ ,Precision, 16-Channel/Dual 8-Channel, Low-Voltage, CMOS Analog MultiplexersFeaturesThe MAX396/MAX397 low-voltage, CMOS analog ● Pin-Compatible with MAX306/MAX307, DG406/DG4 ..
MAX396CPI ,Precision, 16-Channel/Dual 8-Channel, Low-Voltage, CMOS Analog MultiplexersFeaturesThe MAX396/MAX397 low-voltage, CMOS analog multi- ' Pin Compatible with MAX306/MAX307,plexe ..
MAX396CQI ,Precision, 16-Channel/Dual 8-Channel, Low-Voltage, CMOS Analog MultiplexersFeaturesThe MAX396/MAX397 low-voltage, CMOS analog multi- ' Pin Compatible with MAX306/MAX307,plexe ..
MAX745EAP ,Switch-Mode Lithium-Ion Battery-ChargerApplicationsrefer to the MAX1647 and MAX1648. For a low-costlithium-ion charger using a linear-regu ..
MAX745EAP ,Switch-Mode Lithium-Ion Battery-ChargerFeaturesThe MAX745 provides all functions necessary for' Charges 1 to 4 Lithium-Ion Battery Cellsch ..
MAX745EAP+ ,Switch-Mode Lithium-Ion Battery-ChargerApplicationsMAX745C/D 0°C to +70°C Dice*MAX745EAP -40°C to +85°C 20 SSOPLi+ Battery PacksDesktop Cr ..
MAX745EAP+ ,Switch-Mode Lithium-Ion Battery-ChargerFeaturesThe MAX745 provides all functions necessary for ♦ Charges 1 to 4 Li+ Battery Cellscharging ..
MAX7461EUK ,Loss-of-Sync Alarm
MAX7461EUK+T ,Loss-of-Sync Alarm
MAX3964ETP
+3.0 to +5.5 V, 124 to 266 Mbps limiting amplifier with loss-of-signal detector
General DescriptionThe MAX3964 limiting amplifier, with 2mVP-Pinput
sensitivity and PECL data outputs, is ideal for low-cost
ATM, FDDI, and Fast Ethernet fiber optic applications.
The MAX3964 features an integrated power detector that
senses the input-signal power. It provides a received-sig-
nal-strength indicator (RSSI), which is an analog indica-
tion of the power level and complementary PECL loss-of-
signal (LOS) outputs, which indicate when the power
level drops below a programmable threshold. The
threshold can be adjusted to detect signal amplitudes as
low as 2.7mVP-P. An optional squelch function disables
switching of the data outputs by holding them at a known
state during an LOS condition.
The MAX3965 provides the same functionality, but
offers TTL-compatible LOS outputs. The MAX3968 pro-
vides the same functionality as the MAX3964, but has
data-output edge speed suitable for ESCON and
266Mbps fibre channel applications.
The MAX3964/MAX3965/MAX3968 are available in die
form, as tested wafers, and in 20-pin QSOP packages.
The MAX3964ETP is available in a 20-pin thin QFN
package.
Applications125Mbps FDDI Receivers
155Mbps LAN ATM Receivers
Fast Ethernet Receivers
ESCON Receivers
155Mbps FTTx Receivers
FeaturesSingle Supply: +3.0V to +5.5V2mVP-PInput Sensitivity1.2ns Output Edge SpeedLoss-of-Signal Detector with Programmable
ThresholdAnalog Received-Signal-Strength IndicatorOutput Squelch FunctionChoice of TTL or PECL LOS OutputsCompatible with 4B/5B Data Coding
MAX3964/MAX3965/MAX3968, 125Mbps to 266Mbps
Limiting Amplifiers with Loss-of-Signal Detector
Ordering Information
Typical Operating Circuit
Pin Configurations appear at end of data sheet.
Selector Guide appears at end of data sheet.*Dice and wafers are designed to operate over a 0°C to +100°C
junction temperature (Tj) range, but are tested and guaranteed
only at TA= +25°C.
**Package Code: T2044-1
MAX3964/MAX3965/MAX3968
+3.0V to +5.5V, 125Mbps to 266Mbps
Limiting Amplifiers with Loss-of-Signal Detector
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS—MAX3964CEP/MAX3965CEP/MAX3968CEP(VCC= +3.0V to +5.5V, PECL outputs terminated with 50Ωto (VCC- 2V), TA= 0°C to +70°C, unless otherwise noted. Typical values
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(SUB, GND, GNDO tied to ground)
VCC, VCCO.............................................................-0.5V to +7.0V
FILTER, RSSI, IN+, IN-, CZP, CZN, SQUELCH,
LOS+, LOS-, INV, VTH, OUT+, OUT- ......-0.5V to (VCC+ 0.5V)
PECL Output Current (OUT+, OUT-, LOS+, LOS-) ............50mA
Differential Voltage Between CZP and CZN..........-1.5V to +1.5V
Differential Voltage Between IN+ and IN- .............-1.5V to +1.5V
Continuous Power Dissipation (TA= +70°C)
20-Lead Thin QFN
(derate 16.9mW/°C above +70°C)..........................1349mW
20-Pin QSOP (derate 6.7mW/°C above +70°C)...........500mW
Operating Temperature Range...........................-40°C to +85°C
Operating Junction Temperature Range (die).....-40°C to +150°C
Processing Temperature (die) ........................................+400°C
Storage Temperature Range ..........................-65°C to +160°C
Lead Temperature (soldering, 10s) ................................+300°C
MAX3964/MAX3965/MAX3968
+3.0V to +5.5V, 125Mbps to 266Mbps
Limiting Amplifiers with Loss-of-Signal Detector
Note 1:Dice are tested and guaranteed at TA= +25°C only.
Note 2:LOS hysteresis = 20log(VLOS-DEASSERT/ VLOS-ASSERT).
Note 3:Voltage measurements are relative to supply voltage (VCC).
Note 4:PWD = [(width of wider pulse) - (width of narrower pulse)] / 2, measured with 100Mbps 1-0 pattern.
ELECTRICAL CHARACTERISTICS—MAX3964ETP(VCC= +3.0V to +5.5V, PECL outputs terminated with 50Ωto (VCC- 2V), TA= -40°C to +85°C. Typical values measured at VCC=
+3.3V and TA= +25°C, unless otherwise noted.)
Typical Operating Characteristics(MAX3964 EV kit, VCC= +3.3V, decibels (dB) calculated as 20 log ∆V, PECL outputs terminated with 50Ωto (VCC- 2V), TA=+25°C,
unless otherwise noted.)
MAX3964/MAX3965/MAX3968
+3.0V to +5.5V, 125Mbps to 266Mbps
Limiting Amplifiers with Loss-of-Signal Detector
Typical Operating Characteristics (continued)(MAX3964 EV kit, VCC= +3.3V, decibels (dB) calculated as 20 log ∆V, PECL outputs terminated with 50Ωto (VCC- 2V), TA=+25°C,
unless otherwise noted.)
MAX3964/MAX3965/MAX3968
+3.0V to +5.5V, 125Mbps to 266Mbps
Limiting Amplifiers with Loss-of-Signal Detector
MAX3964/MAX3965/MAX3968
+3.0V to +5.5V, 125Mbps to 266Mbps
Limiting Amplifiers with Loss-of-Signal Detector
Detailed DescriptionThe MAX3964 contains a series of limiting amplifiers
and power detectors, offset correction, data-squelch
circuitry, and PECL output buffers for data and loss-of-
signal (LOS) outputs. The MAX3965 is functionally the
same, but it provides TTL buffers on the LOS outputs.
The MAX3968 provides PECL LOS outputs with data
outputs suitable for 266Mbps. Figure 1 shows a func-
tional diagram of the MAX3964/MAX3965/MAX3968.
Limiting AmplifiersA series of four limiting amplifiers provides gain of
approximately 65dB.
Power DetectorEach amplifier stage contains a full-wave logarithmic
detector (FWD), which indicates the RMS input signal
power. The FWD outputs are summed together at the
FILTER pin where the signal is filtered by an external
capacitor (CFILTER) connected between FILTER and
VCC. The FILTER signal generates the RSSI output volt-
age, which is proportional to the input power in deci-
bels. When LOS+ is low, VRSSIis approximated by the
following equation:
VRSSI(V) = 1.2V + 0.5log (VIN)
where VINis measured in mVP-P.
This relation translates to a 25mV increase in VRSSIfor
every 1dB increase in VIN(25mV/dB). The RSSI output is
reduced approximately 120mV when LOS+ is asserted.
PECL OutputsThe data outputs (OUT+, OUT-) and the MAX3964/
MAX3968 loss-of-signal outputs (LOS+, LOS-) are sup-
ply-referenced PECL outputs. Standard PECL termina-
tion at each output of 50Ωto (VCC- 2V) is recommended
for best performance.
TTL OutputsThe MAX3965 LOS outputs (LOS+, LOS-) are imple-
mented with open-collector Schottky-clamped TTL-
compatible outputs. The LOS outputs are pulled to VCC
internally with 2kΩresistors and do not require external
pullup resistors.
Input Offset CorrectionA low-frequency feedback loop around the limiting
amplifier improves receiver sensitivity and powerdetec-
tor accuracy. The offset-correction loop’s bandwidth is
determined by an external capacitor (CAZ) connected
between the CZP and CZN pins.
The offset correction is optimized for data streams with
a 50% duty cycle. A different average duty cycle
results in increased pulse-width distortion and loss of
Figure 1. Functional Diagram
