MAX3845UCQ+D ,DVI/HDMI 2:4 TMDS Fanout Switch and Cable DriverELECTRICAL CHARACTERISTICS(V = 3.0V to +3.6V, T = -10°C to +85°C. Typical values are at V = +3.3V, ..
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MAX3845UCQ+D
DVI/HDMI 2:4 TMDS Fanout Switch and Cable Driver
General DescriptionThe MAX3845 is a TMDS®2-to-4 fanout switch and
cable driver for multimonitor distribution of DVI™or
HDMI™signaling up to 1.65Gbps. Both inputs and out-
puts are standard TMDS signaling as per DVI and HDMI
standards. Because TMDS links are “point-to-point,”
buffering is required for fanout applications.
Four DVI/HDMI TMDS outputs are provided for fanout
distribution. Each TMDS output can be independently
sourced from either input or can be turned off. Each
TMDS input or output is composed of four differential
channels that can be arbitrarily assigned to the three
data signals and the 1/10th-rate clock. The data rate
depends on resolution, but it can vary from 250Mbps
(VGA) to 1.65Gbps (UXGA or 1080p/60).
Typical applications include multiroom display of the
same video source or industrial/commercial signage
applications such as airport monitors or trading room
floor displays. The MAX3845 includes selectable output
preemphasis that extends output cable reach up to an
additional 7m.
For DDC switching, use the companion MAX4814E 2:4
low-resistance CMOS crosspoint switch. DDC switching
is not required for applications that connect DDC to one
reference monitor only.
The MAX3845 can be configured to create a 2 x 8 or
4 x 4 switch (see the Typical Operating Circuitdiagrams).
The MAX3845 is available in a 14mm ×14mm, 100-pin
TQFP-EP package and operates over the -10°C to
+85°C temperature range.
ApplicationsDigital Signage and Industrial Display
PC Monitor Distribution
Home A/V Receivers
DVI/HDMI Distribution Amplifiers
DVI/HDMI Crosspoint Switches
FeaturesTwo DVI/HDMI TMDS-Compatible Inputs and Four
DVI/HDMI TMDS-Compatible OutputsSave Power by Turning Off Unused OutputsEach Output Independently Selects Input 1 or
Input 2Three Preemphasis Settings Extend Cable Reach
Up to 7m Operation Up to 1.65Gbps14mm x 14mm, 100-Pin TQFP Package with
Exposed Paddle for Heat Sinking3.3V Power SupplyTMDS Data (x3) and Clock (x1) Can Be Arbitrarily
Assigned to the Four Identical Switched Paths (A,
B, C, and D)
MAX3845
DVI/HDMI 2:4 TMDS Fanout Switch and
Cable Driver
Ordering Information19-0798; Rev 0; 4/07
+Denotes a lead-free package.
EP = Exposed pad.
Typical Operating Circuits continued at end of data sheet.
TMDS is a registered trademark of Silicon Image, Inc.
DVI is a trademark of Digital Display Working Group.
HDMI is a trademark of HDMI Licensing, LLC.
EVALUATION KIT
AVAILABLE
Pin Configuration appears at end of data sheet.
PARTTEMP RANGEPIN-PACKAGEPKG
CODEMAX3845UCQ+ -10°C to +85°C 100 TQFP-EP C100E-3
MAX3845
2:4 FANOUT/SWITCH APPLICATIONIN_SEL[1:4]
HOTPLUG[1:4]
PREEMPH[1:4]
CONTROL
SIGNALS
VIDEO SOURCE 1
VIDEO SOURCE 2
OUTPUT TO DISPLAY 2
OUTPUT TO DISPLAY 1
OUTPUT TO DISPLAY 3
OUTPUT TO DISPLAY 4
2:4 CMOS
SWITCH x5
BUFFER
2:4 DVI/HDMI TMDS
FANOUT SWITCH AND
CABLE DRIVER
DDC DATA, DDC CLK,
HOTPLUG, 5V, GND, (CEC)
Typical Operating Circuit
MAX3845
DVI/HDMI 2:4 TMDS Fanout Switch and
Cable Driver
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VCC= 3.0V to +3.6V, TA= -10°C to +85°C. Typical values are at VCC= +3.3V, external terminations = 50Ω±1%, TMDS rate =
250Mbps to 1.65Gbps, TA= +25°C, unless otherwise noted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage Range (VCC)................................-0.3V to +5.5V
Voltage Range at HOTPLUGx Pins ......................-0.3V to +6.0V
Voltage Range at LVTTL, LVCMOS, I/O Pins .......-0.3V to +5.5V
Voltage Range at CML Output Pins......................-0.3V to +5.5V
Voltage Range at CML Input Pins
(CML short to GND duration < 1s)....................-0.3V to +4.0V
Voltage Between Any Input CML I/O
Complementary Pair......................................................±3.3V
Voltage Range at LOSMUTE_EN..........................-0.3V to +5.5V
Voltage Between Any Output CML I/O
Complementary Pair.......................................................±3.6V
Continuous Power Dissipation (TA= +70°C)
100-Pin TQFP-EP (derate 45.5mW/°C
above +70°C)............................................................3636mW
Operating Junction Temperature .....................-55°C to +150°C
Storage Temperature Range ............................-55°C to +150°C
Die Attach Temperature ..................................................+400°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSPower-Supply Current ICCPREEMPH[1:4] = high, OUT_LEVEL = high,
current into VCC pins, 1200mVP-P = VIN 454 626 mA
Supply-Noise Tolerance DC to 500kHz 50 mVP-P
SKIN-EFFECT EQUALIZER PEAKING Fixed Rx Equalizer
Compensation Gain at 825MHz 1
PREEMPHx pin = low 0
PREEMPHx pin = open 3 Settable Tx Preemphasis
PREEMPHx pin = high 6
dB
JITTER PERFORMANCE 0dB cable loss, no
preemphasis 0.04 0.12
3dB cable loss, +3dB
preemphasis 0.05 0.12 200 back
termination
6dB cable loss, +6dB
preemphasis 0.07 0.12
0dB cable loss, no
preemphasis 0.07 0.2
3dB cable loss, +3dB
preemphasis 0.08 0.2
Residual Deterministic Jitter
(Measured at end of cable
having ideal skin-effect loss
and connectors, e.g., Gore Twin
Coax, Amphenol Skewclear
Twinax, with SMA connectors)
(Note 2) No back
termination
6dB cable loss, +6dB
preemphasis 0.10 0.2
Residual Random Jitter (Note 3) Measured with source Tr/Tf = 250ps 1.5 2 psRMS
CML INPUTS (SOURCE SIDE) Differential-Input Voltage Swing VIDAt cable input 400 2000 mVP-P
Common-Mode Input Voltage VCM VCC - 1000 VCC
Input Voltage When Disconnected VCC - 10 VCC + 10 mV
MAX3845
DVI/HDMI 2:4 TMDS Fanout Switch and
Cable Driver
Note 1:AC specifications are guaranteed by design and characterization.
Note 2:Test pattern is a 210- 1 PRBS + 20 ones + 210- 1 PRBS (inverted) + 20 zeros.
Note 3:Test pattern is a 1111 0000 pattern at 1.65Gbps.
ELECTRICAL CHARACTERISTICS (continued)(VCC= 3.0V to +3.6V, TA= -10°C to +85°C. Typical values are at VCC= +3.3V, external terminations = 50Ω±1%, TMDS rate =
250Mbps to 1.65Gbps, TA= +25°C, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSInput Resistance RINSingle-ended 45 50 55
Input LOS/Mute Threshold Differential peak-peak 150 mV
Deassert mute 1.2 Input LOS/Mute Response Time
Assert mute 0.6
μs
Input Return Loss Differential, 1.6GHz 19 dB
CML OUTPUTS (CABLE SIDE) No preemphasis, no back termination,
OUT_LEVEL = low 900 1050 1200
Differential-Output Voltage Swing VOD
No preemphasis, 200 back termination,
OUT_LEVEL = high 825 925 1050
mVP-P
Output-Voltage High VOH Single-ended, no back termination VCC - 10 VCC + 10
Output Voltage During Power-
Down VOFFSingle-ended, PWRDWN_x = low or
VCC = 0V VCC - 10 VCC + 10 mV
Rise/Fall Time 20% to 80% (TA = 0°C to +85°C) 75 90 140
Intrapair Skew 12 40
Interpair Skew Worst case among A, B, C, and D of an
output 35 60
ps
CONTROL INTERFACE LVTTL Input High Voltage VIH 2.0
All except IN_SELx pins 1.0 LVTTL Input Low Voltage VIL IN_SELx pins 0.8
LVTTL Input High Current VIH(MIN) < VIN < VIH(MAX) 100
All except
OUT_LEVEL pin 150 LVTTL Input Low Current VIL(MIN) < VIN < VIL(MAX)
OUT_LEVEL pin 500
μA
HOTPLUGx Input High Voltage Typical input 30k to GNDVCC - 0.2 5.5
HOTPLUGx Input Low Voltage 1.5 V
MAX3845
DVI/HDMI 2:4 TMDS Fanout Switch and
Cable Driver
Typical Operating Characteristics(Typical values are at VCC= +3.3V, TA= +25°C, data pattern = 210- 1 PRBS + 20 ones + 210- 1 PRBS (inverted) + 20 zeros, unless
otherwise noted.)
SUPPLY CURRENT
vs. AMBIENT TEMPERATUREMAX3845 toc01
AMBIENT TEMPERATURE (°C)
ICC
(mA)655203550
OUT_LEVEL = LOW,
ALL INPUTS/OUTPUTS ACTIVE,
PREEMPHASIS SAME ON ALL
OUTPUT CHANNELS
0dB PREEMPHASIS
3dB PREEMPHASIS
6dB PREEMPHASIS
SUPPLY CURRENT
vs. AMBIENT TEMPERATUREMAX3845 toc02
AMBIENT TEMPERATURE (°C)
ICC
(mA)655203550
OUT_LEVEL = HIGH,
ALL INPUTS/OUTPUTS ACTIVE,
PREEMPHASIS SAME ON ALL
OUTPUT CHANNELS
0dB PREEMPHASIS
3dB PREEMPHASIS
6dB PREEMPHASIS
OUTPUT EYE DIAGRAM AT 1.65Gbps
SHORT LOW-LOSS SMA CABLEMAX3845 toc03
100ps/div
150mV/div
0dB PREEMPHASIS
200Ω BACK TERMINATION
OUTPUT EYE DIAGRAM AT 2.25Gbps
SHORT LOW-LOSS SMA CABLEMAX3845 toc04
80ps/div
150mV/div
0dB PREEMPHASIS
200Ω BACK TERMINATION
OUTPUT EYE DIAGRAM AT 1.65Gbps
6dB LOSS, 24AWG, 25ft TWIN-AX CABLEMAX3845 toc05
100ps/div
150mV/div
6dB PREEMPHASIS
200Ω BACK TERMINATION
OUTPUT EYE DIAGRAM AT 2.25Gbps
6dB LOSS, 24AWG, 25ft TWIN-AX CABLEMAX3845 toc06
80ps/div
150mV/div
6dB PREEMPHASIS
200Ω BACK TERMINATION
OUTPUT EYE DIAGRAM AT 1.65Gbps
THROUGH 2m DVI TO HDMI CABLEMAX3845 toc07
100ps/div
150mV/div
6dB PREEMPHASIS
200Ω BACK TERMINATION
JITTER vs. INPUT-SIDE CABLE LOSS
AT 825 MHzMAX3845 toc08
CABLE LOSS (dB)
JITTER (ps
P-P42
DATA RATE = 1.65Gbps
200Ω BACK TERMINATION
JITTER vs. OUTPUT-SIDE CABLE LOSS
AT 825 MHzMAX3845 toc09
CABLE LOSS (dB)
JITTER (ps
P-P42
0dB PREEMPHASIS
3dB PREEMPHASIS
6dB PREEMPHASIS
DATA RATE = 1.65Gbps
200Ω BACK TERMINATION
MAX3845
DVI/HDMI 2:4 TMDS Fanout Switch and
Cable Driver
DIFFERENTIAL-INPUT RETURN LOSS
vs. FREQUENCYMAX3845 toc10
FREQUENCY (MHz)
GAIN (dB)
TEMP VOLTAGE
vs. JUNCTION TEMPERATURE
MAX3845 toc11
JUNCTION TEMPERATURE (°C)
TEMP (V)
POWER DISSIPATION
vs. AMBIENT TEMPERATURE
MAX3845 toc12
AMBIENT TEMPERATURE (°C)
POWER DISSIPATION (mW)655035205
ALL INPUTS/OUTPUTS ACTIVE,
PREEMPHASIS SAME ON ALL
OUTPUT CHANNELS
0dB PREEMPHASIS
OUT_LEVEL = LOW
6dB PREEMPHASIS
OUT_LEVEL = HIGH
Typical Operating Characteristics (continued)(Typical values are at VCC= +3.3V, TA= +25°C, data pattern = 210- 1 PRBS + 20 ones + 210- 1 PRBS (inverted) + 20 zeros, unless
otherwise noted.)
Pin Description
PINNAMEFUNCTION1, 4, 7, 10,
97, 100 VCC1 Positive Power-Supply Connection. Powers input channel 1 and output channels 1 and 2.
2, 5, 8, 98
IN1_B+,
IN1_C+,
IN1_D+,
IN1_A+
Noninverting TMDS CML Input, Channel 1
3, 6, 9, 99
IN1_B-,
IN1_C-,
IN1_D-,
IN1_A-
Inverting TMDS CML Input, Channel 1
11 PWRDWN_1
Power-Down, LVTTL/LVCMOS Input. Force high or leave open to power down input channel 1. Force
low to enable input channel 1. The MAX3845 powers down if both PWRDWN_1 and PWRDWN_2 are
forced high or left open.
12 VCC3 Positive Power-Supply Connection. Powers the temp-sense circuitry.
13 LOSMUTE_EN LOS MUTE Enable Input. Connect to VCC for typical operation. Connect to GND to disable the LOS
MUTE function.
14 TEMP Junction Temperature Sensor. Attach a ground-referenced voltage DMM to this pin to measure the
die’s junction temperature (see the VCC3 pin description). Leave open if not used.
15 PWRDWN_2
Power-Down, LVTTL/LVCMOS Input. Force high or leave open to power down input channel 2. Force
low to enable input channel 2. The MAX3845 powers down if both PWRDWN_1 and PWRDWN_2 are
forced high or left open.
16, 19, 22,
25, 26, 29 VCC2 Positive Power-Supply Connection. Powers input channel 2 and output channels 3 and 4.
MAX3845
DVI/HDMI 2:4 TMDS Fanout Switch and
Cable Driver
Pin Description (continued)
PINNAMEFUNCTION17, 20, 23,
IN2_A+,
IN2_B+,
IN2_C+,
IN2_D+
Noninverting TMDS, CML Input, Channel 2
18, 21, 24,
IN2_A-,
IN2_B-,
IN2_C-,
IN2_D-
Inverting TMDS, CML Input, Channel 2
30, 61, 65,
IN_SEL4,
IN_SEL3,
IN_SEL2,
IN_SEL1
Input Select, LVTTL Input. Force high to select input channel 1. Force low to select input channel 2.
Leave open to disable the output channel.
31, 62, 64,
PREEMPH4,
PREEMPH3,
PREEMPH2,
PREEMPH1
Preemphasis Select, LVTTL/LVCMOS Input. Force high for 6dB of output preemphasis. Leave open
for 3dB of output preemphasis. Force low for 0dB of output preemphasis (normal).
32, 46, 80,
HOTPLUG4,
HOTPLUG3,
HOTPLUG2,
HOTPLUG1
Hotplug Sense Input. Connect this pin to the display’s HOTPLUGx signal (buffered) to allow
automatic power-down of the associated output when the display is disconnected. A low-cost quad
5V, noninverting CMOS gate (74ACT32 series) is recommended to buffer the MAX3845 from the
HOTPLUGx pin to match HOTPLUG level specifications. If this feature is not used, connect to VCC.
33, 36, 39,
42, 45, 47,
50, 51, 54,
57, 60
GND2 Supply Ground. Ground connection for input channel 2 and output channels 3 and 4.
34, 37, 40,
OUT4_D-,
OUT4_C-,
OUT4_B-,
OUT4_A-
Inverting TMDS, CML Output, Channel 4
35, 38, 41,
OUT4_D+,
OUT4_C+,
OUT4_B+,
OUT4_A+
Noninverting TMDS, CML Output, Channel 4
48, 52, 55,
OUT3_D-,
OUT3_C-,
OUT3_B-,
OUT3_A-,
Inverting TMDS, CML Output, Channel 3
49, 53, 56,
OUT3_D+,
OUT3_C+,
OUT3_B+,
OUT3_A+,
Noninverting TMDS, CML Output, Channel 3
MAX3845
DVI/HDMI 2:4 TMDS Fanout Switch and
Cable Driver
Pin Description (continued)
PINNAMEFUNCTION63 OUT_LEVEL
Output Level Select, LVTTL/LVCMOS Input. Force pin low when no back termination is used (11mA
of tail current). Force pin high when 200 back termination resistors are used (14mA of tail
current).
66, 69, 72,
75, 76, 79,
81, 84, 87,
90, 93
GND1 Supply Ground. Ground connection for input channel 1 and output channels 1 and 2.
67, 70, 73,
OUT2_D-,
OUT2_C-,
OUT2_B-,
OUT2_A-
Inverting TMDS, CML Output, Channel 2
68, 71, 74,
OUT2_D+,
OUT2_C+,
OUT2_B+,
OUT2_A+
Noninverting TMDS, CML Output, Channel 2
82, 85, 88,
OUT1_D-,
OUT1_C-,
OUT1_B-,
OUT1_A-
Inverting TMDS, CML Output, Channel 1
83, 86, 89,
OUT1_D+,
OUT1_C+,
OUT1_B+,
OUT1_A+
Noninverting TMDS, CML Output, Channel 1
— EP Ground. The exposed pad must be soldered to the circuit board ground for proper thermal and
electrical operation.
MAX3845
DVI/HDMI 2:4 TMDS Fanout Switch and
Cable Driver
Detailed DescriptionThe MAX3845 2:4 DVI/HDMI fanout switch and cable
driver accept differential CML input data at rates of
250Mbps up to 1.65Gbps (individual channel data
rate). The input portion of the device consists of two
independent TMDS inputs, each having four fixed-level
equalizers, four limiting amplifiers, a loss-of-signal
(LOS) detector, and power-down control. The output
portion of the device consists of four independent
TMDS outputs, each having four multiplexers, four out-
put buffers with selectable preemphasis, HOTPLUG
detection, and channel selection control (Figure 1).
Fixed Input EqualizationAll four differential pairs on the MAX3845’s TMDS
inputs have fixed-level equalizers to compensate for 0in
to 6in of FR4 PCB losses. The signal boost is approxi-
mately 1dB at 825MHz. If more equalization is desired,
use the MAX3814 or MAX3815 in front of the MAX3845
to accommodate long cable lengths.
Limiting AmplifiersLimiting amplifiers follow the equalizer block to ensure
proper signal levels are achieved for the multiplexers.
Loss-of-Signal (LOS) DetectorsInput channel 1 has an LOS detector attached to the
IN1_B pair. For input channel 2 the LOS detector is
attached to the IN2_C pair. If the received-signal ampli-
tude is smaller than 150mVP-P(typical) at IN1_B, all
output channels selected to input 1 are muted.
Likewise, if a signal smaller than 150mVP-P(typical) is
at IN2_C, all output channels selected to input 2 are
muted.
MultiplexersEach MAX3845 output has four multiplexers, one for
each signal pair contained in the TMDS channel. These
connect the output to either input 1 or input 2. The
IN_SELx pins control the multiplexers.
Preemphasis DriversThe preemphasis drivers have three selectable levels
of preemphasis: 0dB, 3dB, and 6dB. The preemphasis
drivers provide a precompensated signal that allows for
extended length cables to be used at the output.
Applications Information
MAX3845 in HDMI 1.3 SystemsThe MAX3845 is designed and characterized to oper-
ate from 250Mbps to 1.65Gbps. HDMI 1.3 specifies up
to 2.25Gbps for 1080p “deep color” and allows a maxi-
mum data rate of 3.4Gbps on each of the three data
pairs. The MAX3845 operates normally in an HDMI 1.3
system up to 1.65Gbps. The MAX3845 operates at data
rates above 1.65Gbps with reduced jitter performance.
See the Typical Operating Characteristicssection for
more information.
MAX3845 in HDCP SystemsHigh-bandwidth digital content protection (HDCP) is a
copy protection system employed in some DVI and
most HDMI interfaces. Video data is encrypted at the
transmitter and decrypted at the receiver. The data
scrambling is dependent upon shared keys established
during the authentication protocol that occurs over the
DDC channel (between the video source and the dis-
play). The MAX3845 does not decrypt or reencrypt
data. Therefore, HDCP-encrypted video routed through
the MAX3845 is only viewable on the display to which
the DDC channel is connected. For applications that
employ HDCP, the MAX3845 acts as a dual 1:4 switch
and not as a fanout device. This means that one video
source can be selected to drive any one of four dis-
plays, but the video source cannot be replicated on
more than one display at the time. Fanout is possible in
non-HDCP applications, allowing one video source to
simultaneously drive up to four displays.
Output Level Control, Back Termination,
and AC-CouplingThe OUT_LEVEL pin is an LVTTL input that allows the
user to select between standard output drive current
(11mA) or increased output drive current (14mA). The
increased output current setting allows back termina-
tion resistors to be used on the outputs. The use of
back terminations is highly recommended for best sig-
nal integrity (see Figures 2 and 3).
If OUT_LEVEL is set low, the standard output drive cur-
rent (11mA) is consistent with DVI/HDMI architecture
and common-mode levels. As per standard, no back
termination is used so no reflected energy can be
absorbed.
If OUT_LEVEL is set high, the output drive current is
increased to 14mA and allows the use of back termina-
tion resistors. Two options are available: a differential
back termination resistor or two single-ended pullup
resistors (see Figures 2 and 3).
MAX3845
DVI/HDMI 2:4 TMDS Fanout Switch and
Cable DriverOUTPUT MACRO 1
OUT1_[A-D]
HOTPLUG1
PREEMPH1
IN_SEL1
DVI OR
HDMI
CONNECTOR
OUTPUT MACRO 2
OUT2_[A-D]
HOTPLUG2
PREEMPH2
IN_SEL2
DVI OR
HDMI
CONNECTOR
OUTPUT MACRO 3
OUT3_[A-D]
HOTPLUG3
PREEMPH3
IN_SEL3
DVI OR
HDMI
CONNECTOR
OUTPUT MACRO 4
OUT4_[A-D]
HOTPLUG4
PREEMPH4
IN_SEL4
DVI OR
HDMI
CONNECTOR
OUT_LEVELEQLA
LOS 1
->MUTEPDINPUT MACRO 1
IN1_[A-D]
CLKLOSPWRDWN_1
LOSMUTE_EN
EXAMPLE:
MAX3815EQLA
LOS 2
->MUTEPDINPUT MACRO 2
IN2_[A-D]
CLKLOSPWRDWN_2
TEMP (DIE TEMP SENSE)
EXAMPLE:
MAX3815
2:4 DVI FANOUT
SWITCH AND CABLE DRIVER
ANALOG TEMP
SENSE
POWER-DOWN LOGIC FOR EACH OF 4 OUTPUT MACROSPWRDWN_ [OUTPUT MACRO x], WHERE x = 1, 2, 3, OR 4, IF:
[PWRDWN_1 = LOW] OR [LOS 1 = HIGH]
AND
[IN_SELx = HIGH]
[PWRDWN_2 = HIGH] OR [LOS 2 = HIGH]
AND
[IN_SELx = LOW]
[IN_SELx = OPEN]
[HOTPLUGx = LOW OR OPEN]
ON-CHIP SIGNAL:
POWER-DOWN
OUTPUT MACRO x
HIGH
LOW
OPEN
DECODER
IN_SELx2 x R
Figure 1. Functional Diagram
MAX3845Back termination greatly reduces signal degradation
caused by reflections coming off DVI/HDMI connectors
and any other transmission line discontinuities. Much of
the reflected energy off a DVI connector, for example,
is absorbed by the back termination resistance rather
than reflected forward, causing eye closure. For the
cases shown in Figures 2 and 3, the return loss is
approximately 9.5dB. In other words, about 90% of the
reflected energy is absorbed by the back termination
resistors. Maxim strongly recommends using back ter-
mination to maximize the MAX3845’s performance.
The differential back termination options reduce the
common-mode output voltage seen by the TMDS
receiver to approximately VCC- 350mV (Table 1).
The single-ended back termination option allows for
AC-coupling between the MAX3845 and a TMDS
receiver, so long as the TMDS receiver is tolerant of an
input common-mode voltage equal to VCC(HDMI 1.2 or
later).
DVI/HDMI 2:4 TMDS Fanout Switch and
Cable DriverMAX3845
50Ω
200Ω*
300Ω*
TMDS
OUTPUT
PAIR
50Ω
+3.3V
TMDS
RECEIVER
Z0(DIFF) = 100
*BACK TERMINATION RESISTOR IS LOCATED AS CLOSE AS POSSIBLE TO THE MAX3845.
Figure 2. DC-Coupled Differential Back Termination
MAX3845
50Ω
TMDS
OUTPUT
PAIR
50Ω
+3.3V
100Ω*100Ω*
+3.3V
TMDS
RECEIVER
Z0(DIFF) = 100
*BACK TERMINATION RESISTORS ARE LOCATED AS CLOSE AS POSSIBLE TO THE MAX3845.
0.1μF
0.1μF
Figure 3. AC-Coupled Single-Ended Back Termination
