MAX3815CCM+TD Fast Delivery |IC PHOENIX CO.,LIMITED

MAX3815CCM+TD ,TMDS Digital Video Equalizer for DVI/HDMI CablesELECTRICAL CHARACTERISTICS(V = +3.0V to +3.6V, T = 0°C to +70°C. Typical Values are at V = +3.3V, e ..
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MAX381CPE ,Precision, Low-Voltage Analog SwitchesMAX381/MAX383/MAX38519-0300; Rev 0; 9/94Precision, Low-Voltage Analog Switches_______________
MAX381CSE ,Precision, Low-Voltage Analog SwitchesApplicationsMAX381ESE -40°C to +85°C 16 Narrow SOSample-and-Hold Circuits Military RadiosMAX381EJE ..
MAX381EJE ,Precision, Low-Voltage Analog SwitchesMAX381/MAX383/MAX38519-0300; Rev 0; 9/94Precision, Low-Voltage Analog Switches_______________
MAX381EPE ,Precision, Low-Voltage Analog SwitchesGeneral Description ________
MAX739CPD ,-5V,-12V,-15V, and Adjustable Inverting Current-Mode PWM RegulatorslVI/lXI/VI -5V, -12V, -15V, and Adjustable Inverting Gurrent-Mode PWM Regulators
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MAX739EWE ,-5V,-12V,-15V, and Adjustable Inverting Current-Mode PWM RegulatorsFeatures . Pre-Set -5V, -12V, -15V or Adjustable Outputs . Convert Positive Voltages to Negative ..
MAX7400CSA ,8th-Order, Lowpass, Elliptic, Switched-Capacitor Filtersapplications. They fea-' Single-Supply Operationture a shutdown mode that reduces the supply curren ..
MAX7400ESA ,8th-Order, Lowpass, Elliptic, Switched-Capacitor FiltersELECTRICAL CHARACTERISTICS—MAX7400/MAX7403(V = +5V, filter output measured at OUT, 10kΩ || 50pF loa ..
MAX7400ESA+T ,8th-Order, Lowpass, Elliptic, Switched-Capacitor FiltersELECTRICAL CHARACTERISTICS—MAX7400/MAX7403(V = +5V, filter output measured at OUT, 10kΩ || 50pF loa ..

MAX3815CCM+TD
TMDS Digital Video Equalizer for DVI/HDMI Cables
General Description
The MAX3815 cable equalizer automatically provides
compensation for DVI™, HDMI™, DFP, PanelLink®, and
ADC cables. It extends the usable cable distance up to
36 meters. The MAX3815 is designed to equalize sig-
nals encoded in the transition-minimized differential
signaling (TMDS®) format.
The MAX3815 features four CML-differential inputs and
outputs (three data and one clock). It provides a loss-
of-signal (LOS) output that indicates loss-of-clock sig-
nal. The outputs include a disable function or the
equalizer can be powered down to conserve power.
For direct chip-to-chip communication, the output dri-
vers can be switched to one-half the DVI output specifi-
cation to conserve power and reduce EMI. Equalization
can be automatic or set to manual control for specific
in-cable applications.
The MAX3815 is available in a 7mm x 7mm, 48-pin
TQFP-EP package and operates over a 0°C to +70°C
temperature range.
Applications
Front-Projector DVI/HDMI Inputs
High-Definition Televisions and Displays
DVI-D/HDMI Cable-Extender Modules and Active
Cable Assemblies
LCD Computer Monitors
FeaturesExtends TMDS Cable Reach to Projectors or
Monitors Using DVI, DFP, PanelLink, ADC, or
HDMI InterfacesExtends TMDS Interface Length as Follows:
0 to 50 Meters Over DVI-Cable, 24 AWG STP
(Shielded-Twisted Pair)
0 to 36 Meters Over DVI-Cable, 28 AWG STP
0 to 30 Meters Over DVI-Cable, 30 AWG STP Compatible with DTV Resolutions 480i, 480p,
720p, 1080i, and 1080pCompatible with Computer Resolutions VGA,
SVGA, XGA, SXGA, UXGAFully Automatic Equalization Up to 40dB at
825MHz (1.65Gbps), No System Control Required3.3V Power SupplyPower Dissipation of 0.6W (typ)7mm x 7mm 48-Pin TQFP Lead-Free Package
MAX3815
TMDS Digital Video Equalizer for DVI/HDMI
Cables
Ordering Information
RGB/HV
ADC/SYNC
TMDS
DESERIALIZER
SELECT
IMAGE
SCALER AND
PROCESSOR
PANEL
INTERFACE
TIMING AND
DRIVERS
LCD,
DLP,
LCOS
VGA INPUT
DVI-D INPUT
DVI-D CABLE UP
TO 36m OR 120ft
(28AWG STP)
LAPTOP
VIDEO PROJECTOR
MAX3815
EQUALIZER
Typical Application Circuits
19-3466; Rev 2; 2/08
EVALUATION KIT
AVAILABLE
PARTTEMP
RANGE
PIN-
PACKAGE
PKG
CODE
MAX3815CCM0°C to +70°C48 TQFP-EP*C48E-8
MAX3815CCM+0°C to +70°C48 TQFP-EP*C48E-8
+Denotes lead-free package.
*EP = Exposed pad.
Typical Application Circuits continued at end of data sheet.
Pin Configuration appears at end of data sheet.
DVI is a trademark of Digital Display Working Group.
HDMI is a trademark of HDMI Licensing, LLC.
MAX3815
TMDS Digital Video Equalizer for DVI/HDMI
Cables
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage VCC ..............................................-0.5V to +4.0V
Voltage at All I/O Pins.................................-0.5V to (VCC+ 0.7V)
Voltage between any CML I/O Complementary Pair..........±3.3V
Continuous Power Dissipation (TA= +70°C)
48-Pin TQFP-EP (derate 36.2mW/°C above +70°C)..2896mW
Operating Junction Temperature Range...........-55°C to +150°C
Storage Temperature Range.............................-55°C to +150°C
Die Attach Temperature...................................................+400°C
ELECTRICAL CHARACTERISTICS
(VCC= +3.0V to +3.6V, TA= 0°C to +70°C. Typical Values are at VCC= +3.3V, external terminations = 50Ω±1%, TMDS rate =
250Mbps to 1.65Gbps, TA= +25°C, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
PWRDWN = HIGH165230Power-Supply CurrentICCPWRDWN = LOW10mA
Supply-Noise ToleranceDC to 500kHz200mVP-P
EQUALIZER PERFORMANCE
1dB skin-effect loss at 825MHz0.2
24dB skin-effect loss at 825MHz0.2
Residual Output Jitter (Cables
Only) 0.25Gbps to 1.65Gbps
(Notes 1, 2, and 3)40dB skin-effect loss at 825MHz0.2
CID Tolerance20Bits
CONTROL AND STATUS
CLKLOS Assert LevelDifferential peak-to-peak at EQ input with
165MHz clock50mVP-P
CML INPUTS (CABLE SIDE)
Differential Input Voltage SwingVIDAt cable input80010001400mVP-P
Common-Mode Input VoltageVCMVCC -
VCC +
0.1V
Input ResistanceRINSingle-ended455055Ω
CML OUTPUTS (ASIC SIDE)
OUTLEVEL = HIGH80010001200Differential Output-Voltage SwingVOD50Ω load, each side
to VCCOUTLEVEL = LOW350500650mVP-P
Output-Voltage HighSingle-ended, OUTLEVEL = HIGHVCCmV
Output-Voltage LowSingle-ended, OUTLEVEL = HIGHVCC -
VCC -
400mV
Output Voltage During
Power-DownSingle-ended, PWRDWN = LOWVCC -
VCC
+10mV
MAX3815
TMDS Digital Video Equalizer for DVI/HDMI
Cables
ELECTRICAL CHARACTERISTICS (continued)
(VCC= +3.0V to +3.6V, TA= 0°C to +70°C. Typical Values are at VCC= +3.3V, external terminations = 50Ω±1%, TMDS rate =
250Mbps to 1.65Gbps, TA= +25°C, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Common-Mode Output Voltage50Ω load, each side to VCC,
OUTLEVEL = HIGH
VCC -
0.25V
Rise/Fall Time (Note 1)20% to 80%80130200ps
LVTTL CONTROL AND STATUS INTERFACE
LVTTL Input High VoltageVIH2.0V
LVTTL Input Low VoltageVIL0.8V
LVTTL Input High CurrentVIH(MIN) < VIN < VCC-50µA
LVTTL Input Low CurrentGND < VIN < VIL(MAX)-100µA
Open-Collector Output HighRLOAD ≥ 10kΩ to VCC2.4V
Open-Collector Output LowRLOAD ≥ 2kΩ to VCC0.4V
Open-Collector Output Sink5mA
Note 1:AC specifications are guaranteed by design and characterization.
Note 2:Cable input swing is 800mV to 1400mV differential peak-to-peak. Residual output jitter is defined as peak-to-peak determin-
istic jitter + 14.2 times random jitter.
Note 3:Test pattern is a 27- 1 PRBS + 20 ones + 27- 1 PRBS (inverted) + 20 zeros.
Typical Operating Characteristics
(Typical values are at VCC= +3.3V, TA= +25°C, data pattern = 27- 1 PRBS + 20 ones + 27- 1 PRBS (inverted) + 20 zeros, unless
otherwise noted.)
SUPPLY CURRENT
vs. TEMPERATURE
MAX3815 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (mA)5030402010
OUTLEVEL = HIGH
OUTLEVEL = LOW
DIFFERENTIAL INPUT RETURN LOSS
vs. FREQUENCY
MAX3815 toc02
FREQUENCY (MHz)
GAIN (dB)
EQUALIZER INPUT AFTER 205ft OF GORE 89
CABLE (TOP) EQUALIZER OUTPUT (BOTTOM)
MAX3815 toc03
5ns/div
128mV/div
350mV/div
DATA RATE = 1.65Gbps
40dB CABLE SKIN-EFFECT LOSS AT 825MHz
MAX3815
TMDS Digital Video Equalizer for DVI/HDMI
Cablesypical Operating Characteristics (continued)
(Typical values are at VCC= +3.3V, TA= +25°C, data pattern = 27- 1 PRBS + 20 ones + 27- 1 PRBS (inverted) + 20 zeros, unless
otherwise noted.)
EQUALIZER INPUT EYE AFTER 205ft OF GORE 89
CABLE (TOP) EQUALIZER OUTPUT (BOTTOM)
MAX3815 toc04
152ps/div
350mV/div
DATA RATE = 1.65Gbps
40dB CABLE SKIN-EFFECT LOSS AT 825MHz
EQUALIZER INPUT EYE AFTER 205ft OF GORE 89
CABLE (TOP) EQUALIZER OUTPUT (BOTTOM)
MAX3815 toc05
1ns/div
300mV/div
DATA RATE = 250Mbps
40dB CABLE SKIN-EFFECT LOSS AT 825MHz
EQUALIZER EYES AFTER 100ft MADISON DIGITAL
FLAT-PANEL CABLE, 28 AWG (DATA RATE = 1.65Gbps)
MAX3815 toc06
200ps/div
350mV/div
EQUALIZER EYES AFTER 100ft MADISON DIGITAL
FLAT-PANEL CABLE, 28 AWG (DATA RATE = 350Mbps)
MAX3815 toc07
1ns/div
350mV/div
EQUALIZER EYES AFTER 3ft CABLE
(DATA RATE = 1.65Gbps)
MAX3815 toc08
200ps/div
350mV/div
JITTER vs. DATA RATE AFTER 205ft CABLE
WITH 40dB SKIN-EFFECT LOSS AT 825MHz
MAX3815 toc09
DATA RATE (Mbps)
JITTER (ps
P-P
GORE 89 CABLE
RESIDUAL JITTER =
DJ + 14.2 x RJ
DETERMINISTIC JITTER
TOTAL JITTER vs. POWER-SUPPLY
NOISE FREQUENCY (DATA RATE = 1.65Gbps)
MAX3815 toc10
FREQUENCY (kHz)
TOTAL JITTER (ps
P-P
10,000100010100
100100,000
NOISE AMPLITUDE: 200mVP-P
DATA THROUGH 100ft MADISON DIGITAL
FLAT-PANEL CABLE, 28AWG
DETERMINISTIC JITTER vs. CABLE LENGTH
(TENSOLITE TWIN-AX 28 AWG)
MAX3815 toc11
CABLE LENGTH (ft)
DETERMINISTIC JITTER (UI
P-P
1.65Gbps
800Mbps
250Mbps
NO EQ
WITH
MAX3815 EQ
RESIDUAL JITTER vs. SIGNAL AMPLITUDE
INPUT TO CABLE (DATA RATE = 1.65Gbps)
MAX3815 toc12
DIFFERENTIAL AMPLITUDE (mVP-P)
RESIDUAL JITTER (ps
P-P
205ft OF GORE 89 CABLE WITH 40dB SKIN-
EFFECT LOSS AT 825MHz
RESIDUAL JITTER = DJ + 14.2 X RJ
MAX3815
TMDS Digital Video Equalizer for DVI/HDMI
Cables
EQCONTROL VOLTAGE (RELATIVE TO VCC)
vs. CABLE LENGTH (MANUAL EQ CONTROL)
MAX3815 toc13
CABLE LENGTH (ft)
EQCONTROL VOLTAGE (V)
CABLE IS TENSOLITE TWIN-AX
28 AWG WITH APPROXIMATELY
0.34dB OF LOSS PER FOOT AT
825MHz
RESIDUAL JITTER
AT 1.65Gbps
EQCONTROL VOLTAGE
RESIDUAL JITTER (ps
P-P
EQUALIZER OUTPUT EYE AFTER 120ft
OF CABLE (DATA RATE = 1.65Gbps)
MAX3815 toc14
CABLE IS TENSOLITE
TWIN-AX 28 AWG
200mV/div
100ps/div
LOSS-OF-CLOCK ASSERT THRESHOLD
vs. CABLE LENGTH
MAX3815 toc15
CABLE LENGTH (ft)
DIFFERENTIAL CLOCK AMPLITUDE (mV
P-P
165MHz CLOCK FREQUENCY
25MHz CLOCK FREQUENCY
CABLE IS TENSOLITE TWIN-AX 28 AWG
Typical Operating Characteristics (continued)
(Typical values are at VCC= +3.3V, TA= +25°C, data pattern = 27- 1 PRBS + 20 ones + 27- 1 PRBS (inverted) + 20 zeros, unless
otherwise noted.)
Pin Description
PINNAMEFUNCTION
1, 4, 5, 8, 9,
12, 13, 16,
38, 41, 43, 44
VCCSupply Voltage. All pins must be connected to VCC.RX0_IN-Negative Data Input, CMLRX0_IN+Positive Data Input, CMLRX1_IN-Negative Data Input, CMLRX1_IN+Positive Data Input, CMLRX2_IN-Negative Data Input, CMLRX2_IN+Positive Data Input, CMLRXC_IN+Positive Clock Input, CMLRXC_IN-Negative Clock Input, CMLEQCONTROL
Equalizer Control. This pin allows the user to control the equalization level of the MAX3815. Connect
the pin to GND for automatic operation. Set the voltage to VCC / 2 for minimum equalization, or set
the voltage between VCC - 1V to VCC for manual equalization. See the Typical Operating
Characteristics for more information.CLKLOSLoss-of-Clock Signal Output, LVTTL Open Collector. This pin asserts low upon loss of the input TMDS
clock from the cable.PWRDWNPower-Down Input, LVTTL. This input allows the IC to be powered down to conserve power. Connect
high for normal operation. Pull low for power-down mode.
MAX3815
Detailed Description
The MAX3815 TMDS equalizer accepts differential CML
input data at rates of 250Mbps up to 1.65Gbps (individ-
ual channel data rate). It automatically adjusts to atten-
uation levels of up to 40dB at 825MHz due to
skin-effect losses in copper cable. It consists of four
CML input buffers, a loss-of-clock signal detector, three
independent adaptive equalizers, four limiting ampli-
fiers, and four output buffers (Figure 1).
CML Input Buffers and Output Drivers
The input buffers and the output drivers are implement-
ed using current-mode logic (CML) (see Figures 3 and
4). The output drivers are open-collector and can be
turned off with the OUTONpin, or can be set to output
a one-half amplitude signal (500mVP-Pdifferential)
using the OUTLEVEL pin. For details on interfacing with
CML, refer to Maxim Application Note HFAN-01.0:
Introduction to LVDS, PECL, and CML.
Loss-of-Clock Signal Detector
The loss-of-clock signal detector indicates a loss-of-
clock signal at the CLKLOSpin.
Adaptive Equalizer
The three data channels each contain an independent
adaptive equalizer. Each channel analyzes the incom-
ing signal and determines the amount of equalization to
apply.
Limiting Amplifier
The limiting amplifier amplifies the signal from the
adaptive equalizer and truncates the top and bottom of
the waveform to provide a clean high- and low-level
signal to the output drivers.
Applications Information
Typical shielded twisted pair (STP) and unshielded
twisted pair (UTP) cables exhibit skin-effect losses,
which attenuate the high-frequency spectrum of a
TMDS signal, eventually causing data errors or even
closing the signal eye altogether given a long enough
cable. The MAX3815 recovers the data and opens the
signal eye through compensating equalization.
The basic TMDS interface is composed of four differen-
tial serial links: three links carry serial data up to
1.65Gbps each, and the fourth is a one-tenth-rate
(0.1x) clock that operates up to 165MHz. TMDS, as with
TMDS Digital Video Equalizer for DVI/HDMI
Cables
Pin Description (continued)
PINNAMEFUNCTION
20, 23, 24,
25, 28, 29,
32, 33, 36,
37, 42
GNDGroundRXC_OUT-Negative Clock Output, CMLRXC_OUT+Positive Clock Output, CMLRX2_OUT+Positive Data Output, CMLRX2_OUT-Negative Data Output, CMLRX1_OUT+Positive Data Output, CMLRX1_OUT-Negative Data Output, CMLRX0_OUT+Positive Data Output, CMLRX0_OUT-Negative Data Output, CMLOUTLEVELOutput-Level Control Input, LVTTL. This input sets the output amplitude to the standard DVI level
(1000mVP-P) when high, and sets the output amplitude to 1/2 the DVI level (500mVP-P) when low.OUTONOutput-Enable Control Input, LVTTL. This input enables the CML outputs when forced low and sets a
differential logic zero when forced high.
45–48N.C.No ConnectionExposed PadGround. The exposed pad must be soldered to the circuit-board ground for proper
thermal and electrical operation.

Partno	Mfg	Dc	Qty	Available	Descript
MAX3815CCM+TD \|MAX3815CCMTD	MAX	N/a	1000	avai	TMDS Digital Video Equalizer for DVI/HDMI Cables